CN217335427U - Filter circuit for inhibiting input transient voltage spike - Google Patents
Filter circuit for inhibiting input transient voltage spike Download PDFInfo
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- CN217335427U CN217335427U CN202220988559.XU CN202220988559U CN217335427U CN 217335427 U CN217335427 U CN 217335427U CN 202220988559 U CN202220988559 U CN 202220988559U CN 217335427 U CN217335427 U CN 217335427U
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Abstract
The utility model provides a filter circuit for inhibiting input transient voltage peak, which comprises a TVS tube, wherein an input inductor L1 is connected between the negative pole and the input positive pole of the TVS tube, and a filter capacitor group is connected in parallel on the TVS tube; the input end of the low-frequency common mode filter circuit is connected with the filter capacitor bank; the output end of the filter capacitor bank is connected with the first module filter capacitor bank; the input end of the high-frequency common-mode filter circuit is connected with the first mode filter capacitor bank; the output end of the second module filter capacitor bank is connected with the output positive end and the output negative end; by adding the filter inductor and the filter capacitor, the TVS tube is prevented from absorbing overvoltage spikes for a long time to cause over-power damage; meanwhile, by designing the two stages of common mode filter circuits with different frequency bands, the wide frequency band can be covered, and the filter circuit has good filter effect on low-frequency band noise and high-frequency band noise of input common mode noise.
Description
Technical Field
The utility model relates to a filter circuit technical field specifically is a filter circuit who restraines input transient voltage peak.
Background
In switching power supply and all kinds of electric system's in-service use, input supply voltage all has the risk that transient voltage spike disturbed, if transient voltage spike disturbance peak value is higher, probably lead to switching power supply and all kinds of electric system's damage, current transient voltage spike restraines mainly protects through TVS pipe (transient suppression diode), come temporarily when transient voltage spike, through TVS pipe (transient suppression diode) clamper input voltage range, TVS pipe (transient suppression diode) probably bears higher instantaneous power this moment, long-term the use probably has the damage risk.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a filter circuit who restraines input transient voltage peak to solve the problem that proposes among the above-mentioned background art.
In order to achieve the above object, the utility model provides a following technical scheme:
a filter circuit for suppressing an input transient voltage spike comprises a TVS (transient voltage suppressor) tube, wherein the negative electrode and the positive electrode of the TVS tube are respectively connected with an input positive electrode end and an input negative electrode end, an input inductor L1 is connected between the negative electrode and the input positive electrode end of the TVS tube, and a filter capacitor bank is connected to the TVS tube in parallel; the low-frequency common mode filter circuit is connected with the filter capacitor bank at the input end; the output end of the filter capacitor bank is connected with the first module filter capacitor bank; the input end of the high-frequency common mode filter circuit is connected with the first mode filter capacitor bank; the output end of the second module filter capacitor bank is connected with the output positive end and the output negative end respectively.
Preferably, the filter capacitor bank comprises a filter capacitor C1 and a filter capacitor C2 connected in parallel, and the filter capacitor C1 and the filter capacitor C2 are connected in parallel with the TVS tube.
Preferably, the low-frequency common-mode filter circuit includes a common-mode filter inductor L2, an input end of the common-mode filter inductor L2 is connected to the filter capacitor bank, and further includes a common-mode filter capacitor C3 and a common-mode filter capacitor C6, first ends of the common-mode filter capacitor C3 and the common-mode filter capacitor C6 are respectively connected to two ends of an output end of the common-mode filter inductor L2, and second ends of the common-mode filter capacitor C3 and the common-mode filter capacitor C6 are connected to each other and grounded.
Preferably, the first mode filter capacitor bank includes a differential mode filter capacitor C4 and a differential mode filter capacitor C5 connected in parallel, one end of the differential mode filter capacitor C4 is connected to a first end of the common mode filter capacitor C3, the other end of the differential mode filter capacitor C4 is connected to a first end of the common mode filter capacitor C6, and two ends of the differential mode filter capacitor C5 are connected to the high-frequency common mode filter circuit.
Preferably, the high-frequency common-mode filter circuit includes a common-mode filter inductor L3, an input end of the common-mode filter inductor L3 is connected to a differential-mode filter capacitor C5, and further includes a common-mode filter capacitor C7 and a common-mode filter capacitor C10, first ends of the common-mode filter capacitor C7 and the common-mode filter capacitor C10 are respectively connected to two ends of an output end of the common-mode filter inductor L3, and second ends of the common-mode filter capacitor C7 and the common-mode filter capacitor C10 are connected to each other and grounded.
Preferably, the second mode filter capacitor bank includes a differential mode filter capacitor C8 and a differential mode filter capacitor C9 connected in parallel, one end of the differential mode filter capacitor C8 is connected to the first end of the common mode filter capacitor C7, the other end of the differential mode filter capacitor C8 is connected to the first end of the common mode filter capacitor C10, and two ends of the differential mode filter capacitor C9 are connected to the output positive terminal and the output negative terminal.
Compared with the prior art, the utility model provides a filter circuit of suppression input transient voltage spike possesses following beneficial effect: by improving the traditional transient voltage suppression circuit and increasing the use of a filter inductor and a filter capacitor, the power consumption of the TVS can be temporarily carried out by sharing an input voltage peak, partial peak energy is stored and released, and the TVS is prevented from absorbing an overvoltage peak for a long time to cause over-power damage; meanwhile, by designing the two stages of common mode filter circuits with different frequency bands, the wide frequency band can be covered, and the filter circuit has good filter effect on low-frequency band noise and high-frequency band noise of input common mode noise.
Drawings
Fig. 1 is a schematic structural diagram of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1, a filter circuit for suppressing an input transient voltage spike includes a TVS tube, a negative electrode and a positive electrode of the TVS tube are respectively connected to an input positive terminal and an input negative terminal, an input inductor L1 is connected between the negative electrode and the input positive terminal of the TVS tube, and the TVS tube is connected in parallel to a filter capacitor bank; the low-frequency common mode filter circuit is connected with the filter capacitor bank at the input end; the output end of the filter capacitor bank is connected with the first module filter capacitor bank; the input end of the high-frequency common mode filter circuit is connected with the first mode filter capacitor bank; the output end of the second-mode filter capacitor bank is connected with the output positive end and the output negative end; specifically, the filter capacitor bank includes a filter capacitor C1 and a filter capacitor C2 connected in parallel, and the filter capacitor C1 and the filter capacitor C2 are connected in parallel with the TVS tube. This application comes temporarily when input transient voltage spike, the TVS pipe switches on in the twinkling of an eye, produce the electric current spike, the electric current at inductance both ends can not the sudden change, input inductance L1 can play good absorption inhibiting action to the transient current spike, input inductance L1 can store partial energy this moment, prevent that the TVS pipe from damaging because of absorptive spike energy is too high, filter capacitor C1 in addition, C2 is parallelly connected with the TVS pipe, further filtering voltage spike, share the operating pressure of TVS pipe. The low-frequency common-mode filter circuit comprises a common-mode filter inductor L2, the input end of a common-mode filter inductor L2 is connected with two ends of a filter capacitor C2, the low-frequency common-mode filter circuit further comprises a common-mode filter capacitor C3 and a common-mode filter capacitor C6, the first ends of the common-mode filter capacitor C3 and the common-mode filter capacitor C6 are respectively connected with two ends of the output end of the common-mode filter inductor L2, the second ends of the common-mode filter capacitor C3 and the common-mode filter capacitor C6 are connected with each other and grounded, the first mode filter capacitor set comprises a differential-mode filter capacitor C4 and a differential-mode filter capacitor C5 which are connected with each other in parallel, one end of the differential-mode filter capacitor C4 is connected with the first end of the common-mode filter capacitor C3, the other end of the common-mode filter capacitor C6 is connected with the two ends of the differential-mode filter capacitor C5, the high-frequency common-mode filter circuit comprises a filter inductor L3, the input end of the common-mode filter inductor L3 is connected with a differential-mode filter capacitor C5, still include common mode filter capacitor C7 and common mode filter capacitor C10, common mode filter capacitor C7 and common mode filter capacitor C10's first end is connected with common mode filter inductor L3's output both ends respectively, common mode filter capacitor C7 and common mode filter capacitor C10's second end interconnect and ground connection, second mode filter capacitor group is including mutual parallel connection's differential mode filter capacitor C8 and differential mode filter capacitor C9, common mode filter capacitor C7's first end is connected to differential mode filter capacitor C8's one end, and common mode filter capacitor C10's first end is connected to the other end, output positive terminal and output negative terminal are connected to differential mode filter capacitor C9's both ends.
The common mode filter inductor L2 and the common mode filter capacitors C3 and C6 form a low-frequency common mode filter circuit, and common mode noise of a low frequency band (below 10 MHz) is filtered by pertinence design parameters; the common mode filter inductor L3, the common mode filter capacitors C7 and C10 form a high-frequency common mode filter circuit, and common mode noise in a high-frequency band (10MHz and above) is filtered according to design parameters.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (6)
1. A filter circuit for suppressing input transient voltage spikes, comprising: the TVS comprises a TVS tube, wherein the negative electrode and the positive electrode of the TVS tube are respectively connected with an input positive electrode end and an input negative electrode end, an input inductor L1 is connected between the negative electrode and the input positive electrode end of the TVS tube, and the TVS tube is connected with a filter capacitor set in parallel; the low-frequency common mode filter circuit is connected with the filter capacitor bank at the input end; the output end of the filter capacitor bank is connected with the first module filter capacitor bank; the input end of the high-frequency common-mode filter circuit is connected with the first mode filter capacitor bank; the output end of the second module filter capacitor bank is connected with the output positive end and the output negative end respectively.
2. The filter circuit according to claim 1, wherein the filter circuit is configured to suppress input transient voltage spikes: the filter capacitor bank comprises a filter capacitor C1 and a filter capacitor C2 which are connected in parallel, and the filter capacitor C1 and the filter capacitor C2 are connected in parallel with the TVS tube.
3. The filter circuit according to claim 1, wherein the filter circuit is configured to suppress input transient voltage spikes: the low-frequency common-mode filter circuit comprises a common-mode filter inductor L2, wherein the input end of the common-mode filter inductor L2 is connected with a filter capacitor group, the low-frequency common-mode filter circuit further comprises a common-mode filter capacitor C3 and a common-mode filter capacitor C6, the first ends of the common-mode filter capacitor C3 and the common-mode filter capacitor C6 are respectively connected with the two ends of the output end of the common-mode filter inductor L2, and the second ends of the common-mode filter capacitor C3 and the common-mode filter capacitor C6 are connected with each other and grounded.
4. The filter circuit according to claim 3, wherein the filter circuit is configured to suppress input transient voltage spikes: the first mode filter capacitor bank comprises a differential mode filter capacitor C4 and a differential mode filter capacitor C5 which are connected in parallel, one end of the differential mode filter capacitor C4 is connected with the first end of a common mode filter capacitor C3, the other end of the differential mode filter capacitor C4 is connected with the first end of the common mode filter capacitor C6, and two ends of the differential mode filter capacitor C5 are connected with a high-frequency common mode filter circuit.
5. The filter circuit according to claim 4, wherein the filter circuit is configured to suppress input transient voltage spikes: the high-frequency common-mode filter circuit comprises a common-mode filter inductor L3, wherein the input end of the common-mode filter inductor L3 is connected with a differential-mode filter capacitor C5, the high-frequency common-mode filter circuit further comprises a common-mode filter capacitor C7 and a common-mode filter capacitor C10, the first ends of the common-mode filter capacitor C7 and the common-mode filter capacitor C10 are respectively connected with the two ends of the output end of the common-mode filter inductor L3, and the second ends of the common-mode filter capacitor C7 and the common-mode filter capacitor C10 are mutually connected and grounded.
6. The filter circuit according to claim 5, wherein the filter circuit is configured to suppress input transient voltage spikes: the second mode filter capacitor bank comprises a differential mode filter capacitor C8 and a differential mode filter capacitor C9 which are connected in parallel, one end of the differential mode filter capacitor C8 is connected with the first end of the common mode filter capacitor C7, the other end of the differential mode filter capacitor C8 is connected with the first end of the common mode filter capacitor C10, and the two ends of the differential mode filter capacitor C9 are connected with an output positive end and an output negative end.
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CN202220988559.XU CN217335427U (en) | 2022-04-27 | 2022-04-27 | Filter circuit for inhibiting input transient voltage spike |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115833788A (en) * | 2022-11-29 | 2023-03-21 | 中船重工安谱(湖北)仪器有限公司 | Multi-order filter for ion mobility instrumentation |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN115833788A (en) * | 2022-11-29 | 2023-03-21 | 中船重工安谱(湖北)仪器有限公司 | Multi-order filter for ion mobility instrumentation |
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