CN217335177U

CN217335177U - VOOC heavy current and PD high pressure undercurrent of compatible fill circuit soon

Info

Publication number: CN217335177U
Application number: CN202220881190.2U
Authority: CN
Inventors: 庞继浩; 黄应宏; 朱锡辉; 高琼瑶; 杨昌盛
Original assignee: Dongke Semiconductor Anhui Co ltd
Current assignee: Dongke Semiconductor Anhui Co ltd
Priority date: 2022-04-14
Filing date: 2022-04-14
Publication date: 2022-08-30
Anticipated expiration: 2032-04-14

Abstract

The utility model discloses a compatible VOOC heavy current and PD high pressure undercurrent fill circuit soon, a serial communication port, including agreement chip U1, transformer T, voltage detection circuit, first energy storage filter rectifier circuit, second energy storage filter rectifier circuit to and on-off control circuit, transformer T comprises the NS winding of PN winding and duplex winding output. The utility model discloses a transformer of first energy storage filter rectifier circuit, second energy storage filter rectifier circuit, the on-off control circuit that set up and bifilar output cooperatees, can realize the output compatibility of two kinds of agreements of VOOC heavy current, PD high pressure undercurrent under the condition that does not change rated power, thereby the utility model discloses the problem that can not be compatible of two kinds of agreements of VOOC heavy current, PD high pressure undercurrent of the current charging circuit of solution under a rated power that can be fine.

Description

VOOC heavy current and PD high pressure undercurrent of compatible fill circuit soon

Technical Field

The utility model relates to the field of electronic technology, concretely relates to compatible VOOC heavy current and PD high pressure undercurrent fill circuit soon.

Background

With the rise of electronic products such as mobile phones and computers, the demand of chargers matching with the electronic products is increasing. The communication protocols of different electronic products are selected according to their own features, which puts higher demands on the compatibility of the charging circuit of the charger. However, the charging circuit of the existing rated power charger has the problem that VOOC selection and PD protocol selection are difficult to be compatible, taking a 65W charger as an example, VOOC selects a large current route 10v6.5A, and PD protocol selects 20V3.25A, and to realize compatibility of the two selections, current is 6.5A, voltage is 20V, and power of the charger needs to be increased to 20V 6.5A-130W, which greatly increases power and cost of the charger.

Therefore, in order to reduce the use and production costs of the electronic product and the charger, it is urgent to develop a charging circuit that can implement compatibility of two protocols of VOOC large current and PD high voltage small current without changing power, so as to reduce the use and production costs of the electronic product and the charger.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to overcome current flat-plate transformer and have foretell defect, provide one kind and can realize under a rated power compatible VOOC heavy current and the fast charging circuit of PD high pressure undercurrent of two kinds of agreements of VOOC heavy current, PD high pressure undercurrent.

The purpose of the utility model is realized through the following technical scheme: a VOOC (voltage over current) large-current and PD (pulse-width modulation) high-voltage small-current quick charging circuit comprises a protocol chip U1, a transformer T, a voltage detection circuit connected with a switch control circuit, a first energy storage filter rectifying circuit and a second energy storage filter rectifying circuit which are connected with the transformer T and the switch control circuit respectively, and a switch control circuit connected with the first energy storage filter rectifying circuit and the second energy storage filter rectifying circuit respectively; the protocol chip U1 is connected with the transformer T; the transformer T consists of a PN winding and a NS winding output by double windings, and the first energy storage filter rectifying circuit and the second energy storage filter rectifying circuit are respectively connected with the PN winding of the transformer T; the protocol chip U1 is connected with the transformer T through a PN winding.

Furthermore, pins 1-3 of a PN winding of the transformer T are primary windings, and the number of turns of the primary windings of the PN winding is 60; the NS winding is an output secondary winding, the number of turns of the NS winding is 10, wherein 6-8 pins of the NS winding are output by one winding, and 6-10 pins of the NS winding are output by the other winding; the protocol chip U1 is connected with pins 1 and 3 of the PN winding of the transformer T.

The first energy storage filter rectifying circuit comprises a diode D1, and a capacitor C1, wherein the anode of the capacitor C is connected with the N pole of a diode D1, and the cathode of the capacitor C is connected with the pin 6 of the NS winding of the transformer T and then grounded; the P pole of the diode D1 is connected to the 8-pin of the NS winding of the transformer T, and the N pole of the diode D1 is connected to the switch control circuit and the voltage detection circuit.

The second energy storage filter rectifying circuit comprises a diode D2, and a capacitor C2, wherein the anode of the capacitor C is connected with the N pole of the diode D2, and the cathode of the capacitor C is connected with the pin 6 of the NS winding of the transformer T and then grounded; the P pole of the diode D2 is connected to the 10 pin of the NS winding of the transformer T, and the N pole of the diode D2 is connected to the switch control circuit.

Still further, the switch control circuit comprises a field effect transistor MOS1, a three-terminal adjustable shunt U2, a resistor R1 with one terminal connected to the source of the field effect transistor MOS1 and the other terminal connected to the gate of the field effect transistor MOS1, and a resistor R2 with one terminal connected to the cathode of the three-terminal adjustable shunt U2 and the other terminal connected to the gate of the field effect transistor MOS 1; the anode of the three-terminal adjustable shunt U2 is connected with the negative electrode of the capacitor C2, and the reference electrode is connected with the voltage detection circuit; the source electrode of the field effect transistor MOS1 is connected with the N pole of the diode D2, and the drain electrode of the field effect transistor MOS1 is respectively connected with the N pole of the diode D1 and the voltage detection circuit; the negative electrode of the capacitor C1 is connected with the anode of a three-terminal adjustable shunt U2.

The voltage detection circuit comprises a resistor R3 and a resistor R4, wherein one end of the resistor R3 is connected with the drain electrode of a field effect transistor MOS1, and the other end of the resistor R3 is connected with the reference electrode of a three-terminal adjustable shunt U2; one end of the resistor R4 is connected with the reference electrode of the three-terminal adjustable shunt U2, and the other end is connected with the anode of the three-terminal adjustable shunt U2.

And a pin 1 of the PN winding of the transformer T is provided with a capacitor C3, the positive electrode of the capacitor C3 is connected with the pin 1 of the PN winding of the transformer T, and the negative electrode of the capacitor C3 is grounded.

A field effect transistor MOS2 is arranged between the pin 3 of the PN winding of the transformer T and the protocol chip U1, the grid electrode of the field effect transistor MOS2 is connected with the PWM pin of the protocol chip U1, the drain electrode is connected with the pin 3 of the PN winding of the transformer T, and the source electrode is connected with the CS pin of the protocol chip U1.

The source of the field effect transistor MOS2 is further provided with a resistor R4, one end of the resistor R4 is connected with the source of the field effect transistor MOS2, and the other end is connected with the GND pin of the protocol chip U1 and then grounded.

In addition, the protocol chip U1 is a DK065G chip.

Compared with the prior art, the utility model have following advantage and beneficial effect:

(1) the utility model discloses a transformer of first energy storage filter rectifier circuit, second energy storage filter rectifier circuit, the on-off control circuit that set up and bifilar output cooperatees, can realize the output compatibility of two kinds of agreements of VOOC heavy current, PD high pressure undercurrent under the condition that does not change rated power, thereby the utility model discloses the problem that can not be compatible of two kinds of agreements of VOOC heavy current, PD high pressure undercurrent of the current charging circuit of solution under a rated power that can be fine.

(2) The utility model discloses a voltage detection circuit through setting up, the conversion accuracy of two kinds of agreements of realization VOOC heavy current, PD high pressure undercurrent that can be better.

Drawings

Fig. 1 is a schematic diagram of the overall circuit structure of the present invention.

Detailed Description

The present invention will be described in further detail with reference to examples, but the embodiments of the present invention are not limited thereto.

Examples

As shown in fig. 1, the object of the present invention is achieved by the following technical solutions: the utility model provides a compatible VOOC heavy current and PD high pressure undercurrent fill circuit soon, includes agreement chip U1, transformer T, on-off control circuit, voltage detection circuit, first energy storage filter rectifier circuit to and second energy storage filter rectifier circuit. Specifically, the protocol chip U1 in this embodiment is preferably implemented by a DK065G chip. The voltage detection circuit is connected with the switch control circuit. The first energy storage filter rectifying circuit and the second energy storage filter rectifying circuit are connected with the transformer T and the switch control circuit. The switch control circuit is respectively connected with the first energy storage filter rectifying circuit and the second energy storage filter rectifying circuit. The protocol chip U1 is connected to the transformer T.

The transformer T consists of a PN winding and an NS winding output by a double winding. Pins 1-3 of a PN winding of the transformer T are primary windings, and the number of turns of the primary winding of the PN winding is 60; the NS winding is an output secondary winding, the number of turns of the NS winding is 10 turns, wherein 6-8 pins of the NS winding are output by one winding, 6-10 pins of the NS winding are output by the other winding, and the number of turns of the output winding is 10 turns of the NS winding. The first energy storage filter rectifying circuit and the second energy storage filter rectifying circuit are respectively connected with a PN winding of the transformer T. The protocol chip U1 is connected with the transformer T by a PN winding. The protocol chip U1 is connected to pins 1 and 3 of the PN winding of the transformer T.

As shown in fig. 1, a field effect transistor MOS2 of type 8N65 is provided between the 3-pin of the PN winding of the transformer T and the protocol chip U1. Specifically, the gate of the field effect transistor MOS2 is connected to the PWM pin of the protocol chip U1, the drain is connected to the 3-pin of the PN winding of the transformer T, and the source is connected to the CS pin of the protocol chip U1. Meanwhile, a capacitor C3 with the capacitance value of 120 muF/400V is arranged on a pin 1 of the PN winding of the transformer T, and the capacitor C3 is a bridge rectifier capacitor. The positive electrode of the capacitor C3 is connected to pin 1 of the PN winding of the transformer T, and the negative electrode is grounded.

In order to ensure the discharge rate during the operation of the field effect transistor MOS2, a resistor R4 having a resistance of 0.25R is also provided at the source of the field effect transistor MOS 2. One end of the resistor R4 is connected to the source of the field effect transistor MOS2, and the other end is connected to the GND pin of the protocol chip U1 and then grounded. The resistor R4 can better realize the conversion accuracy of VOOC heavy current and PD high voltage low current protocols.

Further, as shown in fig. 1, the first energy storage filter rectification circuit comprises a diode D1 and a capacitor C1. Specifically, the capacitance value of the capacitor C1 is 1000 μ F/25V, the anode of the capacitor C1 is connected to the N-pole of the diode D1, and the cathode is connected to the pin 6 of the NS winding of the transformer T and then grounded. The diode D1 is 60R05M, the P pole of the diode D1 is connected to the 8-pin of the NS winding of the transformer T, and the N pole of the diode D1 is connected to the switch control circuit and the voltage detection circuit. When the detection voltage is set to be 5-11V, the voltage is output by the pins of the NS winding 6-8 of the transformer T, and after being rectified by the diode D1, the voltage is supplied by the energy storage filter of the capacitor C1, namely, the capacitor C1 stores the energy and filters the energy and outputs the large current 10V6.5A selected by VOOC protocol.

Meanwhile, the second energy storage filter rectifying circuit comprises a diode D2 and a capacitor C2. Specifically, the diode D2 in this embodiment is preferably implemented by a diode with a model number of 100R10M, and the capacitor C2 is preferably implemented by a capacitor with a capacitance value of 1000 μ F/25V. The anode of the capacitor C2 is connected with the N pole of the diode D2, and the cathode is connected with the pin 6 of the NS winding of the transformer T and then grounded. The P pole of the diode D2 is connected to the 10 pin of the NS winding of the transformer T, and the N pole of the diode D2 is connected to the switch control circuit.

Still further, as shown in fig. 1, the switch control circuit includes a field effect transistor MOS1, a three-terminal adjustable shunt U2, a resistor R1, and a resistor R2. Specifically, the resistance of the resistor R1 is 1K, and one end of the resistor R1 is connected to the source of the field effect transistor MOS1, and the other end is connected to the gate of the field effect transistor MOS 1. The resistance of the resistor R2 is 100R, and one end of the resistor R2 is connected with the cathode of the three-terminal adjustable shunt U2, and the other end is connected with the gate of the field effect transistor MOS 1. The model of the three-terminal adjustable shunt U2 is TL341, the anode of the three-terminal adjustable shunt U2 is connected with the cathode of the capacitor C2, and the reference pole is connected with the voltage detection circuit. The negative electrode of the capacitor C1 is connected to the anode of a three-terminal adjustable shunt U2. The model number of the effect transistor MOS1 is 12P03, the source of the field effect transistor MOS1 is connected with the N pole of the diode D2, and the drain of the field effect transistor MOS1 is respectively connected with the N pole of the diode D1 and the voltage detection circuit.

Further, as shown in fig. 1, the voltage detection circuit includes a resistor R3 with a resistance of 34.8K and a resistor R4 with a resistance of 34.8K. Specifically, one end of the resistor R3 is connected to the drain of the field effect transistor MOS1, and the other end is connected to the reference electrode of the three-terminal adjustable shunt U2. One end of the resistor R4 is connected with the reference pole of the three-terminal adjustable shunt U2, and the other end is connected with the anode of the three-terminal adjustable shunt U2.

When the transformer T is used specifically, AC input voltage is filtered by a capacitor C3 and then is supplied to a PN winding of the transformer T when the transformer T is started, and the PN winding outputs energy to an NS winding. When the detection voltage is set to be 5-11V, the voltage is output by the pins of the NS winding 6-8 of the transformer T, and the voltage is rectified by a diode D1 and then is supplied by a capacitor C1 energy storage filter, namely, a capacitor C1 energy storage filter outputs a large current 10V6.5A selected by VOOC protocol. When the communication voltage of the protocol chip U1 rises to 12V-20V output voltage, the three-terminal adjustable shunt U2 detects that the output voltage reaches a threshold value, the conduction of a field effect transistor MOS1 is controlled, the output voltage is rectified by a pin 6-10 output diode D2 of an NS winding of a transformer T, energy storage and filtering are carried out through a capacitor C2, the current after energy storage and filtering are carried out through a capacitor C2 supplies power to a field effect transistor MOS1, the field effect transistor MOS1 is conducted, and the 20V3.25A meeting the PD high-voltage small current is output.

According to the operating principle NP1-3 × I1 ═ NS6-8 × I2 ═ NS6-10 × I3 of the transformer T, the two windings 20/10 of the secondary are 2, and 3.25A × 2 ═ 6.5A. When the capacitor C1 outputs a large current 10V6.5A selected by the VOOC protocol after energy storage and filtering, an output winding formed by 6-8 pins of an NS winding of the transformer TD is a power supply winding, and at the moment, the number of turns of the output winding formed by 6-8 pins of the NS winding is 5. When the field effect transistor MOS1 is conducted and 20V3.25A meeting PD high-voltage small current is output, an output winding formed by 6-10 pins of an NS winding of the transformer TD is a power supply winding, and at the moment, the number of turns of the output winding formed by 6-10 pins of the NS winding is 10. Therefore, the invention realizes current conversion without power change in principle, the actual test circuit achieves automatic switching between 10V6.5A and 20V3.25A, and the compatibility problem of two protocols of high current and PD high voltage low current selected by VOOC protocol of 65W is solved.

As described above, the utility model discloses alright fine realization.

Claims

1. A VOOC (voltage over current) large current and PD (pulse detector) high-voltage small current quick charging circuit is characterized by comprising a protocol chip U1, a transformer T, a voltage detection circuit connected with a switch control circuit, a first energy storage filter rectifying circuit and a second energy storage filter rectifying circuit which are connected with the transformer T and the switch control circuit respectively, and a switch control circuit connected with the first energy storage filter rectifying circuit and the second energy storage filter rectifying circuit respectively; the protocol chip U1 is connected with the transformer T; the transformer T consists of a PN winding and a NS winding output by double windings, and the first energy storage filter rectifying circuit and the second energy storage filter rectifying circuit are respectively connected with the PN winding of the transformer T; the protocol chip U1 is connected with the transformer T through a PN winding; pins 1-3 of a PN winding of the transformer T are primary windings, and the number of turns of the primary winding of the PN winding is 60; the NS winding is an output secondary winding, the number of turns of the NS winding is 10, wherein 6-8 pins of the NS winding are output by one winding, and 6-10 pins of the NS winding are output by the other winding; the protocol chip U1 is connected with pins 1 and 3 of a PN winding of the transformer T;

the first energy storage filter rectifying circuit comprises a diode D1, and a capacitor C1, wherein the anode of the capacitor C is connected with the N pole of a diode D1, and the cathode of the capacitor C is connected with the pin 6 of the NS winding of the transformer T and then grounded; the P pole of the diode D1 is connected with the 8 feet of the NS winding of the transformer T, and the N pole of the diode D1 is connected with the switch control circuit and the voltage detection circuit;

2. The VOOC large current and PD high-voltage small current fast charging circuit according to claim 1, wherein the switch control circuit comprises a field effect transistor MOS1, a three-terminal adjustable shunt U2, a resistor R1 with one terminal connected with the source of the field effect transistor MOS1 and the other terminal connected with the gate of the field effect transistor MOS1, and a resistor R2 with one terminal connected with the cathode of the three-terminal adjustable shunt U2 and the other terminal connected with the gate of the field effect transistor MOS 1; the anode of the three-terminal adjustable shunt U2 is connected with the negative electrode of the capacitor C2, and the reference electrode is connected with the voltage detection circuit; the source of the field effect transistor MOS1 is connected with the N pole of the diode D2, and the drain of the field effect transistor MOS1 is respectively connected with the N pole of the diode D1 and the voltage detection circuit; the negative electrode of the capacitor C1 is connected with the anode of a three-terminal adjustable shunt U2.

3. The VOOC large current and PD high-voltage small current fast charging circuit according to claim 2, wherein the voltage detection circuit comprises a resistor R3 and a resistor R4, one end of the resistor R3 is connected with the drain of a field effect transistor MOS1, and the other end is connected with the reference pole of a three-terminal adjustable shunt U2; one end of the resistor R4 is connected with the reference pole of the three-terminal adjustable shunt U2, and the other end is connected with the anode of the three-terminal adjustable shunt U2.

4. A VOOC high-current and PD high-voltage low-current fast charging circuit as claimed in any one of claims 1 to 3, characterized in that a capacitor C3 is arranged on pin 1 of the PN winding of the transformer T, the positive pole of the capacitor C3 is connected with pin 1 of the PN winding of the transformer T, and the negative pole is grounded.

5. A VOOC large current and PD high-voltage small current fast charging circuit as claimed in claim 4, characterized in that a field effect transistor MOS2 is arranged between the 3 feet of the PN winding of the transformer T and the protocol chip U1, the grid of the field effect transistor MOS2 is connected with the PWM pin of the protocol chip U1, the drain is connected with the 3 feet of the PN winding of the transformer T, and the source is connected with the CS pin of the protocol chip U1.

6. A VOOC large current and PD high-voltage small current fast charging circuit as claimed in claim 5, wherein the source of said field effect transistor MOS2 is further provided with a resistor R4, one end of the resistor R4 is connected to the source of the field effect transistor MOS2, and the other end is connected to the GND pin of the protocol chip U1 and then grounded.

7. A VOOC high-current and PD high-voltage low-current compatible fast charge circuit according to claim 6, wherein the protocol chip U1 is a DK065G chip.