CN217283088U - High-definition video signal conversion circuit - Google Patents

High-definition video signal conversion circuit Download PDF

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Publication number
CN217283088U
CN217283088U CN202220560379.1U CN202220560379U CN217283088U CN 217283088 U CN217283088 U CN 217283088U CN 202220560379 U CN202220560379 U CN 202220560379U CN 217283088 U CN217283088 U CN 217283088U
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circuit
conversion circuit
chip
video signal
image processing
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CN202220560379.1U
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冯海亮
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Zhuhai Seesheen Medical Technology Co ltd
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Zhuhai Seesheen Medical Technology Co ltd
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Abstract

The utility model belongs to the technical field of signal conversion, a high definition video signal conversion circuit is disclosed, which comprises an analog-digital conversion circuit, an image processing circuit, an image format conversion circuit and a main control circuit; the output end of the analog-digital conversion circuit is connected with the input end of the image processing circuit, the output end of the image processing circuit is connected with the input end of the image format conversion circuit, and the output end of the image format conversion circuit is connected with external video signal receiving equipment; the image processing circuit, the image format conversion circuit and the video signal receiving equipment are respectively connected with the main control circuit. The utility model provides a video signal conversion output's design circuit, simple structure, stability is good, and the security is high, and external radiation is low, and the interference killing feature is strong, and imaging effect is good, and the image is clear noiseless, can make things convenient for the doctor to observe the internal state of an illness of patient, provides convenience for the doctor diagnoses the state of an illness.

Description

High-definition video signal conversion circuit
Technical Field
The utility model belongs to the technical field of the signal conversion, especially, relate to a high definition video signal conversion circuit.
Background
Currently, endoscopes generally refer to medical instruments that enter a human body through various ducts to observe the internal conditions of the human body. In the diagnosis and treatment process, for better observation, simultaneous observation of multiple persons or image contrast observation is mainly realized through an image processor (a liquid crystal display screen). The video image acquisition mode is that a shooting unit at the front end part of the endoscope is used for acquiring a video signal of the focus position of a patient, and the video signal is transmitted to a display unit for displaying through conversion and isolation. In the existing stage, endoscopic imaging is mostly standard definition imaging, the effect is general, so high definition imaging also becomes a direction in which people in the industry pursue, in order to obtain high definition video, a high definition imaging camera is mostly adopted, a digital isolation chip is needed to isolate image signals in the conversion process of obtaining high definition video images, a DAC is used to convert digital image signals into analog image signals and output the analog image signals to a display after isolation, and the defects of complex and disorderly conversion, large signal distortion in the conversion process and the like are overcome.
Through the above analysis, the problems and defects of the prior art are as follows: the existing conversion mode of high-definition video images has the defects of complicated and disordered conversion, large signal distortion in the conversion process and the like.
SUMMERY OF THE UTILITY MODEL
To the problem that prior art exists, the utility model provides a high definition video signal conversion circuit.
The utility model discloses a realize like this, a high definition video signal conversion circuit is provided with:
the device comprises an analog-digital conversion circuit, an image processing circuit, an image format conversion circuit and a main control circuit;
the output end of the analog-digital conversion circuit is connected with the input end of the image processing circuit, the output end of the image processing circuit is connected with the input end of the image format conversion circuit, and the output end of the image format conversion circuit is connected with external video signal receiving equipment;
the image processing circuit, the image format conversion circuit and the video signal receiving equipment are respectively connected with the main control circuit.
Further, the analog-digital conversion circuit is provided with a pixel sensor and a data conversion chip, and the pixel sensor is connected with the input end of the image processing circuit through the data conversion chip.
Furthermore, the high-definition video signal conversion circuit is further provided with a power supply tree, the input end of the power supply tree is connected with a power supply input circuit, the output end of the power supply tree is connected with a plurality of power supply circuits, and the plurality of power supply circuits are respectively connected with the analog-digital conversion circuit, the image processing circuit, the image format conversion circuit and the main control circuit.
Further, the output voltage of the power supply circuit of the plurality of paths is different, and the output voltage is respectively: 3.3V, 2.5V, 1.8V, 1.2V.
Further, the pixel sensor is connected with a power supply circuit with output voltage of 3.3V, and the data conversion chip is connected with power supply circuits with output voltages of 3.3V and 1.8V.
Further, the image processing circuit is provided with an image processing chip and an active crystal oscillator, the active crystal oscillator is connected with the image processing chip, the image processing chip is connected with power supply circuits with output voltages of 3.3V and 1.2V, and the active crystal oscillator is connected with the power supply circuit with output voltage of 3.3V.
Further, the image format conversion circuit is provided with a format conversion chip and a passive crystal oscillator, and the format conversion chip is connected with the passive crystal oscillator; the format conversion chip is connected with a power supply circuit with output voltages of 3.3V, 2.5V and 1.8V.
Further, the main control circuit is connected with a power supply circuit with the output voltage of 3.3V.
Combine foretell all technical scheme, the utility model discloses the advantage that possesses and positive effect are: the utility model provides a video signal conversion output's design circuit, simple structure, stability is good, and the security is high, and external radiation is low, and the interference killing feature is strong, and imaging effect is good, and the image is clear noiseless, can make things convenient for the doctor to observe the internal state of an illness of patient, provides convenience for the doctor diagnoses the state of an illness.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present application, and it is obvious for those skilled in the art that other drawings can be obtained from the drawings without creative efforts.
Fig. 1 is a schematic circuit diagram of a high definition video signal conversion circuit provided by an embodiment of the present invention.
Fig. 2 is a circuit diagram of a high definition video signal conversion circuit using a pixel sensor OV6930 provided by the embodiment of the present invention.
Fig. 3-1 and 3-2 are circuit diagrams of the data conversion chip OV420 provided by the embodiment of the present invention.
Fig. 4 is a circuit diagram of a high definition video signal conversion circuit using a pixel sensor OV6946 according to an embodiment of the present invention.
Fig. 5-1 and 5-2 are circuit diagrams of the data conversion chip OV426 provided by the embodiment of the present invention.
Fig. 6 is a circuit diagram of a power tree according to an embodiment of the present invention.
Fig. 7 is a circuit diagram of a power supply input circuit according to an embodiment of the present invention.
Fig. 8 is a circuit diagram of a power supply circuit outputting 3.3V voltage provided by the embodiment of the present invention.
Fig. 9 is a circuit diagram of a power supply circuit outputting 2.5V voltage provided by the embodiment of the present invention.
Fig. 10 is a circuit diagram of a power supply circuit outputting 1.8V voltage provided by the embodiment of the present invention.
Fig. 11 is a circuit diagram of a power supply circuit outputting 1.2V voltage provided by the embodiment of the present invention.
Fig. 12 is a circuit diagram of an image processing circuit according to an embodiment of the present invention.
Fig. 13 is a circuit diagram of an image format conversion circuit according to an embodiment of the present invention.
Fig. 14 is a circuit diagram of a master control circuit according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail with reference to the following embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
To the problem that prior art exists, the utility model provides a high definition video signal conversion circuit, it is right below to combine the figure the utility model discloses do detailed description.
As shown in fig. 1, the high definition video signal conversion circuit provided by the embodiment of the present invention includes an analog-digital conversion circuit, an image processing circuit, an image format conversion circuit and a main control circuit; the analog-digital conversion circuit is connected with the image processing circuit, the image processing circuit is connected with the input end of the image format conversion circuit, and the output end of the image format conversion circuit is connected with the video signal receiving equipment; the image processing circuit, the image format conversion circuit and the video signal receiving equipment are respectively connected with the main control circuit.
The embodiment of the utility model provides an in analog-to-digital conversion circuit be provided with pixel sensor and data conversion chip, pixel sensor passes through data conversion chip and image processing circuit connection.
The embodiment of the utility model provides an in high definition video signal converting circuit still is provided with the power tree, the input of power tree is connected with power input circuit, the output of power tree is connected with multichannel power supply circuit.
The embodiment of the utility model provides an in output voltage diverse of multichannel power supply circuit, multichannel power supply circuit is connected with analog-to-digital conversion circuit, image processing circuit, image format conversion circuit and master control circuit respectively.
The embodiment of the utility model provides an in image processing circuit be provided with image processing chip, active crystal oscillator and each way power supply circuit, the image processing chip is connected with active crystal oscillator and each way power supply circuit respectively.
The embodiment of the utility model provides an in image format conversion circuit be provided with format conversion chip and passive crystal oscillator, the format conversion chip is connected with passive crystal oscillator.
As an embodiment of the high definition video new signal conversion, the analog-to-digital conversion circuit includes a pixel sensor chip OV6930 and a data conversion chip OV 420;
as shown in fig. 2, 3-1 and 3-2, the chip OV6930 is a VGA (400 × 400) pixel sensor which is a color CMOS analog output produced by OV, and the chip OV6930 outputs analog images in full frame and RGB format through a Serial Camera Control Bus (SCCB) interface control.
Chip OV 420-Single chip solution for chip OV6930 medical applications. For analog-to-digital conversion of analog image signals output by the chip OV6930, when the chip OV420 is combined with the chip OV6930, the chip OV6930 provides an integrated analog-to-digital data conversion scheme using a built-in a/D converter (ADC), Black Level Calibration (BLC) and final digital video parallel output (DVP). The chip OV420 provides a standard SCCB interface for communicating with the system and operating the functions described above. During operation, the chip OV420 synchronizes analog signals from the chip OV6930 through the ADC via a predefined communication protocol and will generate digital signals to be processed by a Digital Signal Processor (DSP). Finally, the standard DVP data output is sent.
As another embodiment of the high definition video new signal conversion, the analog-digital conversion circuit includes a pixel sensor chip OV6946 and a data conversion chip OV 426;
as shown in FIG. 4 and FIG. 5, the chip OV6946 is a VGA (400 x 400) pixel sensor which is a color CMOS analog output and produced by OV, and the chip OV6946 outputs analog images in full frame and RGB format through the control of a Serial Camera Control Bus (SCCB) interface.
Chip OV 426-a single chip solution for chip OV6946 medical applications. For analog-to-digital conversion of analog image signals output by the chip OV6930, when the chip OV426 is combined with the chip OV6946, the chip OV6946 provides an integrated analog-to-digital data conversion scheme using built-in a/D converters (ADC), Black Level Calibration (BLC) and final digital video parallel output (DVP). The chip OV426 provides a standard SCCB interface for communicating with the system and operating the functions described above. During operation, the chip OV426 synchronizes analog signals from the chip OV6946 through the ADC over a predefined communication protocol and generates digital signals to be processed by a Digital Signal Processor (DSP). Finally, the standard DVP output is sent.
The chip OV426 provides a clock to the chip OV6946, the chip OV6946 inputs an analog image signal to the chip OV426 after receiving the clock, the chip OV426 performs AD conversion on the analog image signal to convert the analog image signal into a raw image format of 10 bits for output, and outputs PCLK, HREF and VSYNC signals. The circuit communicates with other chips through the IIC communication interface.
As shown in fig. 6 to 11, the power tree circuit structure shows that the circuit is powered by 4V input, performs voltage conversion, and outputs a multi-path power supply circuit, the output voltages of the multi-path power supply circuit are respectively 3.3V, 2.5V, 1.8V, and 1.2V, where 4V is the input voltage, and the 3.3V, 2.5V, 1.8V, and 1.2V four-path power supply circuit is used in each stage circuit to provide power for each stage circuit.
The pixel sensor chip OV6946/OV6930 in the analog-digital conversion circuit is powered by 3.3V of output voltage, and the digital conversion chip OV426/OV420 in the analog-digital conversion circuit is powered by 3.3V of output voltage and 1.8V of output voltage.
As shown in fig. 12, the image processing circuit is composed of an image processing chip XC7021 and a 24M active crystal oscillator, the image processing chip XC7021 is connected to the 24M active crystal oscillator, and the image processing chip XC7021 is an image processing chip ISP, which is a low-cost and low-power-consumption image processor and can support up to 300 ten thousand pixel sensors, and high-resolution and high-quality camera applications. A high-cost-performance digital image processing SOC chip with a 32-bit processor integrated inside supports CMOS Sensor input of a 10bit 1080P RAW image format and outputs 8-bit YUV422 images. The image processing chip XC7021 has a brand-new AEC algorithm and a strong denoising and boundary enhancing technology. The chip clock is input by a 24M active crystal oscillator, the image processing chip XC7021 is powered by a power supply circuit with output voltage of 3.3V and 1.2V, and the 24M active crystal oscillator is powered by the power supply circuit with output voltage of 3.3V. The image processing chip XC7021 receives DVP data output by the chip OV420 or the chip OV426, performs image processing optimization, and outputs the processed image data to the next-stage chip in the YUV422 format.
As shown in fig. 13, the image format conversion circuit converts the image in YUV422 format with 8 bits into image output in CVBS format, the main chip of the circuit is CH7026B, the main chip CH7026B is powered by the power supply circuit with input voltages of 3.3V, 2.5V and 1.8V, the clock of the chip is provided by a 24M passive crystal oscillator, the circuit is used for receiving the video signal in YUV422 format with 8 bits, and simultaneously needs to be connected with PCLK, HREF and VSYNC synchronization signals, and the video communication format is BT601 format.
Chip CH7026B is a semiconductor device for the handheld market, surveillance cameras and car multimedia systems. The device receives digital video signals over its 24-bit input bus and generates NTSC, PAL, VGA or HDTV (480p, 576p, 720p and 1080i) video signals over its 10-bit DACs. In addition, CH7026B has an embedded 16mbit SDRAM to support the CPU interface. CH7026B may perform real-time video rotation and frame rate conversion of the incoming video stream. These complex tasks are achieved by storing the video data to an internal SDRAM and applying a scaling procedure when needed. CH7026B provides great flexibility and can accept a variety of video data formats (e.g., RGB565, RGB 666, RGB 888, ITU 656) including RGB and YCbCr. In the embodiment of the present invention, the image conversion chip CH7026 is used to convert the image format of YUV422 into the image format of CVBS for output.
STM32 is a microprocessor MCU produced by ST company, the chip function is powerful, the performance is stable, is the utility model discloses a main control chip, the function is to carry out serial port communication with the host computer, the parameter of the register of chips such as configuration image processor etc.. In the embodiment of the utility model, as main control chip, by the power supply of input voltage 3.3V.
The 24M crystal oscillator is the input crystal oscillator of XC7021 and CH 7026.
The above description is only for the specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto, and any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be covered within the protection scope of the present invention by those skilled in the art within the technical scope of the present invention.

Claims (8)

1. A high definition video signal conversion circuit characterized by being provided with:
the device comprises an analog-digital conversion circuit, an image processing circuit, an image format conversion circuit and a main control circuit;
the output end of the analog-digital conversion circuit is connected with the input end of the image processing circuit, the output end of the image processing circuit is connected with the input end of the image format conversion circuit, and the output end of the image format conversion circuit is connected with external video signal receiving equipment;
the image processing circuit, the image format conversion circuit and the video signal receiving equipment are respectively connected with the main control circuit.
2. The high-definition video signal conversion circuit according to claim 1, wherein the analog-to-digital conversion circuit is provided with a pixel sensor and a data conversion chip, and the pixel sensor is connected to the input terminal of the image processing circuit through the data conversion chip.
3. The high-definition video signal conversion circuit according to claim 1, wherein a power tree is further provided, a power input circuit is connected to an input end of the power tree, and a plurality of power supply circuits are connected to an output end of the power tree, and are respectively connected to the analog-to-digital conversion circuit, the image processing circuit, the image format conversion circuit, and the main control circuit.
4. The high-definition video signal conversion circuit according to claim 3, wherein the output voltages of the plurality of power supply circuits are different from each other, and the output voltages are respectively: 3.3V, 2.5V, 1.8V and 1.2V.
5. The high-definition video signal conversion circuit according to claim 2, wherein the pixel sensor is connected to a power supply circuit with an output voltage of 3.3V, and the data conversion chip is connected to power supply circuits with output voltages of 3.3V and 1.8V.
6. The high-definition video signal conversion circuit according to claim 4, wherein the image processing circuit is provided with an image processing chip and an active crystal oscillator, the active crystal oscillator is connected with the image processing chip, the image processing chip is connected with a power supply circuit with an output voltage of 3.3V and 1.2V, and the active crystal oscillator is connected with a power supply circuit with an output voltage of 3.3V.
7. The high-definition video signal conversion circuit according to claim 4, wherein the image format conversion circuit is provided with a format conversion chip and a passive crystal oscillator, and the format conversion chip is connected with the passive crystal oscillator; the format conversion chip is connected with a power supply circuit with output voltages of 3.3V, 2.5V and 1.8V.
8. The high-definition video signal conversion circuit according to claim 4, wherein the main control circuit is connected with a power supply circuit with an output voltage of 3.3V.
CN202220560379.1U 2022-03-15 2022-03-15 High-definition video signal conversion circuit Active CN217283088U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202220560379.1U CN217283088U (en) 2022-03-15 2022-03-15 High-definition video signal conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202220560379.1U CN217283088U (en) 2022-03-15 2022-03-15 High-definition video signal conversion circuit

Publications (1)

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CN217283088U true CN217283088U (en) 2022-08-23

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