CN217239469U - Silicon carbide vertical conduction MOSFET device - Google Patents

Silicon carbide vertical conduction MOSFET device Download PDF

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Publication number
CN217239469U
CN217239469U CN202220238491.3U CN202220238491U CN217239469U CN 217239469 U CN217239469 U CN 217239469U CN 202220238491 U CN202220238491 U CN 202220238491U CN 217239469 U CN217239469 U CN 217239469U
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region
shallow
depth
body region
mosfet device
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M·G·萨吉奥
E·扎内蒂
A·M·弗拉泽托
A·瓜尔内拉
C·M·卡玛勒里
A·G·格里马尔迪
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STMicroelectronics SRL
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices

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  • Power Engineering (AREA)
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  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

The present disclosure relates to silicon carbide vertical conduction MOSFET devices. A vertical conduction MOSFET device includes a silicon carbide body having a first conductivity type and a face. The shallow body region of the second conductivity type has a first doping level and extends into the body to a first depth and has a first width. The source region of the first conductivity type extends into the shallow body region to a second depth and has a second width. The second depth is less than the first depth and the second width is less than the first width. A deep body region of a second type of conductivity has a second doping level and extends into the body at a distance from a face of the body and is in direct electrical contact with the shallow body region, and the second doping level is higher than the first doping level.

Description

Silicon carbide vertical conduction MOSFET device
Technical Field
The utility model relates to a carborundum vertical conduction MOSFET device.
Background
It is well known that semiconductor materials with a wide bandgap (e.g. greater than 1.1eV), low on-state resistance, high thermal conductivity, high operating frequency and high carrier saturation velocity allow to obtain electronic devices (such as diodes and transistors) with better performance with respect to silicon electronic devices, in particular for power applications operating, for example, at voltages between 600V and 1300V or under specific operating conditions (such as high temperatures).
In particular, such electronic devices are known which obtain one of their polytypes (e.g. 3C-SiC, 4H-SiC and 6H-SiC) from a silicon carbide wafer, these electronic devices being distinguished by the characteristics listed above.
SUMMERY OF THE UTILITY MODEL
The present disclosure provides various embodiments that overcome some or all of the deficiencies of the prior art.
According to the present disclosure, a MOSFET device and a manufacturing process thereof are provided.
In at least one embodiment, a vertical conduction MOSFET device is provided that includes a silicon carbide body having a first conductivity type and a face. The shallow body region of the second conductivity type has a first doping level and extends from a face of the body into the body along a first direction to a first depth and has a first width along a second direction, the second direction being transverse to the first direction. The source region of the first conductivity type extends from the face of the body to a second depth along the first direction toward the interior of the shallow body region and has a second width along the second direction. The second depth is less than the first depth and the second width is less than the first width. A deep body region of the second conductivity type having the second doping level, the deep body region extending into the body at a distance from the face of the body and being in direct electrical contact with the shallow body region. The second doping level is higher than the first doping level.
In at least one embodiment, a device is provided that includes a silicon carbide substrate having a first conductivity type and a first surface. A shallow body region of the second conductivity type has a first doping level and extends from the first surface into the substrate along the first direction to a first depth. The shallow body region has a first width along a second direction that is transverse to the first direction. Source regions of the first conductivity type extend from the first surface into the shallow body regions along the first direction to a second depth, and the source regions have a second width along the second direction. The second depth is less than the first depth and the second width is less than the first width. The deep body region of the second conductivity type has a second doping level, the second doping level being greater than the first doping level. The deep body region is spaced from the first surface by the source region and is in direct contact with the shallow body region.
Drawings
For a better understanding of the present disclosure, embodiments thereof will now be described, by way of non-limiting example only, with reference to the accompanying drawings, in which:
fig. 1 shows a cross-section of a silicon carbide vertical conduction MOSFET device according to a comparative example;
figure 2 illustrates a cross-section of the present silicon carbide vertical conduction MOSFET device in accordance with one embodiment;
fig. 3 shows a top view of the MOSFET device of fig. 2;
fig. 4A-4D show cross-sections of the MOSFET device of fig. 2 and 3 in subsequent fabrication steps, according to one embodiment of the present fabrication process;
fig. 5A to 5C show cross-sections of the MOSFET devices of fig. 2 and 3 in subsequent manufacturing steps, according to different embodiments of the present manufacturing process;
figure 6 illustrates a cross-section of the present silicon carbide vertical conduction MOSFET device, in accordance with various embodiments;
figure 7 illustrates a cross-section of the present silicon carbide vertical conduction MOSFET device, in accordance with various embodiments;
fig. 7A shows a top view of the MOSFET device of fig. 7;
figure 8 illustrates a cross-section of the present silicon carbide vertical conduction MOSFET device, in accordance with various embodiments; and
figure 9 illustrates a cross-section of the present silicon carbide vertical conduction MOSFET device, according to various embodiments.
Detailed Description
For example, fig. 1 shows a comparative example of a vertical conduction MOSFET device 1 in a cartesian reference frame XYZ comprising a first axis X, a second axis Y and a third axis Z.
The MOSFET device 1 is formed by a plurality of elementary cells (only a few of which are shown here) which are equal to each other and arranged in parallel in the same die, sharing a source terminal S and a drain terminal D.
The MOSFET device 1 is formed in a silicon carbide body 5 having a first surface 5A and a second surface 5B.
The body 5 houses a drain region 7, a plurality of body regions 10 and a plurality of source regions 15.
A drain region 7 (here N-type) extends between the first surface 5A and the second surface 5B of the body 5.
A drain contact region 9 of a conductive material, for example a metal or a silicide, extends over the second surface 5B of the body 5, is in direct electrical contact with the drain region 7, and forms a drain terminal D of the MOSFET device 1.
The body region 10 is P-type and extends from the first surface 5A into the body 5. Each body region 10 has between 1 x 10 17 Atom/cm 3 And 1 x 10 20 Atom/cm 3 Doping level in between, a depth between 0.3 μm and 2 μm along the third axis Z, andwidth W of second axis Y 1 。
Has a width W along a second axis Y 2 The shallow portion 22 of the drain region 7 protrudes between two adjacent body regions 10.
Width W 1 And width W 2 The sum defines the pitch of the MOSFET device 1, which in the present device is larger than 4 μm.
Body regions 10, which are for example strip-shaped or ring-shaped in top view (not shown here), also extend along the first axis X.
Source regions 15 each extending from the first surface 5A of the body 5 within a respective body region 10 and being N-shaped, having a thickness between 1 x 10 18 Atom/cm 3 And 1 x 10 20 Atom/cm 3 With a doping level in between. Each source region 15 has a width W along the second axis Y 3 And has a depth, the width W, along the third axis Z 3 Less than the width W of the corresponding body region 10 2 Which is smaller than the depth of the respective body region 10.
Each source region 15 and each shallow portion 22 of the drain region 7 laterally delimit a channel region 25 in the respective body region 10.
The MOSFET device 1 further comprises a plurality of insulated gate regions 20. The insulated gate regions 20 are each formed from: a gate insulating layer 20A, a gate conductive layer 20B and a passivation layer 28, the gate insulating layer 20A being in contact with the first surface 5A of the body 5, the gate conductive layer 20B being directly superimposed on the gate insulating layer 20A, the passivation layer 28 covering the gate conductive layer 20B and sealing the gate conductive layer 20B together with the gate insulating layer 20A. In detail, the gate insulating layer 20A of the insulated gate region 20 extends on the respective shallow portion 22 of the drain region 7, on the two channel regions 25 adjacent to the respective shallow portion 22, and partially on the two source regions 15 adjacent to the respective channel regions 25.
The gate conductive layers 20B of the insulated gate regions 20 are electrically connected in parallel in a manner not shown here to form the gate terminal G of the MOSFET device 1.
The MOSFET device 1 further comprises a plurality of body contact regions 30 and a front metallization region 33.
The body contact regions 30 are of the P + type and each extend from the first surface 5A of the body 5 within a respective source region 15, contacting a respective body region 10. Typically, in the present MOSFET device, each source region 15 accommodates more than one body contact region 30, which are arranged at a mutual distance along the first axis X of fig. 1. Furthermore, as can be seen in fig. 1, the body contact regions 30 adjacent to the source regions 15 are staggered along the second axis Y such that the body contact regions 30 are not visible in the portion of the central source region 15.
The front metallization region 33, for example of metal and/or metal suicide, forms the source terminal S of the MOSFET device 1 and extends over the first surface 5A of the body 5, in direct electrical contact with the source region 15 and the body contact region 30.
Each elementary cell of the MOSFET device 1 has a respective turn-on threshold voltage V th . In use, if the voltage V between the gate terminal G and the source terminal S GS Above threshold voltage V th The MOSFET device 1 is then in a conducting state in which the respective channel region 25 is conducting and current can flow between the source terminal S and the drain terminal D along the conducting path 18 identified by the dashed arrow in fig. 1 for clarity.
In order to obtain higher currents in the on-state, it is desirable to increase the density of elementary cells obtained in the same die, i.e. to reduce the pitch W 4 . However, reducing the pitch W 4 Which is detrimental to the MOSFET device 1. For example, the body region 10 is obtained by implanting high-energy dopant ions, for example with a maximum energy of even up to 500keV, in order to obtain a desired depth of the body region 10 (for example a maximum depth of 0.7 μm). The implantation of the energetic dopant ions causes defects in the crystal lattice of the body region 10 and, therefore, also in the crystal lattice of the channel region 25. Furthermore, the high implantation energy also results in a high lateral dispersion of the dopant ions, e.g. along the second axis Y. Thus, this high lateral dispersion causes the concentration of dopant ions in the channel region 25 to be difficult to control, and thus has high process variability, which in turn causes the turn-on threshold voltage V of the basic cell th And thus degrades the performance of the MOSFET device 1.
If the voltage V is GS Below the turn-on threshold voltageV th The MOSFET device 1 is in an off-state and the voltage V between the source terminal S and the drain terminal D is DS Is applied over the PN junction formed by the body region 10 (e.g., P-type) and the drain region 7 (e.g., N-type).
If these PN junctions are in reverse bias and in power applications the voltage V DS Very high, e.g. above 100V, a high electric field will be generated in the body 5, in particular in the shallow portion 22 of the drain region 7 near the insulated gate region 20. This high electric field results in an undesirably high leakage current that may flow in the conduction path 18 between the source terminal S and the drain terminal D. Thus, the MOSFET device 1 conducts current even in the off-state.
Furthermore, in the MOSFET device 1 in the off-state, a highest electric field value even higher than 1MV/cm is obtained at the interface between the shallow portion 22 of the drain region 7 and the insulating layer 20A of the insulating gate region 20. This determines the short lifetime of the MOSFET device 1. In fact, the high electric field values in the vicinity of the insulating material (typically silicon oxide) of the gate insulating layer 20A forming the insulated gate region 20 cause a rapid degradation thereof, resulting in a rapid degradation of the performance of the MOSFET device 1 until failure.
As will be discussed in further detail herein, various embodiments of the present disclosure overcome some or all of the disadvantages of the comparative example of fig. 1.
Fig. 2 and 3 show the vertical conduction MOSFET device 100 in a cartesian reference frame XYZ having a first axis X, a second axis Y and a third axis Z.
The MOSFET device 100 is formed by a plurality of elementary cells, only a few of which are shown in fig. 2 and 3, which are equal to each other and arranged in the same die to share a drain terminal D, a gate terminal G and a source terminal S; that is, the basic cells are electrically connected in parallel with each other.
The MOSFET device 100 is formed in a body of semiconductor material 105 having a first surface 105A and a second surface 105B.
Body 105 may be formed of a substrate or a substrate having one or more epitaxial layers grown thereon and is of silicon carbide, one of the polytypes of silicon carbide, here the 4H-SiC polytype.
The body 105 houses the drain region 7, the plurality of deep body regions 110, the plurality of shallow body regions 115 and the plurality of source regions 120.
A drain region 107 (here N-type) extends between the first surface 105A and the second surface 105B of the body 105.
A drain contact region 109 of a conductive material, such as a metal or a silicide, extends over the second surface 105B of the body 105 in direct electrical contact, in particular ohmic contact, with the drain region 107. The drain contact region 109 forms the drain terminal D of the MOSFET device 100.
The deep body region 100 is here of the P-type and at a distance from the first surface 105A of the body 105 (in particular from a body depth d of, for example, between 0.2 μm and 1 μm) b ) Extending into body 105. The deep body regions 110 each have, for example, between 1 x 10 18 Atom/cm 3 And 1 x 10 20 Atom/cm 3 Of a depth d along the third axis Z of, for example, between 0.2 μm and 1 μm db And a width W along the second axis Y having a maximum depth in the body 105, for example, of between 0.4 μm and 2 μm (in particular 0.7 μm), and a width W along the second axis Y db 。
The shallow body region 115 is here P-type and is larger than the body depth d from the first surface 105A of the body 105 b Extends into the body 105 in direct electrical contact with the respective deep body region 110.
The shallow body regions 115 each have a doping level lower than the doping level of the deep body regions 110, for example between 5 x 10 16 Atom/cm 3 And 5 x 10 17 Atom/cm 3 Doping level in between.
The shallow body regions 115 each have a depth d sb The depth may be greater than or less than (here less than) the depth d of the respective deep body region 110 db And the depth d sb Along the third axis Z, for example, between 0.3 μm and 1.5 μm, in particular 0.3 μm.
In this embodiment, the depth d of the shallow body region 115 sb Such that the deep body regions 110 each extend partially within the respective shallow body region 115.
Furthermore, the shallow body regions 115 each have a width W along the second axis Y sb The width is greater than or equal to (here greater than) the width W of the respective deep body region 110 db 。
The shallow body regions 115 each comprise channel portions 127 which extend directly below the first surface 105A of the body 105 and are bounded along the second axis Y by respective shallow portions 130 of the drain region 107 and by respective source regions 120. Each superficial portion 130 has a width W along the second axis Y sp And extends between two adjacent shallow body regions 115.
Width W of shallow portion 130 of drain region 107 sp And the width W of the shallow body region 115 sb The sum of (a) defines the pitch of the MOSFET device 100.
The source regions 120 are here N-type and each extend from the first surface 105A of the body 105 within a respective shallow body region 115.
In detail, the source regions 120 each have, for example, between 1 × 10 18 Atom/cm 3 And 1 x 10 20 Atom/cm 3 Doping level in between.
The source regions 120 each have a width W along the second axis Y s The width is smaller than the width W of the corresponding shallow body region 115 sb 。
In the present embodiment, the width W of each source region 120 s Greater than the width W of the corresponding deep body region 110 db 。
The source regions 120 each extend along the third axis Z to a depth that is less than the depth of the respective shallow body region 115. Here, the source regions 120 each extend to a body depth d b (ii) a That is, the source regions 120 each adjoin a respective deep body region 110.
As shown in the top view of the body 105 in fig. 3, the shallow body regions 115, the source regions 120 and the deep body regions 110 (the latter not shown) extend in stripes along the first axis X.
However, the deep body regions 110, the shallow body regions 115 and the source regions 120 may have different shapes in a top view, for example, may be ring-shaped, or may form rectangles or other polygons separated from each other in the body 105.
MOSFET device 100 also includes a plurality of insulated gate regions 125.
Referring again to fig. 2, the insulated gate regions 125 extend over the first surface 105A of the body 105 and are each formed from: a gate insulating layer 125A, a gate conductive layer 125B and a passivation layer 135, the gate insulating layer 125A of, for example, silicon oxide being in contact with the first surface 105A of the body 105, the gate conductive layer 125B of, for example, polysilicon directly overlying the respective gate insulating layer 125A, the passivation layer 135 covering the respective gate insulating layer 125A and the respective gate conductive layer 125B at the top and at the sides.
The gate conductive layers 125B of the insulated gate regions 125 are electrically connected in parallel in a manner not shown here, forming the gate terminal G of the MOSFET device 100.
The insulated gate regions 125 each extend over a respective shallow portion 130 of the drain region 107, over two adjacent channel portions 127 and partially over two adjacent source regions 120.
In this embodiment, the respective strip-shaped insulated gate regions 125 extend along a first axis X and at a mutual distance along a second axis Y to form elongated openings 138 that are also oriented parallel to the first axis X. In particular, the elongated opening 138 comprises first contact regions 138A and second contact regions 138B that alternate with and extend adjacent to each other along the first axis X.
MOSFET device 100 also includes a plurality of body contact regions 145 and a front metallization region 140.
The body contact regions 145 are P-type, each having, for example, between 1 x 10 19 Atom/cm 3 And 1 x 10 20 Atom/cm 3 And each extends from the first surface 105A of the body 105 within a respective source region 120 at the first contact region 138A, in direct electrical contact with the deep body region 110.
A front metallization region 140, for example a metal (possibly including a metal silicide underlayer), extends into the elongated opening 138 and over the passivation layer 135 of the insulated gate region 125. The front metallization region 140 is in direct electrical (in particular ohmic) contact with the source region 120 at the second contact region 138B and with the body contact region 145 at the first contact region 138A. The front metallization region 140 thus forms the source terminal S of the MOSFET device 100.
The body contact regions 145 short the front metallization region 140 to the source region 120 and the deep body region 110.
The MOSFET device 100 allows to obtain a high reliability. Indeed, as described in more detail below with reference to fig. 4A-4D and 5A-5C, since shallow body regions 115 have a reduced depth, these shallow body regions may be formed by implanting dopant ions having a low implantation energy. Due to the use of low implantation energies, a reduced lateral dispersion of dopant ions is obtained, and thus the concentration profile of dopant ions in the body 105 is controllable and conforms to the concentration profile established at the design stage.
As a result, the turn-on threshold voltage V of the MOSFET device 100 th Subject to lower process variability.
Furthermore, even though the deep body regions 110 are formed by implanting dopant ions at a higher implantation energy relative to the shallow body regions 115, the on-threshold voltage V of the MOSFET device 100 th Also subject to lower process variability. In fact, as described above and seen in fig. 2, the deep body regions 110 here have a smaller width than the shallow body regions 115. Thus, even if the dopant ions of the deep body region 110 undergo greater lateral dispersion, the greater lateral dispersion does not affect the doping levels of the channel portion 127 of the shallow body region 115 and the shallow portion 130 of the drain region 107.
As discussed below with reference to fig. 4A-4D and 5A-5C, the fact that the shallow body regions 115 are formed with a lower implantation energy allows the use of a thin mask for which higher lateral definition is more easily obtained.
The above means that the pitch of the MOSFET device 100 can be designed very low, for example below 4 μm, in particular between 2.5 μm and 4 μm. For example, the width W of the shallow portion 130 of the drain region 107 may be reduced sp Without causing excessive and undesirable proximity of two adjacent shallow body regions 115, thereby causing failure of the MOSFET device 100.
Reducing the pitch of the MOSFET device 100 means the possibility of designing a higher density of parallel basic cells in the same die and thus the on-state resistance of the MOSFET device 100 can be reduced.
Furthermore, the low implantation energy means that the probability of defect formation in the silicon carbide lattice portion of the body 105 where the channel portion 127 is formed is low.
Accordingly, the charge carriers in the channel portion 127 have a greater mobility, thereby ensuring good performance of the MOSFET device 100.
Furthermore, the presence of the deep body region 110 is such that, when the MOSFET device 100 is in the off-state and the voltage V between the source terminal S and the drain terminal D is DS Very high, for example even higher than 400V, the highest electric field value deep in the body 105 is obtained at a distance from the first surface 105A of the body 105.
This causes the electric field to assume a lower value in the shallow portion 130 of the drain region 107, particularly in the vicinity of the gate insulation layer 125A. Therefore, the MOSFET device 100 can have a long lifetime.
The fabrication steps of the MOSFET device 100 will be described below, in particular with reference to the formation of the deep body regions 110 and the shallow body regions 115.
Fig. 4A shows a wafer 200 of silicon carbide, here with N-type doping and a first surface 200A and a second surface 200B. A deep body mask is formed on the first surface 200A of the wafer 200, for example by known photolithography steps. The deep body mask comprises a plurality of deep body mask portions 205 each having a thickness of less than 1.5 μm, for example between 0.5 μm and 1.5 μm, which are spaced apart from each other to expose portions of the wafer 200 intended to form the deep body regions 110. A first implantation of P-type dopant ions, such as aluminum ions or boron ions, having an implantation energy between 30keV and 200keV, is performed by using a deep body mask, here indicated by a first arrow 210.
According to one embodiment, the deep body region 110 is formed by a series of subsequent P-type dopant ion implants, each having an implant energy between 30keV and 200 keV.
According to one embodiment, the wafer 200 is then subjected to an annealing step, which is useful for activating dopant ions and reducing defects in the crystal lattice that may be caused by implantation.
Subsequently, in fig. 4B, the deep body mask 205 is removed and an epitaxial layer 215 is grown on the first surface 200A of the wafer 200. The first epitaxial layer 215 is defined by a surface 215A having the same doping as the wafer 200 and having a thickness between 0.3 μm and 1 μm. The wafer 200 and the epitaxial layer 215 form a working wafer 218 corresponding to the body 105, the working wafer having a first surface corresponding to the surface 215A of the epitaxial layer 215 and therefore still indicated by 215A, and a second surface corresponding to the second surface 200B of the wafer 200 and therefore still indicated by 200B.
In fig. 4C, a shallow bulk mask is formed on surface 215A of work wafer 218, for example, by known photolithography steps.
The shallow body mask includes a plurality of shallow body mask portions 220 each having a thickness of less than 1.5 μm (e.g., between 0.5 μm and 1.5 μm), which are spaced apart from one another to expose portions of the working wafer 218 intended to form the shallow body regions 115.
Thus, the shallow body mask portion 220 has a smaller width along the second axis Y relative to the width of the deep body mask portion 205.
A second implantation of P-type dopant ions, here indicated by second arrows 225, such as aluminum ions or boron ions, having an implantation energy below 200keV, for example between 30 and 200keV, is performed by using a shallow bulk mask.
The second implant forms the shallow body region 115 and defines the shallow portion 130 of the drain region 107.
According to one embodiment, the shallow body regions 115 are formed by a series of subsequent P-type dopant ion implants, each having an implant energy between 30keV and 200 keV.
According to one embodiment, after the second implantation, the working wafer 218 is subjected to an annealing step, which is useful for activating dopant ions and reducing defects in the crystal lattice that may be caused by the second implantation.
Subsequently, in fig. 4D, a source mask is formed on the first surface 215A of the work wafer 218, for example by known photolithography steps. For example, the source mask may be formed from the shallow body mask 220 of fig. 4C in order to obtain good alignment with the previous manufacturing steps.
The source mask includes a plurality of source mask portions 230, each having a thickness less than 1.5 μm (e.g., between 0.2 μm and 1.5 μm), and spaced apart from one another to expose portions of the source region 120 intended to be formed by the working wafer 218. A third implantation of N-type dopant ions, here indicated by third arrows 235, for example nitrogen ions or phosphorus ions, with an implantation energy between 20keV and 200keV is performed by using the source mask.
The third implant forms source regions 120 and defines channel portions 127.
According to one embodiment, the source region 120 is formed by a series of subsequent implants of N-type dopant ions, each having an implant energy between 20keV and 200 keV.
According to one embodiment, after the third implant, the working wafer 218 is subjected to an annealing step, which is useful for activating dopant ions and reducing defects in the crystal lattice that may be caused by the third implant.
Subsequently, in a manner not shown here but known, an insulated gate region 125 is formed on the surface 215A of the handle wafer 218, and a body contact region 145, a front metallization region 140 and a drain contact region 109 are formed.
Other fabrication steps (e.g., dicing and electrical connection) of the work wafer 218, also known, are performed, thereby forming the MOSFET device 100.
Thus, as already discussed above, the shallow body region 115 is formed using a low implant energy. This allows both reducing lateral dispersion of dopant ions and using a thin implant mask (i.e., shallow body mask 220). The shallow body mask portion 220 thus has good lateral resolution, for example, along the second axis Y. In this way, the pitch of the MOSFET device 100 can be designed to be, for example, below 4 μm.
In addition, the deep body region 110 is also formed here by a low implantation energy. This allows for a reduction in eachLateral dispersion of dopant ions. Accordingly, the deep body region 110 may also be formed such that the corresponding width W db Is equal to the width W of the shallow body region 115 sb Without affecting the doping levels of the channel portion 127 and the shallow portion 130 of the drain region 107, thereby ensuring good performance of the MOSFET device 100, for reasons described above.
Different embodiments of the manufacturing process of the MOSFET device 100 of fig. 2 and 3 are described below with reference to fig. 5A to 5C, wherein parts common to the processes of fig. 4A to 4D are indicated by the same reference numerals.
Fig. 5A shows a working wafer 300 of silicon carbide intended to form the body 105, having a first surface 300A and a second surface 300B.
Similar to that discussed with reference to fig. 4C, a shallow body mask including a corresponding shallow body mask portion 220 is formed on the first surface 300A of the work wafer 300, and the shallow body regions 115 are formed by implantation of dopant ions.
Similar to that discussed with reference to fig. 4D, subsequently, in fig. 5B, source masks including respective source mask portions 230 are formed on the first surface 300A of the work wafer 300, and the source regions 120 are formed by implantation of dopant ions.
Then, in fig. 5C, a deep body mask, comprising respective deep body mask portions (here indicated by 305), is formed on the first surface 300A of the handle wafer 300, for example by known photolithography steps, and is shaped so as to expose portions of the handle wafer 300 intended to form the deep body regions 110.
In this embodiment, the deep body mask portions 305 each have a greater thickness (e.g., between 1.6 μm and 2 μm) than the deep body mask portion 205 of FIG. 4A.
Also here, the deep body mask portion 305 has a greater width along the second axis Y than the shallow body mask portion 220.
The deep body region 110 is formed by implantation of P-type dopant ions (here indicated by 310), such as aluminum ions or boron ions, with an implantation energy between 100keV and 1MeV, using a deep body mask.
According to one embodiment, the deep body region 110 is formed by a series of subsequent P-type dopant ion implantations, each having an implantation energy between 100keV and 1 MeV.
According to one embodiment, the deep body mask is removed and the work wafer 300 is subjected to an annealing step, which is useful for activating dopant ions and reducing defects in the crystal lattice that may be caused by the implantation of dopant ions.
After removal of the deep body mask, the insulated gate region 125, the body contact region 145, the front metallization region 140 and the drain contact region 109 are formed in a known manner.
Other fabrication steps (e.g., dicing and electrical connection) of the work wafer 300, also known, are performed, thereby forming the MOSFET device 100.
Since the width of the deep body mask portions 305 is greater than the width of the shallow body mask portions 220, the deep body mask portions 305 do not contribute to the definition of the pitch of the MOSFET device 100. Thus, the definition of the deep body mask portion 305 does not require high lateral resolution, and the fact that the deep body mask portion 305 has a greater thickness than the deep body mask portion 205 of fig. 4A does not compromise the advantages of the MOSFET device 100 discussed above.
Furthermore, the greater thickness of the deep body mask portion 305 shown in fig. 4B and the absence of a growth step of the epitaxial layer 215 simplifies the fabrication process of the MOSFET device 100.
Fig. 6 shows a different embodiment of the present MOSFET device, here indicated at 400. MOSFET device 400 has a general structure similar to MOSFET device 100 of fig. 2 and 3. Therefore, common elements are denoted by the same reference numerals and are not described in detail.
In detail, the MOSFET device 400 is formed in the body 105 and comprises a drain region 107, a deep body region 110, a shallow body region 115, a source region 120, an insulated gate region 125, a front metallization region 140 and a drain contact region 109. Also in this embodiment, the insulated gate regions 125 are each bar-shaped along a first axis X and extend a distance along a second axis Y to form an elongated opening, here indicated by 405.
MOSFET device 400 also includes a plurality of conductive regions 410 formed from front metallization region 140. Conductive regions 410 extend at elongated openings 405 through respective source regions 120, throughout their entire depth, and partially through respective deep body regions 110 toward the interior of body 105.
The conductive region 410 may extend throughout the length (along the first axis X) of the MOSFET device 400 in a manner not shown. Thus, in the present embodiment, the body contact region 145 is not present.
Thus, in the MOSFET device 400, the front metallization region 140 is in ohmic contact with both the source region 120 and the deep body region 110. Therefore, the contact resistance between the source region 120 and the deep body region 110 is low. It can thus be seen that the MOSFET device 400 can avoid undesirable voltage drops between the source region 120 and the deep body region 110 during use, thus improving the electrical performance of the MOSFET device 400.
Fig. 7 shows a different embodiment of the present MOSFET device, here indicated with 450. MOSFET device 450 has a general structure similar to MOSFET device 100 of fig. 2 and 3. Therefore, common elements are denoted by the same reference numerals and are not described in detail.
In detail, the MOSFET device 450 is formed in the body 105 and comprises a drain region 107, a deep body region 110, a shallow body region 115, an insulated gate region 125, a body contact region 145, a front metallization region 140 and a drain contact region 109. As discussed with respect to the MOSFET device 100 of fig. 2, the insulated gate region 125 also forms an elongated opening 138 therein, which includes a first contact region 138A and a second contact region 138B. The body contact region 145 extends into the body 105 at the first contact region 138A.
In this embodiment, the source region, here also N-type, indicated by 460, comprises a first portion 460A and a second portion 460B, wherein the first portion 460A has, for example, between 1 x 10 18 Atom/cm 3 And 1 x 10 20 Atom/cm 3 With a lower doping level than the first portion 460A, and the second portion 460B has a lower doping level than the first portion 460A.
In particular, in fig. 7, the first portions 460A of the source regions 460 each extend from the first surface 105A of the body 105 into the body 105 within the respective shallow body region 115 at the respective second contact region 138B, in direct electrical contact with the respective deep body region 110.
As can be seen in fig. 7A, wherein the second portion 460B of the source region 460 is separated from the first portion 460A by a dashed line for clarity, the first portion 460A of the source region 460 extends between two adjacent body contact regions 145 along the first axis X.
The second portion 460B of the source region 460 extends along the first axis X below the insulated gate region 125 on both sides of each first portion 460A of the source region 460 and each body contact region 145 along the second axis Y.
The second portions 460B of the source regions 460 also extend from the first surface 105A of the body 105 into the body 105 within the respective shallow body regions 115 and are thus arranged in an adjoining position to the respective first portions 460A, in direct electrical contact therewith.
In other words, here, the channel portions 127 are laterally delimited along the second axis Y by the second portions 460B of the respective source regions 460 and by the respective shallow portions 130 of the drain regions 107.
In this embodiment, the second portion 460B of the source region 460 has a depth along the third axis Z that is less than the first portion 460A of the source region 460.
In use, in an on-state, a conduction path of the MOSFET device 450, including the source region 460, the channel portion 127 and the drain region 107, between the source terminal S and the drain terminal D has a higher resistance relative to a conduction path of the MOSFET device 100 of fig. 2 and 3 in an on-state. In fact, the second portion 460B of the source region 460 has a lower doping level and therefore a higher resistance than the first portion 460A.
This higher resistance means a lower saturation current value and therefore less heat generation which, if excessive, can cause the MOSFET device to malfunction or even fail. Thus, the MOSFET device 450 can be integrated into an electronic device useful for power applications where it is desirable to obtain a long duration of the electronic device, even in the event of an undesirable short circuit; that is, MOSFET device 450 has a high Short Circuit Withstand Time (SCWT).
In addition, the second portion 460B of the source region 460 is formed at a smaller depth in the body 105 relative to the first portion 460A. Thus, the second portion 460B may be formed by an implantation step of dopant ions having a lower implantation energy (e.g., between 10keV and 200 keV). This lower implant energy results in less lateral dispersion of the dopant ions forming the second portion 460B of the source region 460 in the body 105. Accordingly, the doping level of the channel portion 127 arranged laterally to the second portion 460B of the source region 460 at an adjoining position along the second axis Y is less affected by the step of forming the second portion 460B of the source region 460.
Fig. 8 shows another embodiment of the present MOSFET device, here designated 500. MOSFET device 500 has a general structure similar to the combination of MOSFET device 400 of fig. 6 and MOSFET device 450 of fig. 7. Accordingly, portions common to the elements are indicated by the same reference numerals and will not be further described.
The MOSFET device 500 is formed in the body 105 and comprises a drain region 107, a deep body region 110, a shallow body region 115, an insulated gate region 125, a front metallization region 140 and a drain contact region 109.
The insulated gate regions 125 also form elongated openings 405 therein.
Also in this embodiment, the source region, indicated by 510, comprises a first portion 510A and a second portion 510B, wherein the second portion 510B has a lower doping level than the first portion 510A.
Further, the front metallization region 140 has a plurality of conductive portions 515 similar to the conductive portions 410 of the MOSFET device 400 of fig. 6. Conductive portions 515 extend at elongated openings 405, through first portions 510A of respective source regions 510 and partially through respective deep body regions 110 towards the interior of body 105.
Again, the body contact regions 145 are not present.
The second portion 510B of the source region 510 thus extends below the insulated gate region 125 along the first axis X in direct electrical contact with the first portion 510A of the source region 510 on both sides thereof. Thus, also here, the second portions 510B of the source regions 510 each define a respective channel portion 127 on one side.
Thus, in use, the MOSFET device 500 has both the following relative to the MOSFET device 100 of fig. 2-3: high short circuit withstand times as discussed above with reference to the MOSFET device 450 of fig. 7, and low contact resistance between the front metallization region 140 and the deep body region 110 as discussed above with reference to the MOSFET device 400 of fig. 6.
Fig. 9 shows a different embodiment of the present MOSFET device, here indicated at 550. MOSFET device 550 has a general structure similar to MOSFET device 100 of fig. 2 and 3. Therefore, common elements are denoted by the same reference numerals and are not described in detail.
In detail, MOSFET device 550 is formed in body 105 and includes drain region 107, shallow body region 115, source region 120, insulated gate region 125, body contact region 145, front metallization region 140, and drain contact region 109.
In this embodiment, the deep body regions, indicated by 560, each include a first portion 560A and a second portion 560B.
First portion 560A has a depth d from the body b Extending directly into body 105 below source region 120. The first portion 560A has, for example, between 1 x 10 18 Atom/cm 3 And 1 x 10 19 Atom/cm 3 With a doping level in between.
The second portions 560B each extend at the bottom of the respective first portion 560A and at an adjoining location (i.e., at a greater depth along the third axis Z) to the respective first portion 560A. The second portion 560B has, for example, between 1 x 10 with respect to the first portion 560A 17 Atom/cm 3 And 1 x 10 18 Atom/cm 3 Lower doping levels in between.
In use, in the off-state, MOSFET device 550 is capable of withstanding a high voltage V between source terminal S and drain terminal D DS . In fact, since the second portion 560B of the deep body region 560 has a lower doping level relative to the first portion 560A of the deep body region 560, the voltage V DS A depletion region is formed that extends both inside the second portion 560B and inside the drain region 107. Thus, there is a first portion 560A and a second portion 560B and 560B of the respective source region 120, the respective deep body region 560, respectivelyEach N +/P/N structure formed by drain region 107 has a higher breakdown voltage relative to MOSFET device 100 of fig. 2 and 3.
It will be clear to those skilled in the art that MOSFET device 400, device 450, device 500, and device 550 may be fabricated in a manner similar to MOSFET device 100 already discussed with reference to fig. 4A-4D and/or fig. 5A-5C, and therefore will not be described further herein.
Finally, it is clear that modifications and variations can be made to MOSFET device 100, device 400, device 450, device 500 and device 550 and to the manufacturing processes described and illustrated herein, without departing from the scope of protection of the present disclosure, as defined in the annexed claims.
For example, the different described embodiments may be combined to provide further solutions.
Furthermore, the conductivity types of the drain region 107, the source regions 120, 460, 510, the deep body regions 110, 560 and the shallow body region 115 may be interchanged.
For example, in the manufacturing process described with reference to fig. 4A to 4D and 5A to 5C, the annealing step may be performed only once after the dopant ion implantation resulting in the formation of the deep body region, the shallow body region and the source region. This results in a reduction of the manufacturing costs of the corresponding MOSFET device and ensures a correct activation of the dopant ions and a reduction of lattice defects caused by the implantation.
The vertical conduction MOSFET device (100, 400, 450, 500, 550) can be generalized to include: a silicon carbide body (105) having a first conductivity type and a face (105A); a shallow body region (115) of the second conductivity type having a first doping level, the shallow body region extending from a face of the body into the body along a first direction (Z) to a first depth (d) sb ) And has a first width (W) in a second direction (Y) sb ) The second direction is transverse to the first direction; a source region (120) of the first conductivity type extending from the face of the body to a second depth (d) along the first direction towards the interior of the shallow body region b ) And has a second width (W) in a second direction s ) Wherein the second depth is less than the first depth and the second width is less than the first width; a deep body region (110) of a second conductivity type,having a second doping level, the deep body region extending into the body at a distance from the face of the body and being in direct electrical contact with the shallow body region, wherein the second doping level is higher than the first doping level.
The first doping level may be comprised in 5 x 10 16 Atom/cm 3 And 5 x 10 17 Atom/cm 3 And the second doping level may be comprised between 1 x 10 18 Atom/cm 3 And 1 x 10 20 Atom/cm 3 In between.
The deep body region may extend from the second depth to a third depth, the third depth being greater than the second depth.
The third depth may be greater than the first depth.
The source regions (460, 510) may laterally bound a channel portion (127) of the shallow body region (115) and may comprise a terminal contact portion (460A, 510A) and a channel contact portion (460B, 510B), the terminal contact portion having a third doping level and extending within the shallow body region from a face of the body to a second depth along the first direction; the channel contact portion has a fourth doping level lower than the third doping level and extends within the shallow body region from the face of the body at an adjoining location to and in direct electrical contact with the respective terminal contact portion on the first side and at an adjoining location to and in direct electrical contact with the channel portion on the second side.
The MOSFET device can further include a body contact region (145) having the second conductivity type and extending from the face of the body to a second depth along the first direction within the source region in direct electrical contact with the deep body region, the source region laterally surrounding the body contact region.
The source regions (460, 510) may laterally define a channel portion (127) of the shallow body region (115) and may include a channel contact portion (460B, 510B) extending from a face of the body within the shallow body region at an adjacent location to and in direct electrical contact with the body contact region on a first side and at an adjacent location to the channel portion and in direct electrical contact with the channel portion on a second side.
The MOSFET device can further include a metallization region extending over a face of the body and having a body contact portion (410, 515) extending within the body (105) through the source region and partially inward of the deep body region, the source region laterally surrounding the body contact portion, the body contact portion being in ohmic contact with the deep body region and the source region.
The channel contact portion of the source region may extend into the shallow body region (115) along the first direction to a fourth depth, the fourth depth being less than the second depth.
The deep body region (560) may comprise a first portion (560A) and a second portion (560B), the first portion having a second doping level and extending into the body at a distance from the face of the body, and the second portion having a fifth doping level, the fifth doping level being lower than the second doping level, the second portion of the deep body region extending into the body (105) along the first direction (Z) at a depth greater than the first portion of the deep body region and being in direct electrical contact with the first portion of the deep body region.
The shallow body region may be a first shallow body region, the source region may be a first source region, and the deep body region may be a first deep body region, further comprising: a second shallow body region, a second source region and a second deep body region. The second and first shallow body regions laterally define bodies (105) having a fourth width (W) along the second direction (Y) sp ) The superficial portion (130).
A process for fabricating a vertical conduction MOSFET device from a silicon carbide working body (218, 300) having a first conductivity type and a face (215A, 300A) can be summarized as: forming a shallow body region (115) of the second conductivity type in the working body, the shallow body region having a first doping level, the shallow body region extending from a face of the working body in a first direction (Z) to a first depth (d) sb ) And has a first width (W) in a second direction (Y) sb ) The second direction is transverse to the first direction; forming source regions (120) of the first conductivity type in the shallow body regions, the source regions extending from the face of the active body in the first direction to a second depth (d) b ) And has a second width (W) in a second direction s ) Wherein the firstThe second depth is less than the first depth and the second width is less than the first width; and forming a deep body region (110) of the second conductivity type in the active body at a distance from the face of the body, the deep body region having a second doping level, the deep body region being in direct electrical contact with the shallow body region (115), wherein the second doping level is higher than the first doping level.
Forming the deep body region from a silicon carbide wafer (200) having a first conductivity type and a face (200A) may include: implanting first dopant ions on a face of the wafer using a first mask (205); growing an epitaxial layer (215) on a face of a silicon carbide wafer to form a working body (218); and forming the shallow body region includes implanting second dopant ions (220) on the face of the working body using a second mask.
The first and second dopant ions may be implanted using an implantation energy between 30keV and 200 keV.
Forming the deep body region may include implanting first dopant ions on a face (300A) of the working body (300) using a first mask (305) and an implantation energy between 100keV and 1 MeV; and forming the shallow body region includes implanting second dopant ions on the face of the working body using a second mask (220) and an implantation energy between 30keV and 200 keV.
The first mask and the second mask may each include a respective portion, the portion of the first mask having a greater width in the second direction (Y) relative to the portion of the second mask.
The various embodiments described above can be combined to provide further embodiments. These and other changes can be made to the embodiments in light of the above detailed description. In general, in the following claims, the terms used should not be construed to limit the claims to the specific embodiments disclosed in the specification and the claims, but should be construed to include all possible embodiments along with the full scope of equivalents to which such claims are entitled. Accordingly, the claims are not limited by the disclosure.

Claims (15)

1. A vertical conduction MOSFET device, comprising:
a body of silicon carbide having a first conductivity type and a face;
a shallow body region of a second conductivity type having a first doping level, the shallow body region extending into the body from the face of the body along a first direction to a first depth and having a first width along a second direction, the second direction being transverse to the first direction;
a source region of the first conductivity type extending from the face of the body in the first direction toward an interior of the shallow body region to a second depth and having a second width in the second direction, wherein the second depth is less than the first depth and the second width is less than the first width; and
a deep body region of the second conductivity type having a second doping level, the deep body region extending into the body at a distance from the face of the body and being in direct electrical contact with the shallow body region, wherein the second doping level is higher than the first doping level.
2. The MOSFET device of claim 1, wherein the first doping level is at 5 x 10 16 Atom/cm 3 And 5 x 10 17 Atom/cm 3 And the second doping level is 1 x 10 18 Atom/cm 3 And 1 x 10 20 Atom/cm 3 In the meantime.
3. The MOSFET device of claim 1, wherein the deep body region extends from the second depth to a third depth, the third depth being greater than the second depth.
4. The MOSFET device of claim 3, wherein the third depth is greater than the first depth.
5. The MOSFET device of claim 1, wherein the source region laterally bounds a channel portion of the shallow body region and includes a terminal contact portion and a channel contact portion, the terminal contact portion having a third doping level and extending within the shallow body region from the face of the body to the second depth along the first direction, the channel contact portion having a fourth doping level and extending within the shallow body region from the face of the body at a location contiguous with and in direct electrical contact with a respective the terminal contact portion on a first side and at a location contiguous with and in direct electrical contact with the channel portion on a second side, the fourth doping level being lower than the third doping level.
6. The MOSFET device of claim 1, further comprising a body contact region of the second conductivity type and extending from the face of the body along the first direction to the second depth within the source region in direct electrical contact with the deep body region, the source region laterally surrounding the body contact region.
7. The MOSFET device of claim 6, wherein the source region laterally defines a channel portion of the shallow body region and includes a channel contact portion extending from the face of the body within the shallow body region on a first side in contiguous location with the body contact region and in direct electrical contact with the body contact region, and on a second side in contiguous location with the channel portion and in direct electrical contact with the channel portion.
8. The MOSFET device of claim 1, further comprising a metallization region extending over the face of the body and having a body contact portion extending within the body through the source region and partially inward of the deep body region, the source region laterally surrounding the body contact portion, the body contact portion being in ohmic contact with the deep body region and the source region.
9. The MOSFET device of claim 5, wherein the channel contact portion of the source region extends into the shallow body region along the first direction to a fourth depth, the fourth depth being less than the second depth.
10. The MOSFET device of claim 1, wherein the deep body region includes a first portion and a second portion, the first portion having the second doping level and extending into the body at a distance from the face of the body, and the second portion having a fifth doping level, the fifth doping level being lower than the second doping level, the second portion of the deep body region extending into the body along the first direction at a depth greater than the first portion of the deep body region and being in direct electrical contact with the first portion of the deep body region.
11. The MOSFET device of claim 1, wherein the shallow body region is a first shallow body region, the source region is a first source region, and the deep body region is a first deep body region, the MOSFET device further comprising: a second shallow body region, a second source region, and a second deep body region, the second shallow body region and the first shallow body region laterally bounding a shallow portion of the body having a fourth width along the second direction.
12. A device, comprising:
a silicon carbide substrate having a first conductivity type and a first surface;
a shallow body region of a second conductivity type, the shallow body region having a first doping level and extending into the substrate from the first surface along a first direction to a first depth, the shallow body region having a first width along a second direction, the second direction being transverse to the first direction;
a source region of the first conductivity type extending from the first surface into the shallow body region along the first direction to a second depth, the source region having a second width along the second direction, wherein the second depth is less than the first depth and the second width is less than the first width; and
a deep body region of the second conductivity type and having a second doping level greater than the first doping level, the deep body region being spaced from the first surface by the source region and being in direct contact with the shallow body region.
13. The device of claim 12, wherein the first doping level is 5 x 10 16 Atom/cm 3 And 5 x 10 17 Atom/cm 3 And the second doping level is 1 x 10 18 Atom/cm 3 And 1 x 10 20 Atom/cm 3 In between.
14. The device of claim 12, wherein the shallow body region at least partially surrounds the source region and the deep body region.
15. The device of claim 12, further comprising a metallization region on the first surface and having a body contact portion extending through the source region into the substrate and at least partially into the deep body region, the source region laterally surrounding the body contact portion, the body contact portion being in ohmic contact with the deep body region and the source region.
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