CN217183001U - Charging equalization circuit and charging equalization system - Google Patents
Charging equalization circuit and charging equalization system Download PDFInfo
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- CN217183001U CN217183001U CN202220627635.4U CN202220627635U CN217183001U CN 217183001 U CN217183001 U CN 217183001U CN 202220627635 U CN202220627635 U CN 202220627635U CN 217183001 U CN217183001 U CN 217183001U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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- Y02E60/10—Energy storage using batteries
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Abstract
The utility model relates to an equalizer circuit technical field discloses a charge equalizer circuit and charge equalizing system, include: the external bypass sub-circuits correspond to the battery packs one by one, and each external bypass sub-circuit comprises a bypass field effect tube which is used for conducting the external bypass sub-circuit in a preset voltage range; the input filter sub-circuits correspond to the battery packs one by one; the power monitoring and controlling sub-circuit comprises a lithium battery power monitoring chip, and a voltage measuring pin of the lithium battery power monitoring chip is connected with an on-chip field effect transistor. The utility model discloses a through forming the equalizer circuit who has two bypasses, can carry out the equilibrium through another bypass when one of them bypass became invalid, have higher reliability; meanwhile, the arrangement of the double bypasses can form larger balance current, so that the balance of the electric quantity among the batteries can be quickly realized in a short time, and the charging efficiency is effectively improved.
Description
Technical Field
The utility model relates to an equalizer circuit technical field especially relates to a charge equalizer circuit and charge equalization system.
Background
With the development of lithium battery technology and the gradual improvement of the technology, the lithium battery is widely applied in products such as electric scooters, sweeping robots, portable electric hand drills and the like.
In practical applications of lithium batteries, a plurality of single lithium batteries are connected in series to form a lithium battery pack, so as to meet practical voltage requirements. However, in the process of charging the lithium battery pack, due to the self-discharge, the capacity and the impedance of each single battery are different, the charging state of each single battery is different, some single batteries are fully charged, some single batteries need to be charged continuously, and if the charger stops charging only according to the total charging voltage, some single batteries may be insufficiently charged and some single batteries may be overcharged. In order to correct the imbalance of the charging capacity and achieve the purpose that all the batteries are fully charged at the end of charging, it is necessary to introduce a charging capacity equalization circuit during the charging process.
The equalizing circuit mainly applies bypass shunt current, and when charging, the bypass shunt current can bypass the overcharged battery to continuously charge the battery which is not fully charged.
An existing equalization circuit is adjusted through a bypass FET (field effect transistor) as shown in fig. 1, each battery is connected to a chip electricity quantity sampling port after passing through a filter resistor and a filter capacitor, an FET is arranged in a chip, the controlled voltage and the electricity quantity of the FET are always in positive correlation with the voltage. When the voltage of the battery is high enough to turn on the internal FET, the FET turns on, and the charge balance circuit functions at this time, thereby equalizing the charge of the battery to some extent. However, due to the existence of the filter resistor, in order to ensure more accurate voltage sampling, the filter resistor cannot be too small, and the filter resistor is connected in series in the equalization loop to cause smaller equalization current, when a larger capacity difference exists between the batteries, the equalization current of the bypass only needs to compensate the electric quantity, longer charging time is needed, and the charging equalization efficiency is lower. Meanwhile, once the bypass fails, the charging balance of the battery pack fails, and the reliability is not high.
SUMMERY OF THE UTILITY MODEL
Not enough to prior art, the utility model provides a charge equalizer circuit and charge equalizing system solves the equalizer circuit among the prior art and leads to the lower and not high problem of reliability of charge efficiency of lithium cell group.
In order to achieve the above object, the present invention provides the following technical solutions:
a charge equalization circuit for achieving charge equalization of a plurality of battery packs, the charge equalization circuit comprising:
the external bypass sub-circuits correspond to the battery packs one by one, the first ends of the external bypass sub-circuits are connected to the anodes of the corresponding battery packs, and the second ends of the external bypass sub-circuits are connected to the cathodes of the corresponding battery packs; the external bypass sub-circuit comprises a bypass field effect transistor for turning on the external bypass sub-circuit in a predetermined voltage range;
the input filter sub-circuits correspond to the battery packs one by one; a first end of the input filter sub-circuit is connected to a first end of the corresponding external bypass sub-circuit, and a second end of the input filter sub-circuit is connected to a second end of the corresponding external bypass sub-circuit;
electric quantity monitoring and control sub-circuit, including lithium cell electric quantity monitoring chip, lithium cell electric quantity monitoring chip include with the voltage measurement foot of a plurality of group battery one-to-ones, the voltage measurement foot is connected with field effect transistor in the chip, the drain electrode of field effect transistor is connected in the first end of outside bypass sub-circuit in the chip, the source electrode of field effect transistor in the chip connect in the second end of outside bypass sub-circuit.
Optionally, the external bypass sub-circuit further includes a current-limiting resistor, a first end of the current-limiting resistor is connected to the anode of the corresponding battery pack, and a second end of the current-limiting resistor is connected to the drain of the bypass field-effect transistor;
and the source electrode of the bypass field effect transistor is connected to the negative electrode of the corresponding battery pack.
Optionally, the input filter sub-circuit includes a filter resistor and a filter capacitor, a first end of the filter resistor is connected to a first end of the current-limiting resistor, and a second end of the filter resistor and a first end of the filter capacitor are connected to a drain of the on-chip fet after being connected in common;
and the second end of the filter capacitor is connected to the source electrode of the field effect tube in the chip.
Optionally, the second end of the filter capacitor is connected to the filter resistor in the adjacent input filter sub-circuit, and is connected to the source of the on-chip fet;
the adjacent input filtering sub-circuits are: and the input filter subcircuit corresponds to the battery pack which is connected in series with the corresponding battery pack.
Optionally, the charge equalization circuit further includes an external protection sub-circuit for limiting a driving signal of the bypass fet, and the external protection sub-circuit is connected between the external bypass sub-circuit and the input filter sub-circuit.
Optionally, the external protection sub-circuit comprises a zener diode and a driving resistor;
the cathode of the voltage stabilizing diode is connected with the first end of the driving resistor in common and is connected to the grid electrode of the bypass field effect transistor, the anode of the voltage stabilizing diode is connected to the cathode of the corresponding battery pack, and the second end of the driving resistor is connected to the second end of the filter capacitor.
Optionally, the zener diode is of type MMSZ 5232.
Optionally, the bypass fet is DMG2302, and the on-chip fet is PQ 29330.
The utility model also provides a charge equalization system, which comprises a plurality of battery packs and charge equalization circuits corresponding to the battery packs one by one;
the charge equalization circuit is as described in any one of the above.
Compared with the prior art, the utility model discloses following beneficial effect has:
the utility model provides a charge equalization circuit and charge equalization system, which forms an equalization circuit with double bypasses, when one bypass fails, the equalization can be carried out through the other bypass, and the charge equalization circuit has higher reliability; meanwhile, the arrangement of the double bypasses can form larger balance current, so that the balance of the electric quantity among the batteries can be quickly realized in a short time, and the charging efficiency is effectively improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without inventive exercise.
Fig. 1 is a schematic structural diagram of a conventional lithium battery pack charging power equalization circuit;
fig. 2 is a schematic current diagram of a field effect transistor inside a chip during a charging process of a conventional lithium battery pack charging power equalizing circuit;
fig. 3 is a block diagram of a charge equalization circuit according to the present invention;
fig. 4 is a schematic circuit diagram of a charge equalization circuit according to the present invention;
fig. 5 is a schematic diagram of a current when the fet in the chip is turned on during the charging process of the charge equalization circuit according to the present invention;
fig. 6 is a schematic circuit diagram of a charge equalization circuit according to the present invention.
In the above figures: 10. a battery pack; 20. an external bypass sub-circuit; 30. an input filter sub-circuit; 40. a power monitoring and control sub-circuit; 50. an external protection sub-circuit.
Detailed Description
In order to make the objects, features and advantages of the present invention more obvious and understandable, the embodiments of the present invention are clearly and completely described with reference to the drawings in the embodiments of the present invention, and obviously, the embodiments described below are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
In the description of the present invention, it is to be understood that when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. When a component is referred to as being "disposed on" another component, it can be directly on the other component or intervening components may also be present.
Furthermore, the terms "long", "short", "inner", "outer", and the like indicate orientations or positional relationships based on the orientations or positional relationships illustrated in the drawings, and are only for convenience of describing the present invention, but do not indicate or imply that the device or element referred to must have the specific orientation, operate in the specific orientation configuration, and thus, should not be construed as limiting the present invention.
The technical solution of the present invention is further explained by the following embodiments with reference to the accompanying drawings.
Referring to fig. 1, in the conventional lithium battery pack charging capacity equalization circuit, each battery pack is respectively connected to a battery voltage pin of U1 through filters respectively formed by resistors R1, R2, R3 and capacitors C1, C2, and C3. U1 is a lithium battery protection and electric quantity monitoring chip, each voltage measurement pin of which is connected with a field effect transistor inside the chip, such as Q1, Q2 and Q3 in the figure; when the battery voltage on the pin of the field effect transistor inside the chip is higher than the on-state voltage of the field effect transistor inside the chip and the current state is in a charging state, the field effect transistor inside the chip can be automatically turned on or turned off according to the sampled electric quantity of each battery.
The charging capacity equalizing circuit of the conventional lithium battery pack has the defects that because the field effect transistor inside the chip is introduced, and because the filter resistor and the conduction voltage drop of the field effect transistor inside the chip exist, the equalizing current is very small, and the equalizing effect on a large-capacity battery is not obvious.
As shown in fig. 2, fig. 2 is a schematic current diagram of the fet inside the chip during the charging process. When the charged capacity of BAT2 is high in the figure, the electric quantity detection in the chip turns on the field effect transistor Q2 in the chip, so that part of the current flows through the BAT2 battery, and part of the current flows through the bypass, flows through the R2, Q2 and R3, and then enters the positive electrode of BAT3 to be charged.
In fig. 2, the magnitude of the current I1 is I2+ I3 is I4. It can be understood that the charging current I2 obtained by the BAT2 is smaller than the charging currents I1 and I4, so that the charging speed of the battery with large electric quantity can be lowered, the charging speed of the battery with small electric quantity can be raised, the electric quantity balance among the batteries can be finally realized, and the situation that the battery with large electric quantity is overcharged and the battery with small electric quantity is not fully charged can be avoided.
At this time, the on-resistance rds (on) of Q2 is 330 ohms, and when the battery voltage is 3.7V, we can calculate the following equalizing current magnitude of I3: 3.7/(100+330+100) ═ 6.98 mA. When the capacity of the battery is 2000mAh, and the battery with high capacity has 10% capacity difference, the required equalizing charge time is as follows: 2000mAh 10%/6.98 mA 28.65h, that is, the current-equalizing charging network is required to last 28.65 hours to achieve equalization between batteries, which is difficult to adapt to some application scenarios that equalization needs to be achieved as soon as possible, and once the filter resistance is adjusted, the filtering effect is affected, and then the electric quantity detection effect is affected.
Based on the defects of the prior art, the present application provides a charge equalization circuit for realizing equalization of a plurality of battery packs.
Referring to fig. 3 and fig. 4, the charge equalization circuit includes:
the external bypass sub-circuits 20 correspond to the battery packs 10 one by one, a first end of each external bypass sub-circuit 20 is connected to a positive electrode of the corresponding battery pack 10, and a second end of each external bypass sub-circuit 20 is connected to a negative electrode of the corresponding battery pack 10; the external bypass sub-circuit 20 comprises a bypass fet for switching on the external bypass sub-circuit 20 at a predetermined voltage range.
An input filter sub-circuit 30 corresponding to the plurality of battery packs 10 one to one; a first terminal of the input filter sub-circuit 30 is connected to a first terminal of the corresponding external bypass sub-circuit 20, and a second terminal of the input filter sub-circuit 30 is connected to a second terminal of the corresponding external bypass sub-circuit 20.
The electric quantity monitoring and control sub-circuit 40 comprises a lithium battery electric quantity monitoring chip, wherein the lithium battery electric quantity monitoring chip comprises voltage measuring pins in one-to-one correspondence with the plurality of battery packs 10, the voltage measuring pins are connected with field effect transistors in the chip, the drain electrodes of the field effect transistors in the chip are connected to the first end of the external bypass sub-circuit 20, and the source electrodes of the field effect transistors in the chip are connected to the second end of the external bypass sub-circuit 20. Wherein the type of the field effect tube in the chip is PQ 29330. The power monitoring and control sub-circuit 40 has a function of automatically monitoring the power of the battery, and is capable of counting the voltage of the monitored battery, estimating the power value of each battery, and turning on or off the field effect transistor in the chip to start the charge power equalization.
By arranging the external bypass sub-circuit 20 to add a bypass, the reliability of the equalization circuit is improved, and the equalization current can be increased to accelerate the circuit equalization among the batteries.
Further, the external bypass sub-circuit 20 further includes a current-limiting resistor, a first end of the current-limiting resistor is connected to the anode of the corresponding battery pack 10, and a second end of the current-limiting resistor is connected to the drain of the bypass fet; the source of the bypass fet is connected to the negative electrode of the corresponding battery pack 10.
In this embodiment, the input filter sub-circuit 30 includes a filter resistor and a filter capacitor, a first end of the filter resistor is connected to a first end of the current-limiting resistor, and a second end of the filter resistor and a first end of the filter capacitor are connected to a drain of the on-chip fet after being connected together; the second end of the filter capacitor is connected to the source electrode of the field effect tube in the chip.
Specifically, the second end of the filter capacitor is connected to the filter resistor in the adjacent input filter sub-circuit 30, and is connected to the source of the on-chip fet; the adjacent input filter sub-circuits 30 are: the input filter sub-circuit 30 corresponding to the battery pack 10 connected in series with the corresponding battery pack 10.
As shown in fig. 4, the input filter sub-circuit 30 of the battery pack BAT11 includes a filter resistor R11 and a filter capacitor C11, wherein the resistance of the filter resistor R11 is 1k Ω, and the capacitance of the filter capacitor C11 is 0.1uf, so as to form a low-pass filter with a cutoff frequency of F ═ 1/(2 ═ pi ═ R ═ C) ═ 1.592 k. The filter has lower cut-off frequency and better anti-interference performance, can provide more accurate voltage signals for monitoring the post-stage electric quantity, and has better filtering effect.
Taking the charge equalization circuit corresponding to the battery pack BAT11 as an example, the external bypass sub-circuit 20 includes a current limiting resistor R15 and a bypass fet Q14, and Q14 has a low on-voltage and a low on-impedance, and in one embodiment, the bypass fet Q14 can be turned on when Vgs is 1V, so that the charge equalization circuit can be inserted as early as possible during charging. The current limiting resistor R15 is adjusted according to actual needs, so as to adjust the magnitude of the equalizing current.
As shown in fig. 5, fig. 5 shows the equalizing current flowing when the on-chip fet Q12 corresponding to the 2-cell battery BAT1 is turned on. In the charging process, when the electric quantity of the battery pack BAT12 is high, the on-chip field effect transistor Q12 is triggered to be conducted, the electric quantity is started to be balanced, and the current of the I3 flows to the anode of the battery pack BAT13 after flowing through the filter resistor R12, the internal on-chip field effect transistor Q12 and the filter resistor R13.
Assuming that the voltage of the battery pack BAT12 is equal to 3.7V at this time, the voltage at R13 is obtained by dividing: (3.7/(1000+330+1000)) × 1000 ═ 1.5V, and this voltage will turn on the shunt fet Q15 corresponding to the battery pack BAT12, so that an external equalizing current intervenes.
In one embodiment, the shunt fet Q15 is DMG2302, and the resistance rds (on) between the drain and source is 120 milliohms when conducting, which is negligible, resulting in an I5 equilibrium current of about 3.7/50 to 74 mA.
Assuming that the battery capacity is 2000mAh, and the capacity difference of 10% occurs with the battery with high capacity, the required equalizing charge time is: 2000mAh 10%/74 mA 2.7 h. Namely, the equalization can be completed in only 2.7 hours, the equalization time is greatly shortened, the equalization speed is high, and the application range is wider.
Further, in the present embodiment, the charge equalization circuit further includes an external protection sub-circuit 50, and the external protection sub-circuit 50 is connected between the external bypass sub-circuit 20 and the input filter sub-circuit 30.
Wherein, the external protection sub-circuit 50 includes a voltage regulator diode and a driving resistor; the cathode of the voltage-stabilizing diode is connected with the first end of the driving resistor in common and is connected to the grid of the bypass field effect transistor, the anode of the voltage-stabilizing diode is connected to the corresponding cathode of the battery pack 10, and the second end of the driving resistor is connected to the second end of the filter capacitor. The external protection sub-circuit 50 is used for limiting the amplitude of the driving signal of the bypass fet, so as to prevent the bypass fet from being damaged due to too high driving voltage.
As shown in fig. 6, when 10 single batteries are connected in series, the bypass fet is subjected to high voltage impact at the instant of the output short circuit of the high voltage equalizer circuit; the voltage stabilizing diode can effectively clamp under the working condition, and the driving voltage for driving the bypass field effect transistor is limited within the range of the voltage stabilizing value.
Specifically, the model of the zener diode is MMSZ5232, and the zener diode has a zener value of 5.6V.
The charge equalization circuit provided in the embodiment has the following advantages:
(1) the arrangement of the double bypasses can ensure that the balance is effective, and when the external bypass fails, the original bypass can play a balance role;
(2) a large equalizing current is formed in the charging process, and the equalization of the electric quantity among the batteries can be quickly realized in a short time;
(3) an external protection sub-circuit 50 is added, so that initial power-on impact can be effectively prevented, and a field effect tube can be effectively protected when a short circuit condition occurs;
(4) the magnitude of the balance current can adjust the current-limiting resistor according to the requirement without influencing voltage sampling.
Based on the foregoing embodiment, the present invention further provides a charge equalization system, which includes a plurality of battery packs 10 and charge equalization circuits corresponding to the plurality of battery packs 10 one to one; the charge equalization circuit is a charge equalization circuit as in any one of the above.
The above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.
Claims (10)
1. A charge equalization circuit for performing charge equalization of a plurality of battery packs, the charge equalization circuit comprising:
the external bypass sub-circuits correspond to the battery packs one by one, the first ends of the external bypass sub-circuits are connected to the anodes of the corresponding battery packs, and the second ends of the external bypass sub-circuits are connected to the cathodes of the corresponding battery packs; the external bypass sub-circuit comprises a bypass field effect transistor for turning on the external bypass sub-circuit in a predetermined voltage range;
the input filter sub-circuits correspond to the battery packs one by one; a first end of the input filter sub-circuit is connected to a first end of the corresponding external bypass sub-circuit, and a second end of the input filter sub-circuit is connected to a second end of the corresponding external bypass sub-circuit;
electric quantity monitoring and control sub-circuit, including lithium cell electric quantity monitoring chip, lithium cell electric quantity monitoring chip include with the voltage measurement foot of a plurality of group battery one-to-ones, the voltage measurement foot is connected with field effect transistor in the chip, the drain electrode of field effect transistor is connected in the first end of outside bypass sub-circuit in the chip, the source electrode of field effect transistor in the chip connect in the second end of outside bypass sub-circuit.
2. The charge equalization circuit of claim 1, wherein the external bypass sub-circuit further comprises a current limiting resistor, a first end of the current limiting resistor is connected to the anode of the corresponding battery pack, and a second end of the current limiting resistor is connected to the drain of the bypass fet;
and the source electrode of the bypass field effect transistor is connected to the negative electrode of the corresponding battery pack.
3. The charge equalization circuit of claim 2, wherein the input filter sub-circuit comprises a filter resistor and a filter capacitor, a first end of the filter resistor is connected to a first end of the current limiting resistor, and a second end of the filter resistor and a first end of the filter capacitor are connected to a drain of the on-chip fet after being connected in common;
and the second end of the filter capacitor is connected to the source electrode of the field effect tube in the chip.
4. The charge equalization circuit of claim 3 wherein the second terminal of the filter capacitor is connected in common with the filter resistor in the adjacent input filter sub-circuit and to the source of the on-chip FET.
5. The charge equalization circuit of claim 4, wherein the adjacent input filter subcircuit is: and the input filter subcircuit corresponds to the battery pack which is connected in series with the corresponding battery pack.
6. The charge equalization circuit of claim 4 further comprising an external protection sub-circuit for clipping the drive signal of the bypass fet, the external protection sub-circuit being connected between the external bypass sub-circuit and the input filter sub-circuit.
7. The charge equalization circuit of claim 6 wherein the external protection subcircuit comprises a zener diode and a drive resistor;
the cathode of the voltage stabilizing diode is connected with the first end of the driving resistor in common and is connected to the grid electrode of the bypass field effect transistor, the anode of the voltage stabilizing diode is connected to the cathode of the corresponding battery pack, and the second end of the driving resistor is connected to the second end of the filter capacitor.
8. The charge equalization circuit of claim 7 wherein said zener diode is of the type MMSZ 5232.
9. The charge equalization circuit of claim 1 wherein said bypass fet is of the type DMG2302 and said on-chip fet is of the type PQ 29330.
10. A charge equalization system is characterized by comprising a plurality of battery packs and charge equalization circuits in one-to-one correspondence with the battery packs;
the charge equalization circuit is the charge equalization circuit of any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220627635.4U CN217183001U (en) | 2022-03-22 | 2022-03-22 | Charging equalization circuit and charging equalization system |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202220627635.4U CN217183001U (en) | 2022-03-22 | 2022-03-22 | Charging equalization circuit and charging equalization system |
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| CN217183001U true CN217183001U (en) | 2022-08-12 |
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| CN202220627635.4U Active CN217183001U (en) | 2022-03-22 | 2022-03-22 | Charging equalization circuit and charging equalization system |
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