SUMMERY OF THE UTILITY MODEL
The present disclosure provides a network transformer and a network coupling circuit.
According to an aspect of the present disclosure, there is provided a network transformer comprising:
the two ends of the first winding of the pulse transformer are used as the first end of the network transformer, the two ends of the second winding of the pulse transformer are used as the second end of the network transformer, the first end of the network transformer is used for being connected with the first network port chip, the second end of the network transformer is used for being connected with the second network port chip, and the network transformer is used for coupling the first network port chip and the second network port chip.
Optionally, the network transformer includes: at least two pulse transformers.
According to an aspect of the present disclosure, there is provided a network coupling circuit, including: the network transformer, the first network port chip and the second network port chip in any embodiment of the disclosure;
the first network port chip is connected with the first end of the network transformer;
and the second network port chip is connected with the second end of the network transformer.
Optionally, the first differential signal line pair of the first network interface chip is respectively connected to two ends of the first winding of each pulse transformer in the network transformer; and a second differential signal line pair of the second network port chip is respectively connected with two ends of a second winding of each pulse transformer in the network transformer.
Optionally, the first network port chip and the second network port chip are voltage-driven network port chips, a tap of a first winding of each pulse transformer in the network transformer is connected to a first end of a first capacitor, a second end of the first capacitor is grounded, a tap of a second winding of each pulse transformer is connected to a first end of a second capacitor, and a second end of the second capacitor is grounded.
Optionally, the first network interface chip and the second network interface chip are current-driven network interface chips, a tap of a first winding of each pulse transformer in the network transformer is connected to a power supply, and a tap of a second winding of each pulse transformer is connected to the power supply.
Optionally, the first network interface chip and the second network interface chip are hundred mega network interface chips, and the network transformer includes 2 pulse transformers.
Optionally, the first network port chip and the second network port chip are gigabit network port chips, and the network transformer includes 4 pulse transformers.
Optionally, the network coupling circuit is configured in a chassis or a circuit board.
Optionally, a transmission distance between the first portal chip and the second portal chip is less than 1 meter.
The volume and the cost of the network transformer can be reduced by the embodiment of the disclosure.
It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present disclosure, nor do they limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description.
Detailed Description
Exemplary embodiments of the present disclosure are described below with reference to the accompanying drawings, in which various details of the embodiments of the disclosure are included to assist understanding, and which are to be considered as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the present disclosure. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.
Fig. 1 is a schematic diagram of a network transformer according to an embodiment of the present disclosure, where the embodiment may be applied to a case where two network port chips are coupled.
As shown in fig. 1, the network transformer 100 includes: a pulse transformer 101; two ends of a first winding of the pulse transformer are used as first ends of the network transformer, two ends of a second winding of the pulse transformer are used as second ends of the network transformer, the first ends of the network transformer are used for being connected with the first network port chip, the second ends of the network transformer are used for being connected with the second network port chip, and the network transformer is used for coupling the first network port chip and the second network port chip.
Among them, a Transformer (Transformer) generally refers to a device that changes an ac voltage by using the principle of electromagnetic induction. The main components are a primary coil, a secondary coil and a magnetic core. The main functions are as follows: voltage transformation, current transformation, impedance transformation, isolation, voltage stabilization, and the like. The Network Transformer 100(Network Transformer) is used for Network signal transmission, impedance matching, waveform restoration, signal clutter suppression, high voltage isolation, and the like. The Pulse Transformer 101(Pulse Transformer) is used for signal enhancement, isolation, coupling, and filtering. Configuring the network transformer to include only the pulse transformer may reduce the occupied volume of the network transformer, as well as reduce the cost of the network transformer.
The network interface chip (PHY) may be a Physical Layer chip interfacing with an external signal. The network interface chip is used for defining electrical and optical signals, line states, clock references, data codes, circuits and the like required by data transmission and reception, and providing a standard interface for data link layer equipment.
In the prior art, two network port chips are coupled through a conventional network transformer or capacitor. The network interface chip is connected with a first traditional network Transformer, the first traditional network Transformer is connected with a second traditional network Transformer through a network cable, the second traditional network Transformer is connected with another network interface chip to realize the coupling between the two network interface chips, the mode is suitable for the coupling between the network interface chips for long-distance transmission, and as shown in fig. 2, the traditional network Transformer comprises a Transformer (a Transformer, a T piece), a Common mode Choke (a K piece) and an Auto-Transformer (an Auto-Transformer, a piece), the occupied area is large, and the cost is high. Or, the network port chip is connected with one end of the capacitor, and the other end of the capacitor is connected with another network port chip, so that the method is suitable for coupling between network port chips with short transmission distance, and the quality of transmitted signals is poor.
According to the technical scheme disclosed by the invention, the network transformer only comprises the pulse transformer, so that the occupied area of the network transformer can be reduced, the cost of the network transformer is reduced, the network transformer is suitable for coupling among network port chips with medium transmission distance, and the transmission signal quality is improved.
As shown in fig. 3, optionally, the network transformer 100 includes: at least two pulse transformers 101.
The network interface chip can have a plurality of data input and output pins, and one pulse transformer 101 can be configured for each pair of data input and output pins. Illustratively, the network transformer 100 includes 2 pulse transformers 101; or the network transformer 100 comprises 4 pulse transformers.
Wherein, there is no connection relationship between the plurality of pulse transformers included in the network transformer 100. The network transformer can be configured with a plurality of pins, and the pins of the same pulse transformer are identified so as to determine the pins which need to be connected with different network port chips.
The number and the structure of the pulse transformers included in the network transformer can be flexibly configured according to the parameters of the network port chip accessed by the network transformer, and the network transformer is adaptive to different application scenes.
Fig. 4 is a schematic diagram of a network coupling circuit according to an embodiment of the disclosure.
As shown in fig. 4, the network coupling circuit 200 includes: the network transformer 100, the first network port chip 201 and the second network port chip 202 of any embodiment of the present disclosure; the first network port chip 201 is connected with a first end of the network transformer 100; the second network port chip 202 is connected to the second end of the network transformer 100.
The Network coupling circuit 200 may be applied to RJ45(Registered Jack) Network cards, Ethernet switches, Network routers, ADSL (Asymmetric Digital Subscriber Line), VDSL (Very-high-speed-bit-rate Digital Subscriber Loop), Digital equipment, EOC (Ethernet over COAX, Ethernet data is transmitted through a coaxial cable) terminals, EPON (Ethernet Passive Optical Network )/GPON (Gigabit-Passive Optical Network), Network set-top boxes, smart televisions, Network cameras, PCs (Personal computers), Computer peripherals, industrial motherboards, Network servers, and telecommunication base station cells (low-power wireless access nodes). The network transformer 100 is used for coupling the first network interface chip and the second network interface chip.
The pulse transformer is only configured to serve as a network transformer, and the first network port chip and the second network port chip serve as network coupling circuits, so that coupling between the first network port chip and the second network port chip is achieved, the transmission distance of network signals is increased, and the quality of transmitted signals is improved. And the occupied space and the cost are greatly reduced.
Optionally, as shown in fig. 5, the first differential signal line pair of the first network interface chip 201 is respectively connected to two ends of the first winding of each pulse transformer 101 in the network transformer 100; the second differential signal line pair of the second portal chip 202 is respectively connected with two ends of the second winding of each pulse transformer 101 in the network transformer 100.
The first differential signal line pair (X + and X-) of the first portal chip 201 is coupled with the second differential signal line pair (X + and X-) corresponding to the second portal chip 202 through the same pulse transformer 101. Wherein the differential signal line pair (X + and X-) may comprise a transmit data differential signal line pair (TX + and TX-) or a receive data differential signal line pair (RX + and RX-). Specifically, as shown in fig. 6, one differential signal line of a first differential signal line pair (TX + and TX-) of the first portal chip 201 is connected to a first end of the first winding of the target pulse transformer 101, and the other differential signal line of the first differential signal line pair is connected to a second end of the first winding of the target pulse transformer 101. Accordingly, one differential signal line of the second differential signal line pair (RX + and RX-) of the second portal chip 202 is connected to the first end of the second winding of the target pulse transformer 101, and the other differential signal line of the second differential signal line pair is connected to the second end of the second winding of the target pulse transformer 101.
The first differential signal pair of the first network port chip is connected with the two ends of the first winding, and the second differential signal pair of the second network port chip is connected with the two ends of the second winding, so that signal transmission can be accurately carried out between the two network port chips, and the quality of transmission signals is improved.
Optionally, as shown in fig. 7, the first network interface chip and the second network interface chip are voltage-driven network interface chips, a tap of a first winding of each pulse transformer in the network transformer is connected to a first end of the first capacitor, a second end of the first capacitor is grounded, a tap of a second winding of each pulse transformer is connected to a first end of the second capacitor, and a second end of the second capacitor is grounded.
The voltage-driven network port chip needs to be provided with a tap capacitor of the network transformer at the ground. The tap of the first winding is grounded through the first capacitor, and the tap of the second winding is grounded through the second capacitor, so that filtering can be realized, and electrostatic protection is facilitated.
Optionally, as shown in fig. 8, the first network interface chip and the second network interface chip are current-driven network interface chips, a tap of a first winding of each pulse transformer in the network transformer is connected to the power supply, and a tap of a second winding of each pulse transformer is connected to the power supply.
The current-driven type net mouth chip needs to be provided with a tapping bias voltage of a network transformer. The tap of the first winding and the tap of the second winding are connected with a power supply, so that driving voltage can be provided for the current-driven type network port chip, and signal transmission between the current-driven type network port chips is realized.
Optionally, as shown in fig. 4, the first portal chip 201 and the second portal chip 202 are hundred mega portal chips, and the network transformer 100 includes 2 pulse transformers 101.
The hundred mega network port chip has 2 differential signal line pairs, specifically including a transmitting data differential signal line pair (TX + and TX-) and a receiving data differential signal line pair (RX + and RX-). In a specific example, as shown in fig. 7, a transmission data differential signal line pair (TX + and TX-) of a one hundred mega socket chip in a network coupling circuit configured with a voltage-driven socket chip is coupled with a reception data differential signal line pair (RX + and RX-) of another one hundred mega socket chip through a pulse transformer; meanwhile, the former receiving data differential signal line pair (RX + and RX-) is coupled with the latter transmitting data differential signal line pair (TX + and TX-) through a second pulse transformer.
The network transformer comprises 2 pulse transformers, and is adapted to a signal transmission application scene among the hundred mega network port chips, so that the coupling cost among the hundred mega network port chips is reduced, and the compatibility of a network coupling circuit is improved.
Optionally, as shown in fig. 9, the first network interface chip and the second network interface chip are gigabit network interface chips, and the network transformer includes 4 pulse transformers.
The gigabit network port chip has 4 differential signal line pairs, specifically including 2 transmission data differential signal line pairs (TX + and TX-) and 2 reception data differential signal line pairs (RX + and RX-). As shown in fig. 9, the differential signal line pair (e.g., MX0+, MX0-) of the gigabit net port chip in the network coupling circuit configured with the voltage-driven net port chip is coupled to the differential signal line pair (e.g., MX0+, MX0-) of another gigabit net port chip through a pulse transformer.
The network transformer comprises 4 pulse transformers, and is adapted to the application scene of signal transmission between the gigabit network port chips, so that the coupling cost between the gigabit network port chips is reduced, and the compatibility of a network coupling circuit is improved.
Optionally, the network coupling circuit is disposed in the chassis or the circuit board.
The network coupling circuit can be configured in a case or on a circuit board. Namely, the two network port chips and the network transformer can be configured in the same box body or on the same circuit board. Compared with the prior art that the traditional network transformers are connected to each network port chip, and the two traditional network transformers are connected through wires, so that the occupied space on the box body or the circuit board is too much, the occupied space of the network coupling circuit can be greatly reduced, the cost is reduced, meanwhile, the space of the box body and the circuit board can be saved, and the box body space resources and the circuit board resources are reasonably configured.
Optionally, a transmission distance between the first portal chip and the second portal chip is less than 1 meter.
The embodiment of the disclosure is suitable for the transmission application scene of the network signals between the network port chips with the medium distance. Illustratively, the transmission distance between the first portal chip and the second portal chip is several tens of centimeters, for example, the transmission distance is 50 cm. Through the application scene of the two network port chips of the capacitive coupling, the network signal transmission distance can be increased, and the transmission signal quality can be improved.
It will be appreciated that various forms of the structures shown above may be used to reorder, add or delete components. For example, the structures described in the present disclosure may be adjusted, and the present disclosure is not limited thereto as long as the desired results of the technical solutions of the present disclosure can be achieved.
The above detailed description should not be construed as limiting the scope of the disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present disclosure should be included in the scope of protection of the present disclosure.