CN217085185U - Multifunctional test fixture - Google Patents

Multifunctional test fixture Download PDF

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Publication number
CN217085185U
CN217085185U CN202220137627.1U CN202220137627U CN217085185U CN 217085185 U CN217085185 U CN 217085185U CN 202220137627 U CN202220137627 U CN 202220137627U CN 217085185 U CN217085185 U CN 217085185U
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resistor
capacitor
pin
chip
power supply
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袁一飞
姜宏亮
季娟
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Nanjing Yixin Tonglian Technology Co ltd
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Nanjing Yixin Tonglian Technology Co ltd
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Abstract

The utility model discloses a multifunctional test fixture, which comprises a main control module, a test module, an indication module and a power supply module; the main control module comprises an MCU processor unit, the test module comprises a voltage test unit, a current test unit, a cover plate detection unit and a board interface unit to be tested, the indication module comprises a sound indication unit and a photoelectric indication unit, and the power supply module comprises a voltage stabilization unit, a board power supply control unit to be tested and a switch unit; the main control module is electrically connected with the test module, the main control module is electrically connected with the indication module, the main control module is electrically connected with the power supply module, the test module is electrically connected with the power supply module, and the indication module is electrically connected with the power supply module; after the main control module detects that a circuit board to be tested is inserted, the testing module is started to test the circuit board, the testing result is subjected to acousto-optic indication through the indicating module, and if the circuit board has a problem, the main control module transmits the problem to other systems through the UART serial port.

Description

Multifunctional test fixture
Technical Field
The utility model relates to a test fixture technical field specifically is a multifunctional test fixture.
Background
The jig is mainly used as a tool for assisting in controlling the position or the action or both. The jig can be classified into a process assembly type jig, a project test type jig and a circuit board test type jig. The circuit board test fixture has the main functions of testing circuit board products, checking whether the circuit board and the SMT welding process meet the product requirements or not, improving the qualification rate of the products and further improving the production efficiency of the products; however, the existing jig mainly tests the voltage or signal of the test point of the circuit board, and the problems of abnormal current caused by welding or abnormal device and the like cannot be tested, and the jig can only output the final test result of the test circuit board, so that the problem of inaccurate positioning cannot be solved, and the circuit board is difficult to repair; aiming at a circuit board to be tested, a set of corresponding jig test circuit needs to be designed, and the system is complex in design, high in difficulty and high in cost.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a multifunctional test fixture to solve the problem that proposes among the above-mentioned background art.
In order to solve the technical problem, the utility model provides a following technical scheme: a multifunctional test fixture comprises a main control module, a test module, an indication module and a power supply module; the main control module comprises an MCU processor unit, the test module comprises a voltage test unit, a current test unit, a cover plate detection unit and a board interface unit to be tested, the indication module comprises a sound indication unit and a photoelectric indication unit, and the power supply module comprises a voltage stabilization unit, a board power supply control unit to be tested and a switch unit;
the main control module is electrically connected with the test module, the indication module, the power module, the test module and the indication module;
the main control module is a core control and processing module of the gateway and is responsible for the functions of task scheduling, fault detection, data acquisition, data processing, data transmission and parameter setting of the whole system; the test module is responsible for detecting the voltage, the current and the insertion of the board to be tested, and opens a test interface of the jig to the circuit board to be tested; the indicating module is responsible for indicating the state of the system and feeding back the detection result of the system to an operator in real time; the power supply module is responsible for voltage stabilization and power supply of the system and has the power supply control function of the circuit board to be tested.
Further, the MCU processor unit comprises a chip U5, a resistor R27, a resistor R30, a capacitor C9, a capacitor C10, a capacitor C11, a capacitor C12, a crystal oscillator X1, a crystal oscillator X2 and an interface J5, wherein the model of the chip U5 is STM32F103RET 6;
a first pin of the chip U5 is connected with a first end of a resistor R27 and connected with a first power supply, the first power supply is 3.3V voltage, a seventh pin of the chip U5 is connected with a second end of the resistor R27, a third pin of the chip U5 is connected with a first pin of the crystal oscillator X1, a fourth pin of the chip U5 is connected with a second pin of the crystal oscillator X1, a fifth pin of the chip U5 is connected with a first pin of the crystal oscillator X2, a sixth pin of the chip U5 is connected with a third pin of the crystal oscillator X2, an eighth pin, a ninth pin, a tenth pin and an eleventh pin of the chip U5 are connected with the test module, a twelfth pin, an eighteenth pin and a thirty-eleventh pin of the chip U5 are connected with a ground, a thirteenth pin, a nineteenth pin and a thirty-second pin of the chip U5 are connected with a ninth pin and connected with the first power supply, a fourteenth pin of the chip U5 is connected to the test module, a fifteenth pin of the chip U5 is connected to the test module, a twentieth pin, a twenty-first pin, a twenty-second pin and a twenty-third pin of the chip U5 are connected to the test module, a twenty-ninth pin of the chip U5 is connected to the second pin of the interface J5, and a thirtieth pin of the chip U5 is connected to the third pin of the interface J5;
the thirty-fifth pin of the chip U5 is connected with the indication module, the thirty-eighth pin, the thirty-ninth pin and the forty-fourth pin of the chip U5 are connected with the indication module, the forty-first pin of the chip U5 is connected with the test module, the forty-seventh pin of the chip U5 is connected with the first end of the resistor R30 and grounded, the sixteenth pin of the chip U5 is connected with the second end of the resistor R30, the forty-eighth pin and the sixty-fourth pin of the chip U5 are connected to the first power supply, the fifty-second pin, the fifty-third pin, the fifty-fourth pin, the fifty-fifth pin, the fifty-sixth pin, the fifty-seventh pin, the fifty-eighth pin, the fifty-ninth pin, the sixty-first pin and the sixty-second pin of the chip U5 are connected with the power supply module;
a first pin of the crystal oscillator X1 is connected to a first end of the capacitor C11, a second end of the capacitor C11 is connected to the first end of the capacitor C12 and a fourth pin of the crystal oscillator X1, and a second end of the capacitor C12 is connected to a second pin of the crystal oscillator X1; a first pin of the crystal oscillator X2 is connected with a first end of the capacitor C9, a second end of the capacitor C9 is integrally connected with a first end of the capacitor C10 and the crystal oscillator X2 to ground, and a second end of the capacitor C10 is connected with a third pin of the crystal oscillator X2; the first pin of the interface J5 is grounded.
In the above technical solution, the MCU processor unit is composed of an STM32F103RET6 chip and is responsible for the functions of the whole system, such as task scheduling, fault detection, data acquisition, data processing, data transmission, and parameter setting.
Further, the voltage test unit comprises a resistor R34, a resistor R37, a resistor R9, a resistor R29, a resistor R11, a resistor R12, a resistor R8, a resistor R16, a resistor R13, a resistor R17, a resistor R10, a resistor R14, a resistor R15, a resistor R18, a resistor R19, a resistor R21, a resistor R22, a resistor R20, a resistor R23, a resistor R26, a resistor R39, a resistor R41, a resistor R40, a resistor R35, a resistor R38, a resistor R36, a capacitor C18, a capacitor C6, a capacitor C8, a capacitor C13, a capacitor C14, a capacitor C16, a capacitor C17, a capacitor C30, and a capacitor C31;
a first end of the resistor R34 is connected with the MCU processor unit, a second end of the resistor R34 is connected with a first end of the capacitor C18 and a first end of the resistor R37 to be connected into the test module, and a second end of the capacitor C18 is connected with a second end of the resistor R37 to be grounded; a first end of the resistor R29 is connected with the MCU processor unit, a second end of the resistor R29 is connected with a first end of the capacitor C6, a first end of the capacitor C6 is connected with a first end of the resistor R11 and a first end of the resistor R9, a second end of the capacitor C6 is connected with a second end of the resistor R11 to ground, a second end of the resistor R11 is connected with a first end of the resistor R9, and a second end of the resistor R9 is connected with the test module; a first end of the resistor R8 is connected with the MCU processor unit, a second end of the resistor R8 is connected with first ends of the capacitor C8, the resistor R16 and the resistor R12, a second end of the capacitor C8 is connected with a second end of the resistor R16 and grounded, a first end of the resistor R16 is connected with first ends of the capacitor C8 and the resistor R12, and a second end of the resistor R12 is connected with the test module; a first end of the resistor R10 is connected with the MCU processor unit, a second end of the resistor R10 is connected with first ends of the capacitor C13, the resistor R17 and the resistor R13, a second end of the capacitor C13 is connected with a second end of the resistor R17 and grounded, a first end of the resistor R17 is connected with first ends of the capacitor C13 and the resistor R13, and a second end of the resistor R13 is connected with the test module;
a first end of the resistor R15 is connected with the MCU processor unit, a second end of the resistor R15 is connected with first ends of the capacitor C14, the resistor R18 and the resistor R14, a second end of the capacitor C14 is connected with a second end of the resistor R18 and grounded, a first end of the resistor R18 is connected with first ends of the capacitor C14 and the resistor R14, and a second end of the resistor R14 is connected with the test module; a first end of the resistor R21 is connected with the MCU processor unit, a second end of the resistor R21 is connected with first ends of the capacitor C16, the resistor R22 and the resistor R19, a second end of the capacitor C16 is connected with a second end of the resistor R122 and grounded, a first end of the resistor R22 is connected with first ends of the capacitor C16 and the resistor R19, and a second end of the resistor R19 is connected with the test module; a first end of the resistor R26 is connected with the MCU processor unit, a second end of the resistor R26 is connected with first ends of the capacitor C17, the resistor R23 and the resistor R20, a second end of the capacitor C17 is connected with a second end of the resistor R23 and grounded, a first end of the resistor R23 is connected with first ends of the capacitor C17 and the resistor R20, and a second end of the resistor R20 is connected with the test module; a first end of the resistor R40 is connected with the MCU processor unit, a second end of the resistor R40 is connected with first ends of the capacitor C31, the resistor R41 and the resistor R39, a second end of the capacitor C31 is connected with a second end of the resistor R41 and grounded, a first end of the resistor R41 is connected with first ends of the capacitor C31 and the resistor R39, and a second end of the resistor R39 is connected with the test module; a first end of the resistor R8 is connected with the MCU processor unit, a second end of the resistor R8 is connected with first ends of the capacitor C8, the resistor R16 and the resistor R12, a second end of the capacitor C8 is connected with a second end of the resistor R16 and grounded, a first end of the resistor R16 is connected with first ends of the capacitor C8 and the resistor R12, and a second end of the resistor R12 is connected with the test module; the first end of the resistor R36 is connected with the MCU processor unit, the second end of the resistor R36 is connected with the first ends of the capacitor C30, the resistor R38 and the resistor R35, the second end of the capacitor C30 is connected with the second end of the resistor R38 and grounded, the first end of the resistor R38 is connected with the first ends of the capacitor C30 and the resistor R35, and the second end of the resistor R35 is connected with the test module.
In the technical scheme, the voltage test unit consists of 9 ADC circuits, and whether the voltage of each test point of the circuit board to be tested is abnormal or not is collected and tested through the ADC sampling function of the MCU processor unit.
Further, the current testing unit comprises a chip U1, a resistor R24, a resistor R42, a resistor R25, a resistor R43, a capacitor C28, a capacitor C29, a capacitor C26 and a capacitor C27, wherein the model of the chip U1 is INA 180;
the first pin of the chip U1 is connected with the first end of the resistor R24, the second end of the resistor R24 is connected with the MCU processor unit, the second end of the resistor R24 is connected with the first end of the capacitor C28, the second pin of the chip U1 is connected with the second end of the capacitor C28 and grounded, the third pin of the chip U1 is connected with the first end of the resistor R42, the fourth pin of the chip U1 is connected with the first end of the resistor R43, the first end of the capacitor C29 is connected with the first end of the resistor R42, the second end of the capacitor C29 is connected with the first end of the resistor R43, the second end of the resistor R42 is connected with the first end of the resistor R25 and connected to a board to be tested for supplying power to the negative GND, the second end of the resistor R25 is connected with the second end of the resistor R43 and grounded, and the fifth pin of the chip U1 is connected with the first end of the capacitor C26, The first end of the capacitor C27 is connected to a first power supply, the first power supply is 3.3V, and the second end of the capacitor C26 and the second end of the capacitor C27 are connected to the ground.
In the above technical scheme, the current test unit is composed of an INA180 current sense amplifier chip, and is used for testing the current in the power supply negative circuit of the circuit board to be tested, and detecting the overall current of the circuit board to be tested so as to judge whether the circuit board to be tested has current abnormality conditions such as short circuit, large current and the like.
Further, the cover plate detection unit comprises a chip U3, a capacitor C15, a capacitor C5 and a resistor R33, wherein the model of the chip U3 is LN 4913;
the first pin of chip U3 with the first end connection access power of electric capacity C5, the first voltage that is 3.3V, the second pin of chip U3 with the second end of electric capacity C5, the first end of electric capacity C15 are connected ground connection, the third pin of chip U3 with the second end of electric capacity C15 is connected, the first end of resistance R33 with the first end of electric capacity C5 is connected, the second end of resistance R33 with the second end of electric capacity C15 is connected.
In the technical scheme, the cover plate detection unit is composed of an LN4913 Hall switch chip and is matched with a magnet on a cover plate structure to detect whether the jig cover plate is closed or not, so that whether a circuit board to be detected is inserted or not is detected, and the function of automatically covering the cover plate by a manual cover plate or a machine can be realized according to different jig structure realization modes.
Further, the board interface unit to be tested comprises an interface J1 and an interface J2, the model of the interface J1 is SIP-11, and the model of the interface J1 is SIP-12;
a first pin of the interface J1 is connected with a negative GND (ground) for supplying power to a board to be tested, and a second pin, a third pin, a fourth pin, a fifth pin, a sixth pin, a seventh pin, an eighth pin, a ninth pin, a tenth pin and an eleventh pin of the interface J1 are connected with the MCU (microprogrammed control Unit);
a first pin of the interface J2 is connected to a first power supply, the first power supply is 3.3V, and a second pin, a third pin, a fourth pin, a fifth pin, a sixth pin, a seventh pin, an eighth pin, a ninth pin, and a tenth pin of the interface J2 are connected to the voltage test unit; an eleventh pin of the interface J2 is connected to a negative BAT + of a board to be tested, and a twelfth pin of the interface J2 is connected to a positive VCC _ VIN of the board to be tested.
In the above technical solution, the board interface unit to be tested is composed of 2 paths of terminals, and is responsible for opening the test interface of the jig to the circuit board to be tested.
Further, the photoelectric indication unit comprises a light emitting diode LED1, a light emitting diode LED2, a light emitting diode LED3, a resistor R1, a resistor R2 and a resistor R3; the sound indicating unit comprises a BUZZER BUZZER1, a triode Q1, a resistor R2 and a resistor R28, wherein the model of the BUZZER BUZZER1 is GSD9605YB-3V 2800;
a first end of the light emitting diode LED1 is connected with the MCU processor unit, a second end of the light emitting diode LED1 is connected with a first end of the resistor R1, a second end of the resistor R1 is connected with a first power supply, and the first power supply is 3.3V voltage; a first end of the light emitting diode LED2 is connected with the MCU processor unit, a second end of the light emitting diode LED2 is connected with a first end of the resistor R3, and a second end of the resistor R3 is connected with a second end of the resistor R1; a first end of the light emitting diode LED3 is connected with the MCU processor unit, a second end of the light emitting diode LED3 is connected with a first end of the resistor R5, and a second end of the resistor R5 is connected with a second end of the resistor R3;
the first pin of BUZZER BUZZER1 is connected with power, the second pin of BUZZER BUZZER1 with triode Q1's collecting electrode is connected, triode Q1's projecting pole with ground connection is connected to resistance R28's first end, triode Q1's base with resistance R28's second end, resistance R2's first end are connected, resistance R2's second end with the MCU processor unit is connected.
In the technical scheme, the sound and light indication unit consists of a GSD9605YB buzzer and is responsible for indicating whether the circuit board to be tested is abnormal or not through sound; the photoelectric indication unit consists of three TJ-L234FGHTCGLFLC6B-A5 LED lamps, the PWR indicator lamp indicates whether the power state of the whole system is normal, the PASS indicator lamp indicates that the circuit board to be detected is qualified through the detection of the jig, and the ERROR indicator lamp indicates that the circuit board to be detected has problems in detection.
Further, the voltage stabilizing unit comprises a chip U2, a resistor R4, a resistor R6, a resistor R44, a resistor R45, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C32 and an inductor L1, wherein the model of the chip U2 is JW 5025;
a first pin of the chip U2 is connected to a first end of the capacitor C1, a second end of the capacitor C1 is connected to a third pin of the chip U2, a third pin of the chip U2 is connected to a first end of the inductor L1, a second end of the inductor L1 is connected to a first power supply, the first power supply is 3.3V, a fourth pin of the chip U2 is connected to the first ends of the capacitor C2, the capacitor C3, the capacitor C32, the capacitor C4, and the capacitor R44, the second end of the capacitor C32 is connected to the first end of the resistor R4, and is connected to a second power supply, the second power supply is 12+ voltage, a second end of the resistor R4 is connected to a seventh pin of the chip U2, a second end of the capacitor C2 is connected to a second end of the inductor L1, a second end of the capacitor C3 is connected to an eighth pin of the chip U2, and a second end of the capacitor C4 is connected to the second end of the resistor R6, the second end of the resistor R6 is connected with the sixth pin of the chip U2, the second end of the resistor R44 is connected with the fifth pin of the chip U2, the second end of the resistor R44 is connected with the first end of the resistor R45, and the second end of the resistor R45 is connected with the second end of the capacitor C2 and the first power supply.
In the above technical scheme, the voltage stabilization unit is composed of a JW5025 chip and is responsible for 3.3V voltage stabilization power supply of a system power supply.
Further, the board power control unit to be tested comprises a capacitor C19, a capacitor C20, a capacitor C21, a capacitor C22, a capacitor C23, a capacitor C24, a capacitor C25, a resistor R31, a resistor R32, a field effect transistor Q2, a field effect transistor Q3, a triode Q4 and a triode Q5;
a first end of the capacitor C19 is connected to a first power supply, the first power supply is 3.3V, a first end of the capacitor C19 is connected to first ends of the capacitor C20, the capacitor C21, the capacitor C22, the capacitor C23, the capacitor C24 and the capacitor C25, and a second end of the capacitor C19 is connected to second ends of the capacitor C20, the capacitor C21, the capacitor C22, the capacitor C23, the capacitor C24 and the capacitor C25 and grounded;
a first end of the field-effect transistor Q2 is connected with the first power supply, a first end of the field-effect transistor Q2 is connected with first ends of the resistor R31, the resistor R32 and the field-effect transistor Q3, a second end of the resistor R31 is connected with a second end of the field-effect transistor Q2, a second end of the field-effect transistor Q2 is connected with a collector of the triode Q4, a base of the triode Q4 is connected with the MCU processor unit, an emitter of the triode Q4 is connected with an emitter of the triode Q5 and grounded, a base of the triode Q5 is connected with the MCU processor unit, a collector of the triode Q5 is connected with a second end of the resistor R32 and a second end of the field-effect transistor Q3, and a third end of the field-effect transistor Q2 is connected with a BAT + for supplying power to a board to be tested; and the third end of the field effect transistor Q3 is connected with a positive power supply VCC _ VIN of the board to be tested.
In the technical scheme, the power supply control unit of the board to be tested consists of a 9014 triode and a BLM3401MOS (metal oxide semiconductor) tube, two controllable 3.3V power supplies are provided for the circuit board to be tested, namely BAT + and VCC _ VIN respectively, and if the current of the circuit board to be tested is abnormal in the test process, the power supply of the circuit board to be tested can be automatically cut off, so that the power supply of the jig and the circuit board to be tested are protected from being damaged.
Further, the switch unit includes a DC plug J4, a switch S1, and a resistor R47;
the second pin and the third pin of the DC plug J4 are connected to ground, the first pin of the DC plug J4 is connected to the first end of the switch S1, the first end of the switch S1 is connected to the first end of the resistor R47, the second end of the resistor R47 is connected to the second end of the switch S1 and connected to a second power supply, and the second power supply is 12+ voltage.
In the technical scheme, the switch unit consists of a self-locking switch and is responsible for controlling the on-off of a power supply of the whole system.
Compared with the prior art, the utility model discloses the beneficial effect who reaches is: the invention discloses a multifunctional test fixture, wherein a system adopts a low-power-consumption embedded design, has the characteristics of low cost, low power consumption and the like, realizes the automatic detection of the current and the voltage of a circuit board, has high automation degree and accurate and quick positioning problem, can test various problems in the circuit board, and improves the qualification rate of products; the jig is used for testing the circuit board to be tested for open circuit, short circuit, current abnormity caused by device damage and the like, the test types are various, and the abnormity of the electric appliance in the circuit board to be tested can be accurately judged; the jig has an automatic insertion detection function, after the circuit board to be detected is placed in place through manual work or automatic equipment, the jig automatically tests, the automation degree is high, if the circuit board has a problem, the jig can transmit the problem to other systems through a UART interface, and the positioning problem is accurate and rapid; the jig is convenient and flexible, the universality is strong, and the jig interface is a universal current and voltage detection interface, and can be suitable for the detection of various circuit boards.
Drawings
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention, and together with the description serve to explain the invention and not to limit the invention. In the drawings:
fig. 1 is a block diagram of a system structure of a multifunctional testing fixture according to the present invention;
FIG. 2 is a circuit diagram of a MCU processor unit of the multifunctional test fixture of the present invention;
FIG. 3 is a circuit diagram of a MCU processor unit of the multifunctional test fixture of the present invention;
FIG. 4 is a third circuit diagram of the MCU processor unit of the multifunctional testing fixture of the present invention;
FIG. 5 is a circuit diagram of a MCU processor unit of the multifunctional testing fixture of the present invention;
fig. 6 is a first circuit connection diagram of a switch unit of the multifunctional testing fixture of the present invention;
FIG. 7 is a circuit diagram of a switch unit of the multifunctional testing fixture of the present invention;
FIG. 8 is a circuit diagram of a cover plate detection unit of the multifunctional test fixture of the present invention;
fig. 9 is a first circuit connection diagram of a power control unit of a board to be tested of the multifunctional test fixture of the present invention;
FIG. 10 is a second circuit diagram of the power control unit of the board to be tested of the multifunctional testing fixture of the present invention;
FIG. 11 is a circuit diagram of a voltage stabilizing unit of the multifunctional testing fixture of the present invention;
FIG. 12 is a circuit diagram of a current testing unit of the multifunctional testing fixture of the present invention;
FIG. 13 is a circuit diagram of the photoelectric indicating unit of the multifunctional testing fixture of the present invention;
FIG. 14 is a circuit diagram of an audio indicating unit of the multifunctional testing fixture of the present invention;
fig. 15 is a first circuit diagram of the interface unit of the board to be tested of the multifunctional testing fixture of the present invention;
fig. 16 is a circuit connection diagram of a board interface unit to be tested of the multifunctional test fixture of the present invention;
fig. 17 is a first circuit diagram of a voltage testing unit of the multifunctional testing fixture of the present invention;
FIG. 18 is a second circuit diagram of the voltage testing unit of the multifunctional testing fixture of the present invention;
FIG. 19 is a third circuit diagram of the voltage testing unit of the multifunctional testing fixture of the present invention;
fig. 20 is a fourth circuit diagram of the voltage testing unit of the multifunctional testing fixture of the present invention;
fig. 21 is a fifth circuit diagram of the voltage testing unit of the multifunctional testing fixture of the present invention;
fig. 22 is a circuit diagram of a voltage testing unit of the multifunctional testing fixture according to the present invention;
fig. 23 is a circuit diagram seven of a voltage testing unit of the multifunctional testing fixture of the present invention;
fig. 24 is a circuit diagram eight of a voltage testing unit of the multifunctional testing fixture of the present invention;
fig. 25 is a circuit diagram nine of a voltage testing unit of the multifunctional testing fixture of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1-25, the present invention provides a technical solution: a multifunctional test fixture comprises a main control module, a test module, an indication module and a power supply module; the main control module comprises an MCU processor unit, the test module comprises a voltage test unit, a current test unit, a cover plate detection unit and a board interface unit to be tested, the indication module comprises a sound indication unit and a photoelectric indication unit, and the power supply module comprises a voltage stabilization unit, a board power supply control unit to be tested and a switch unit;
the main control module is electrically connected with the test module, the main control module is electrically connected with the indication module, the main control module is electrically connected with the power supply module, the test module is electrically connected with the power supply module, and the indication module is electrically connected with the power supply module;
after the main control module detects that a circuit board to be tested is inserted, the testing module is started to test the circuit board, the testing result is subjected to acousto-optic indication through the indicating module, and if the circuit board has a problem, the main control module transmits the problem to other systems through the UART serial port.
The main control module is a core control and processing module of the gateway and is responsible for the functions of task scheduling, fault detection, data acquisition, data processing, data transmission and parameter setting of the whole system; the test module is responsible for detecting the voltage, the current and the insertion of the board to be tested, and opens a test interface of the jig to the circuit board to be tested; the indicating module is responsible for indicating the system state and feeding back the detection result of the system to an operator in real time; the power supply module is responsible for voltage stabilization and power supply of the system and has the power supply control function of the circuit board to be tested.
The MCU processor unit comprises a chip U5, a resistor R27, a resistor R30, a capacitor C9, a capacitor C10, a capacitor C11, a capacitor C12, a crystal oscillator X1, a crystal oscillator X2 and an interface J5, wherein the model of the chip U5 is STM32F103RET 6;
a first pin of a chip U5 is connected with a first end of a resistor R27 and connected with a first power supply, the first power supply is 3.3V voltage, a seventh pin of a chip U5 is connected with a second end of a resistor R27, a third pin of a chip U5 is connected with a first pin of a crystal oscillator X1, a fourth pin of the chip U5 is connected with a second pin of the crystal oscillator X1, a fifth pin of the chip U5 is connected with a first pin of the crystal oscillator X2, a sixth pin of the chip U5 is connected with a third pin of the crystal oscillator X2, an eighth pin, a ninth pin, a tenth pin and an eleventh pin of the chip U5 are connected with a test module, a twelfth pin of the chip U5 is connected with an eighteenth pin and a thirty-eleventh pin and grounded, a thirteenth pin of the chip U5 is connected with a nineteenth pin and a thirty-second pin and connected with a first power supply, a fourteenth pin of the chip U5 is connected with the test module, and a fifteenth pin of the chip U5 is connected with the test module, a twentieth pin, a twenty-first pin, a twenty-second pin and a twenty-third pin of the chip U5 are connected with the test module, a twenty-ninth pin of the chip U5 is connected with a second pin of the interface J5, and a thirtieth pin of the chip U5 is connected with a third pin of the interface J5;
a thirty-fifth pin of the chip U5 is connected with the indication module, a thirty-eighth pin, a thirty-ninth pin and a forty-seventh pin of the chip U5 are connected with the indication module, a forty-first pin of the chip U5 is connected with the test module, a forty-seventh pin of the chip U5 is connected with the first end of the resistor R30 and grounded, a sixty pin of the chip U5 is connected with the second end of the resistor R30, a forty-eighth pin and a sixty-fourth pin of the chip U5 are connected with the first power supply, a fifty-fifth pin and a fifty-first pin of the chip U5 are connected with the power module, and a fifty-second pin, a fifty-third pin, a fifty-fourth pin, a fifty-fifth pin, a fifty-sixth pin, a fifty-seventh pin, an eighth pin, a fifty-ninth pin, a sixty-first pin and a sixty-second pin of the chip U5 are connected with the test module;
the first pin of the crystal oscillator X1 is connected with the first end of the capacitor C11, and the second end of the capacitor C11 is connected with the capacitor
The first end of the capacitor C12 and the fourth pin of the crystal oscillator X1 are connected to the ground, and the second end of the capacitor C12 is connected with the second pin of the crystal oscillator X1; a first pin of the crystal oscillator X2 is connected with a first end of a capacitor C9, a second end of a capacitor C9 is integrally connected with a first end of a capacitor C10 and the crystal oscillator X2 and is grounded, and a second end of a capacitor C10 is connected with a third pin of the crystal oscillator X2; the first pin of the interface J5 is grounded.
The MCU processor unit consists of an STM32F103RET6 chip and is responsible for the functions of task scheduling, fault detection, data acquisition, data processing, data transmission, parameter setting and the like of the whole system.
The voltage test unit comprises a resistor R34, a resistor R37, a resistor R9, a resistor R29, a resistor R11, a resistor R12, a resistor R8, a resistor R16, a resistor R13, a resistor R17, a resistor R10, a resistor R14, a resistor R15, a resistor R18, a resistor R19, a resistor R21, a resistor R22, a resistor R20, a resistor R23, a resistor R26, a resistor R39, a resistor R41, a resistor R40, a resistor R35, a resistor R38, a resistor R36, a capacitor C18, a capacitor C6, a capacitor C8, a capacitor C13, a capacitor C14, a capacitor C16, a capacitor C17, a capacitor C30 and a capacitor C31;
the first end of the resistor R34 is connected with the MCU processor unit, the second end of the resistor R34 is connected with the first end of the capacitor C18 and the first end of the resistor R37 to be connected into the test module, and the second end of the capacitor C18 is connected with the second end of the resistor R37 to be grounded; the first end of the resistor R29 is connected with the MCU processor unit, the second end of the resistor R29 is connected with the first end of the capacitor C6, the first end of the capacitor C6 is connected with the first end of the resistor R11 and the first end of the resistor R9, the second end of the capacitor C6 is connected with the second end of the resistor R11 to be grounded, the second end of the resistor R11 is connected with the first end of the resistor R9, and the second end of the resistor R9 is connected with the test module; the first end of the resistor R8 is connected with the MCU processor unit, the second end of the resistor R8 is connected with the first ends of the capacitor C8, the resistor R16 and the resistor R12, the second end of the capacitor C8 is connected with the second end of the resistor R16 and grounded, the first end of the resistor R16 is connected with the first ends of the capacitor C8 and the resistor R12, and the second end of the resistor R12 is connected with the test module; the first end of the resistor R10 is connected with the MCU processor unit, the second end of the resistor R10 is connected with the first ends of the capacitor C13, the resistor R17 and the resistor R13, the second end of the capacitor C13 is connected with the second end of the resistor R17 and grounded, the first end of the resistor R17 is connected with the first ends of the capacitor C13 and the resistor R13, and the second end of the resistor R13 is connected with the test module;
the first end of the resistor R15 is connected with the MCU processor unit, the second end of the resistor R15 is connected with the first ends of the capacitor C14, the resistor R18 and the resistor R14, the second end of the capacitor C14 is connected with the second end of the resistor R18 and grounded, the first end of the resistor R18 is connected with the first ends of the capacitor C14 and the resistor R14, and the second end of the resistor R14 is connected with the test module; the first end of the resistor R21 is connected with the MCU processor unit, the second end of the resistor R21 is connected with the first ends of the capacitor C16, the resistor R22 and the resistor R19, the second end of the capacitor C16 is connected with the second end of the resistor R122 and grounded, the first end of the resistor R22 is connected with the first ends of the capacitor C16 and the resistor R19, and the second end of the resistor R19 is connected with the test module; the first end of the resistor R26 is connected with the MCU processor unit, the second end of the resistor R26 is connected with the first ends of the capacitor C17, the resistor R23 and the resistor R20, the second end of the capacitor C17 is connected with the second end of the resistor R23 and grounded, the first end of the resistor R23 is connected with the first ends of the capacitor C17 and the resistor R20, and the second end of the resistor R20 is connected with the test module; the first end of the resistor R40 is connected with the MCU processor unit, the second end of the resistor R40 is connected with the first ends of the capacitor C31, the resistor R41 and the resistor R39, the second end of the capacitor C31 is connected with the second end of the resistor R41 and grounded, the first end of the resistor R41 is connected with the first ends of the capacitor C31 and the resistor R39, and the second end of the resistor R39 is connected with the test module; the first end of the resistor R8 is connected with the MCU processor unit, the second end of the resistor R8 is connected with the first ends of the capacitor C8, the resistor R16 and the resistor R12, the second end of the capacitor C8 is connected with the second end of the resistor R16 and grounded, the first end of the resistor R16 is connected with the first ends of the capacitor C8 and the resistor R12, and the second end of the resistor R12 is connected with the test module; the first end of the resistor R36 is connected with the MCU processor unit, the second end of the resistor R36 is connected with the first ends of the capacitor C30, the resistor R38 and the resistor R35, the second end of the capacitor C30 is connected with the second end of the resistor R38 and grounded, the first end of the resistor R38 is connected with the first ends of the capacitor C30 and the resistor R35, and the second end of the resistor R35 is connected with the test module.
The voltage test unit consists of 9 paths of ADC circuits, and whether the voltage of each test point of the circuit board to be tested is abnormal or not is collected and tested through the ADC sampling function of the MCU processor unit.
The current testing unit comprises a chip U1, a resistor R24, a resistor R42, a resistor R25, a resistor R43, a capacitor C28, a capacitor C29, a capacitor C26 and a capacitor C27, wherein the model of the chip U1 is INA 180;
a first pin of a chip U1 is connected with a first end of a resistor R24, a second end of a resistor R24 is connected with the MCU processor unit, a second end of a resistor R24 is connected with a first end of a capacitor C28, a second pin of a chip U1 is connected with a second end of the capacitor C28 and grounded, a third pin of the chip U1 is connected with a first end of the resistor R42, a fourth pin of the chip U1 is connected with a first end of a resistor R43, a first end of a capacitor C29 is connected with a first end of a resistor R42, a second end of the capacitor C29 is connected with a first end of a resistor R43, and a second end of the resistor R42 and a first end of a resistor R25 are connected to a board to be tested and connected with a negative GND (ground) for power supply * The second end of the resistor R25 is connected to the second end of the resistor R43, the fifth pin of the chip U1 is connected to the first end of the capacitor C26 and the first end of the capacitor C27, a first power supply is connected, the voltage of the first power supply is 3.3V, and the second end of the capacitor C26 is connected to the second end of the capacitor C27.
The current test unit is composed of INA180 current induction amplifier chips, tests the current in the power supply negative loop of the circuit board to be tested, and detects the whole current of the circuit board to be tested so as to judge whether the circuit board to be tested has current abnormal conditions such as short circuit, large current and the like.
The cover plate detection unit comprises a chip U3, a capacitor C15, a capacitor C5 and a resistor R33, wherein the model of the chip U3 is LN 4913;
the first pin of the chip U3 is connected with the first end of the capacitor C5 and connected to a first power supply, the first power supply is 3.3V voltage, the second pin of the chip U3 is connected with the second end of the capacitor C5 and the first end of the capacitor C15 to be grounded, the third pin of the chip U3 is connected with the second end of the capacitor C15, the first end of the resistor R33 is connected with the first end of the capacitor C5, and the second end of the resistor R33 is connected with the second end of the capacitor C15.
The cover plate detection unit is composed of LN4913 Hall switch chips and is matched with magnets on the cover plate structure to detect whether the jig cover plate is closed or not, so that whether a circuit board to be detected is inserted or not is detected, and the function of automatically covering the cover plate by a manual cover plate or a machine can be realized according to different jig structure implementation modes.
The interface unit of the board to be tested comprises an interface J1 and an interface J2, wherein the model of the interface J1 is SIP-11, and the model of the interface J1 is SIP-12;
first pin of interface J1 and power supply negative GND of board to be tested * A second pin, a third pin, a fourth pin, a fifth pin, a sixth pin, a seventh pin, an eighth pin, a ninth pin, a tenth pin and an eleventh pin of the interface J1 are connected with the MCU processor unit;
a first pin of the interface J2 is connected with a first power supply, the first power supply is 3.3V voltage, and a second pin, a third pin, a fourth pin, a fifth pin, a sixth pin, a seventh pin, an eighth pin, a ninth pin and a tenth pin of the interface J2 are connected with a voltage test unit; an eleventh pin of the interface J2 is connected to the board under test power supply negative BAT +, and a twelfth pin of the interface J2 is connected to the board under test power supply positive VCC _ VIN.
The board interface unit to be tested consists of 2 paths of terminals and is responsible for opening the test interface of the jig to the circuit board to be tested.
The photoelectric indication unit comprises a light emitting diode LED1, a light emitting diode LED2, a light emitting diode LED3, a resistor R1, a resistor R2 and a resistor R3; the sound indicating unit comprises a BUZZER BUZZER1, a triode Q1, a resistor R2 and a resistor R28, wherein the model of the BUZZER BUZZER1 is GSD9605YB-3V 2800;
the first end of the light emitting diode LED1 is connected with the MCU processor unit, the second end of the light emitting diode LED1 is connected with the first end of the resistor R1, the second end of the resistor R1 is connected with a first power supply, and the first power supply is 3.3V voltage; a first end of the light emitting diode LED2 is connected with the MCU processor unit, a second end of the light emitting diode LED2 is connected with a first end of the resistor R3, and a second end of the resistor R3 is connected with a second end of the resistor R1; a first end of the light emitting diode LED3 is connected with the MCU processor unit, a second end of the light emitting diode LED3 is connected with a first end of the resistor R5, and a second end of the resistor R5 is connected with a second end of the resistor R3;
the first pin of the BUZZER BUZZER1 is connected with the first power supply, the second pin of the BUZZER BUZZER1 is connected with the collector of a triode Q1, the emitter of the triode Q1 is connected with the first end of a resistor R28 and grounded, the base of the triode Q1 is connected with the second end of the resistor R28 and the first end of a resistor R2, and the second end of the resistor R2 is connected with the MCU processor unit.
The sound and light indication unit consists of a GSD9605YB buzzer and is responsible for indicating whether the circuit board to be tested is abnormal or not through sound; the photoelectric indication unit consists of three TJ-L234FGHTCGLFLC6B-A5 LED lamps, the PWR indicator lamp indicates whether the power state of the whole system is normal, the PASS indicator lamp indicates that the circuit board to be detected is qualified through the detection of the jig, and the ERROR indicator lamp indicates that the detection of the circuit board to be detected has problems.
The voltage stabilizing unit comprises a chip U2, a resistor R4, a resistor R6, a resistor R44, a resistor R45, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C32 and an inductor L1, and the model of the chip U2 is JW 5025;
the first pin of the chip U2 is connected to the first end of a capacitor C1, the second end of the capacitor C1 is connected to the third pin of the chip U2, the third pin of the chip U2 is connected to the first end of an inductor L1, the second end of the inductor L1 is connected to the first power supply, the first power supply has a voltage of 3.3V, the fourth pin of the chip U2 is connected to the first ends of a capacitor C2, a capacitor C3, a capacitor C32, a capacitor C4 and a capacitor R44, the second end of the capacitor C32 is connected to the first end of a resistor R4, the second power supply has a voltage of 12+, the second end of a resistor R4 is connected to the seventh pin of the chip U2, the second end of the capacitor C2 is connected to the second end of the inductor L1, the second end of the capacitor C1 is connected to the eighth pin of the chip U4, the second end of the capacitor C1 is connected to the first end of the resistor R1, the second end of the resistor R1 is connected to the fifth pin of the chip 1, the second end of the resistor R44 is connected with the first end of the resistor R45, and the second end of the resistor R45 is connected with the second end of the capacitor C2 and the first power supply.
The voltage stabilizing unit consists of a JW5025 chip and is responsible for 3.3V voltage stabilization power supply of a system power supply.
The power supply control unit of the board to be tested comprises a capacitor C19, a capacitor C20, a capacitor C21, a capacitor C22, a capacitor C23, a capacitor C24, a capacitor C25, a resistor R31, a resistor R32, a field effect transistor Q2, a field effect transistor Q3, a triode Q4 and a triode Q5;
the first end of the capacitor C19 is connected with a first power supply, the first power supply is 3.3V voltage, the first end of the capacitor C19 is connected with the first ends of the capacitor C20, the capacitor C21, the capacitor C22, the capacitor C23, the capacitor C24 and the capacitor C25, and the second end of the capacitor C19 is connected with the second ends of the capacitor C20, the capacitor C21, the capacitor C22, the capacitor C23, the capacitor C24 and the capacitor C25 and is grounded;
the first end of a field-effect tube Q2 is connected with a first power supply, the first end of a field-effect tube Q2 is connected with first ends of a resistor R31, a resistor R32 and a field-effect tube Q3, the second end of a resistor R31 is connected with the second end of the field-effect tube Q2, the second end of a field-effect tube Q2 is connected with a collector of a triode Q4, a base of the triode Q4 is connected with an MCU processor unit, an emitter of the triode Q4 is connected with an emitter of a triode Q5 and grounded, a base of the triode Q5 is connected with the MCU processor unit, a collector of the triode Q5 is connected with the second end of a resistor R32 and the second end of the field-effect tube Q3, and the third end of the field-effect tube Q2 is connected with a power supply BAT +; and the third end of the field effect transistor Q3 is connected with the positive power supply VCC _ VIN of the board to be tested.
The power supply control unit of the board to be tested consists of a 9014 triode and a BLM3401MOS tube, two controllable 3.3V power supplies are provided for the circuit board to be tested, the BAT + and the VCC _ VIN are provided respectively, if the current of the circuit board to be tested is abnormal in the test process, the power supply of the circuit board to be tested can be automatically cut off, and the jig power supply and the circuit board to be tested are protected from being damaged.
The switch unit comprises a DC plug J4, a switch S1 and a resistor R47;
the second pin and the third pin of the DC plug J4 are connected to ground, the first pin of the DC plug J4 is connected to the first end of the switch S1, the first end of the switch S1 is connected to the first end of the resistor R47, the second end of the resistor R47 is connected to the second end of the switch S1 and connected to the second power supply, and the second power supply is 12+ voltage.
The switch unit consists of a self-locking switch and is responsible for controlling the on-off of a power supply of the whole system.
The utility model discloses a theory of operation:
step 1: after the system is electrified, the switch unit is turned on;
step 2: the voltage stabilizing unit provides a 3.3V power supply, and the MCU processor unit enters a working mode;
and step 3: the MCU processor unit carries out system self-check, if each module works normally, the step 4 is carried out, otherwise, the sound indicating unit sends out a system fault tone, a PWR lamp of the photoelectric indicating unit flickers, and a user is prompted that the system is in fault;
and 4, step 4: the MCU processor unit detects whether the cover plate detection unit has a cover plate closing signal, if so, the step 5 is carried out, otherwise, the step 4 is repeated;
and 5: the MCU processor unit opens the power supply BAT + and VCC _ VIN of the board to be tested through the power supply control unit of the board to be tested;
step 6: the MCU processor unit monitors the current of the circuit board to be tested through the current test unit, if the current of the circuit board to be tested is normal, the step 7 is carried out, and if the current of the circuit board to be tested is abnormal, the step 9 is carried out;
and 7: the MCU processor unit tests whether the voltage of each test point of the circuit board to be tested is normal through the voltage test unit, if the voltage of the test point of the circuit board to be tested is normal, the step 8 is carried out, and if not, the step 9 is carried out;
and 8: testing the voltage and the current of the circuit board to be tested normally, controlling a sound indicating unit to emit a normal tone of the circuit board to be tested by an MCU processor unit, controlling a photoelectric indicating unit to light a PASS indicating lamp by the MCU processor unit, prompting a user that the circuit board to be tested is tested normally, and entering the step 10;
and step 9: the method comprises the following steps that a circuit board to be tested is abnormally tested, an MCU processor unit controls a power supply control unit of the circuit board to be tested to cut off power supply of the circuit board to be tested, the MCU processor unit controls a sound indicating unit to send abnormal tones of the circuit board to be tested, the MCU processor unit controls a photoelectric indicating unit to light an ERROR indicating lamp to prompt a user that the circuit board to be tested is abnormally tested, meanwhile, a handshake instruction is waited through a UART serial port, after the handshake instruction is received, abnormal information of the circuit board to be tested is sent to an external system to provide basis for next repair, and the method enters step 10;
step 10: the MCU processor unit detects whether the cover plate detection unit has a cover plate opening signal, if so, the step 11 is carried out, otherwise, the step 10 is repeated;
step 11: the apron is opened, and the circuit board that awaits measuring is withdrawed from, and MCU processor unit closes the sound indicating unit prompt tone, closes the photoelectricity indicating unit pilot lamp, and the UART serial ports withdraws from waiting for the instruction state of shaking hands, gets into step 4.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing embodiments, or equivalents may be substituted for elements thereof. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (10)

1. A multifunctional test fixture is characterized by comprising a main control module, a test module, an indication module and a power supply module; the main control module comprises an MCU processor unit, the test module comprises a voltage test unit, a current test unit, a cover plate detection unit and a board interface unit to be tested, the indication module comprises a sound indication unit and a photoelectric indication unit, and the power supply module comprises a voltage stabilization unit, a board power supply control unit to be tested and a switch unit;
the main control module is electrically connected with the test module, the main control module is electrically connected with the indication module, the main control module is electrically connected with the power supply module, the test module is electrically connected with the power supply module, and the indication module is electrically connected with the power supply module.
2. The multifunctional testing fixture of claim 1, wherein: the MCU processor unit comprises a chip U5, a resistor R27, a resistor R30, a capacitor C9, a capacitor C10, a capacitor C11, a capacitor C12, a crystal oscillator X1, a crystal oscillator X2 and an interface J5, wherein the model of the chip U5 is STM32F103RET 6;
a first pin of the chip U5 is connected with a first end of a resistor R27 and connected to a first power supply, the first power supply is 3.3V, a seventh pin of the chip U5 is connected with a second end of the resistor R27, a third pin of the chip U5 is connected with a first pin of the crystal oscillator X1, a fourth pin of the chip U5 is connected with a second pin of the crystal oscillator X1, a fifth pin of the chip U5 is connected with a first pin of the crystal oscillator X2, a sixth pin of the chip U5 is connected with a third pin of the crystal oscillator X2, an eighth pin, a ninth pin, a tenth pin and an eleventh pin of the chip U5 are connected with the test module, a twelfth pin, an eighteenth pin and a thirty-eleventh pin of the chip U5 are connected to the ground, a thirteenth pin of the chip U5 is connected with a nineteenth pin and a thirty-second pin of the chip U3652 and connected to the first power supply, and a fourteenth pin of the chip U5 is connected with the test module, a fifteenth pin of the chip U5 is connected with the test module, a twentieth pin, a twenty-first pin, a twenty-second pin and a twenty-third pin of the chip U5 are connected with the test module, a twenty-ninth pin of the chip U5 is connected with the second pin of the interface J5, and a thirtieth pin of the chip U5 is connected with the third pin of the interface J5;
the thirty-fifth pin of the chip U5 is connected with the indication module, the thirty-eighth pin, the thirty-ninth pin and the forty-fourth pin of the chip U5 are connected with the indication module, the forty-first pin of the chip U5 is connected with the test module, the forty-seventh pin of the chip U5 is connected with the first end of the resistor R30 and grounded, the sixteenth pin of the chip U5 is connected with the second end of the resistor R30, the forty-eighth pin and the sixty-fourth pin of the chip U5 are connected to the first power supply, the fifty-second pin, the fifty-third pin, the fifty-fourth pin, the fifty-fifth pin, the fifty-sixth pin, the fifty-seventh pin, the fifty-eighth pin, the fifty-ninth pin, the sixty-first pin and the sixty-second pin of the chip U5 are connected with the power supply module;
a first pin of the crystal oscillator X1 is connected to a first end of the capacitor C11, a second end of the capacitor C11 is connected to the first end of the capacitor C12 and a fourth pin of the crystal oscillator X1, and a second end of the capacitor C12 is connected to a second pin of the crystal oscillator X1; a first pin of the crystal oscillator X2 is connected to a first end of the capacitor C9, a second end of the capacitor C9 is integrally connected to the first end of the capacitor C10 and the crystal oscillator X2 and is grounded, and a second end of the capacitor C10 is connected to a third pin of the crystal oscillator X2; the first pin of the interface J5 is grounded.
3. The multifunctional testing fixture of claim 1, wherein: the voltage test unit comprises a resistor R34, a resistor R37, a resistor R9, a resistor R29, a resistor R11, a resistor R12, a resistor R8, a resistor R16, a resistor R13, a resistor R17, a resistor R10, a resistor R14, a resistor R15, a resistor R18, a resistor R19, a resistor R21, a resistor R22, a resistor R20, a resistor R23, a resistor R26, a resistor R39, a resistor R41, a resistor R40, a resistor R35, a resistor R38, a resistor R36, a capacitor C18, a capacitor C6, a capacitor C8, a capacitor C13, a capacitor C14, a capacitor C16, a capacitor C17, a capacitor C30 and a capacitor C31;
a first end of the resistor R34 is connected with the MCU processor unit, a second end of the resistor R34 is connected with a first end of the capacitor C18 and a first end of the resistor R37 to be connected into the test module, and a second end of the capacitor C18 is connected with a second end of the resistor R37 to be grounded; a first end of the resistor R29 is connected with the MCU processor unit, a second end of the resistor R29 is connected with a first end of the capacitor C6, a first end of the capacitor C6 is connected with a first end of the resistor R11 and a first end of the resistor R9, a second end of the capacitor C6 is connected with a second end of the resistor R11 to ground, a second end of the resistor R11 is connected with a first end of the resistor R9, and a second end of the resistor R9 is connected with the test module; a first end of the resistor R8 is connected with the MCU processor unit, a second end of the resistor R8 is connected with first ends of the capacitor C8, the resistor R16 and the resistor R12, a second end of the capacitor C8 is connected with a second end of the resistor R16 and grounded, a first end of the resistor R16 is connected with first ends of the capacitor C8 and the resistor R12, and a second end of the resistor R12 is connected with the test module; a first end of the resistor R10 is connected with the MCU processor unit, a second end of the resistor R10 is connected with first ends of the capacitor C13, the resistor R17 and the resistor R13, a second end of the capacitor C13 is connected with a second end of the resistor R17 and grounded, a first end of the resistor R17 is connected with first ends of the capacitor C13 and the resistor R13, and a second end of the resistor R13 is connected with the test module;
a first end of the resistor R15 is connected with the MCU processor unit, a second end of the resistor R15 is connected with first ends of the capacitor C14, the resistor R18 and the resistor R14, a second end of the capacitor C14 is connected with a second end of the resistor R18 and grounded, a first end of the resistor R18 is connected with first ends of the capacitor C14 and the resistor R14, and a second end of the resistor R14 is connected with the test module; a first end of the resistor R21 is connected with the MCU processor unit, a second end of the resistor R21 is connected with first ends of the capacitor C16, the resistor R22 and the resistor R19, a second end of the capacitor C16 is connected with a second end of the resistor R122 and grounded, a first end of the resistor R22 is connected with first ends of the capacitor C16 and the resistor R19, and a second end of the resistor R19 is connected with the test module; a first end of the resistor R26 is connected with the MCU processor unit, a second end of the resistor R26 is connected with first ends of the capacitor C17, the resistor R23 and the resistor R20, a second end of the capacitor C17 is connected with a second end of the resistor R23 and grounded, a first end of the resistor R23 is connected with first ends of the capacitor C17 and the resistor R20, and a second end of the resistor R20 is connected with the test module; a first end of the resistor R40 is connected with the MCU processor unit, a second end of the resistor R40 is connected with first ends of the capacitor C31, the resistor R41 and the resistor R39, a second end of the capacitor C31 is connected with a second end of the resistor R41 and grounded, a first end of the resistor R41 is connected with first ends of the capacitor C31 and the resistor R39, and a second end of the resistor R39 is connected with the test module; a first end of the resistor R8 is connected with the MCU processor unit, a second end of the resistor R8 is connected with first ends of the capacitor C8, the resistor R16 and the resistor R12, a second end of the capacitor C8 is connected with a second end of the resistor R16 and grounded, a first end of the resistor R16 is connected with first ends of the capacitor C8 and the resistor R12, and a second end of the resistor R12 is connected with the test module; the first end of the resistor R36 is connected with the MCU processor unit, the second end of the resistor R36 is connected with the first ends of the capacitor C30, the resistor R38 and the resistor R35, the second end of the capacitor C30 is connected with the second end of the resistor R38 and grounded, the first end of the resistor R38 is connected with the first ends of the capacitor C30 and the resistor R35, and the second end of the resistor R35 is connected with the test module.
4. The multifunctional testing fixture of claim 1, wherein: the current testing unit comprises a chip U1, a resistor R24, a resistor R42, a resistor R25, a resistor R43, a capacitor C28, a capacitor C29, a capacitor C26 and a capacitor C27, wherein the model of the chip U1 is INA 180;
the first pin of the chip U1 is connected with the first end of the resistor R24, the second end of the resistor R24 is connected with the MCU processor unit, the second end of the resistor R24 is connected with the first end of the capacitor C28, the second pin of the chip U1 is connected with the second end of the capacitor C28 and grounded, the third pin of the chip U1 is connected with the first end of the resistor R42, the fourth pin of the chip U1 is connected with the first end of the resistor R43, the first end of the capacitor C29 is connected with the first end of the resistor R42, the second end of the capacitor C29 is connected with the first end of the resistor R43, the second end of the resistor R42 is connected with the first end of the resistor R25 and connected to a board to be tested for supplying power to the negative GND, the second end of the resistor R25 is connected with the second end of the resistor R43 and grounded, and the fifth pin of the chip U1 is connected with the first end of the capacitor C26, The first end of the capacitor C27 is connected to a first power supply, the first power supply is 3.3V, and the second end of the capacitor C26 and the second end of the capacitor C27 are connected to the ground.
5. The multifunctional testing fixture of claim 1, wherein: the cover plate detection unit comprises a chip U3, a capacitor C15, a capacitor C5 and a resistor R33, wherein the model of the chip U3 is LN 4913;
the first pin of chip U3 with the first end connection access power of electric capacity C5, the first voltage that is 3.3V, the second pin of chip U3 with the second end of electric capacity C5, the first end of electric capacity C15 are connected ground connection, the third pin of chip U3 with the second end of electric capacity C15 is connected, the first end of resistance R33 with the first end of electric capacity C5 is connected, the second end of resistance R33 with the second end of electric capacity C15 is connected.
6. The multifunctional testing fixture of claim 1, wherein: the board interface unit to be tested comprises an interface J1 and an interface J2, wherein the model of the interface J1 is SIP-11, and the model of the interface J1 is SIP-12;
a first pin of the interface J1 is connected with a negative GND (ground) for supplying power to a board to be tested, and a second pin, a third pin, a fourth pin, a fifth pin, a sixth pin, a seventh pin, an eighth pin, a ninth pin, a tenth pin and an eleventh pin of the interface J1 are connected with the MCU (microprogrammed control Unit);
a first pin of the interface J2 is connected to a first power supply, the first power supply is 3.3V, and a second pin, a third pin, a fourth pin, a fifth pin, a sixth pin, a seventh pin, an eighth pin, a ninth pin, and a tenth pin of the interface J2 are connected to the voltage test unit; an eleventh pin of the interface J2 is connected to a negative BAT + of a board to be tested, and a twelfth pin of the interface J2 is connected to a positive VCC _ VIN of the board to be tested.
7. The multifunctional testing fixture of claim 1, wherein: the photoelectric indication unit comprises a light emitting diode LED1, a light emitting diode LED2, a light emitting diode LED3, a resistor R1, a resistor R2 and a resistor R3; the sound indicating unit comprises a BUZZER BUZZER1, a triode Q1, a resistor R2 and a resistor R28, wherein the model of the BUZZER BUZZER1 is GSD9605YB-3V 2800;
a first end of the light emitting diode LED1 is connected with the MCU processor unit, a second end of the light emitting diode LED1 is connected with a first end of the resistor R1, a second end of the resistor R1 is connected with a first power supply, and the first power supply is 3.3V voltage; a first end of the light emitting diode LED2 is connected with the MCU processor unit, a second end of the light emitting diode LED2 is connected with a first end of the resistor R3, and a second end of the resistor R3 is connected with a second end of the resistor R1; a first end of the light emitting diode LED3 is connected with the MCU processor unit, a second end of the light emitting diode LED3 is connected with a first end of the resistor R5, and a second end of the resistor R5 is connected with a second end of the resistor R3;
the first pin of BUZZER BUZZER1 is connected with power, the second pin of BUZZER BUZZER1 with triode Q1's collecting electrode is connected, triode Q1's projecting pole with ground connection is connected to resistance R28's first end, triode Q1's base with resistance R28's second end, resistance R2's first end are connected, resistance R2's second end with the MCU processor unit is connected.
8. The multifunctional testing fixture of claim 1, wherein: the voltage stabilizing unit comprises a chip U2, a resistor R4, a resistor R6, a resistor R44, a resistor R45, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, a capacitor C32 and an inductor L1, wherein the model of the chip U2 is JW 5025;
a first pin of the chip U2 is connected to a first end of the capacitor C1, a second end of the capacitor C1 is connected to a third pin of the chip U2, a third pin of the chip U2 is connected to a first end of the inductor L1, a second end of the inductor L1 is connected to a first power supply, the first power supply is 3.3V, a fourth pin of the chip U2 is connected to the first ends of the capacitor C2, the capacitor C3, the capacitor C32, the capacitor C4, and the capacitor R44, the second end of the capacitor C32 is connected to the first end of the resistor R4, and is connected to a second power supply, the second power supply is 12+ voltage, a second end of the resistor R4 is connected to a seventh pin of the chip U2, a second end of the capacitor C2 is connected to a second end of the inductor L1, a second end of the capacitor C3 is connected to an eighth pin of the chip U2, and a second end of the capacitor C4 is connected to the second end of the resistor R6, the second end of the resistor R6 is connected with the sixth pin of the chip U2, the second end of the resistor R44 is connected with the fifth pin of the chip U2, the second end of the resistor R44 is connected with the first end of the resistor R45, and the second end of the resistor R45 is connected with the second end of the capacitor C2 and the first power supply.
9. The multifunctional testing fixture of claim 1, wherein: the power supply control unit of the board to be tested comprises a capacitor C19, a capacitor C20, a capacitor C21, a capacitor C22, a capacitor C23, a capacitor C24, a capacitor C25, a resistor R31, a resistor R32, a field effect transistor Q2, a field effect transistor Q3, a triode Q4 and a triode Q5;
a first end of the capacitor C19 is connected to a first power supply, the first power supply is 3.3V, a first end of the capacitor C19 is connected to first ends of the capacitor C20, the capacitor C21, the capacitor C22, the capacitor C23, the capacitor C24 and the capacitor C25, and a second end of the capacitor C19 is connected to second ends of the capacitor C20, the capacitor C21, the capacitor C22, the capacitor C23, the capacitor C24 and the capacitor C25 and grounded;
a first end of the field-effect transistor Q2 is connected with the first power supply, a first end of the field-effect transistor Q2 is connected with first ends of the resistor R31, the resistor R32 and the field-effect transistor Q3, a second end of the resistor R31 is connected with a second end of the field-effect transistor Q2, a second end of the field-effect transistor Q2 is connected with a collector of the triode Q4, a base of the triode Q4 is connected with the MCU processor unit, an emitter of the triode Q4 is connected with an emitter of the triode Q5 and grounded, a base of the triode Q5 is connected with the MCU processor unit, a collector of the triode Q5 is connected with a second end of the resistor R32 and a second end of the field-effect transistor Q3, and a third end of the field-effect transistor Q2 is connected with a BAT + for supplying power to a board to be tested; and the third end of the field effect transistor Q3 is connected with a positive power supply VCC _ VIN of the board to be tested.
10. The multifunctional testing fixture of claim 1, wherein: the switch unit comprises a DC plug J4, a switch S1 and a resistor R47;
the second pin and the third pin of the DC plug J4 are connected to ground, the first pin of the DC plug J4 is connected to the first end of the switch S1, the first end of the switch S1 is connected to the first end of the resistor R47, the second end of the resistor R47 is connected to the second end of the switch S1 and connected to a second power supply, and the second power supply is 12+ voltage.
CN202220137627.1U 2022-01-19 2022-01-19 Multifunctional test fixture Active CN217085185U (en)

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