CN217061411U - Liquid crystal display device having a plurality of pixel electrodes - Google Patents
Liquid crystal display device having a plurality of pixel electrodes Download PDFInfo
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- CN217061411U CN217061411U CN202122941270.0U CN202122941270U CN217061411U CN 217061411 U CN217061411 U CN 217061411U CN 202122941270 U CN202122941270 U CN 202122941270U CN 217061411 U CN217061411 U CN 217061411U
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Abstract
The embodiment of the application provides a liquid crystal display device, which comprises a compensation circuit and a liquid crystal layer, wherein the compensation circuit can drive liquid crystal molecules in the liquid crystal layer to deflect. In the compensation circuit, the first transistor is a driving transistor of the liquid crystal layer, and the second transistor, the third transistor, the fourth transistor and the fifth transistor are used for compensating the first transistor. When liquid crystal molecules in the liquid crystal layer are deflected, the gate voltage of the first transistor is equal to the data voltage minus the threshold voltage of the first transistor, and the source voltage of the first transistor is equal to the voltage of the positive electrode of the power supply. The driving current I ═ k (power supply positive voltage — data voltage) of the liquid crystal layer 2 . Eliminating threshold voltage of the first transistor versus current through the liquid crystal layerThe influence of the current further reduces and avoids the difference of the turning degree of liquid crystal molecules caused by the difference of the starting voltage of the thin film transistor, thereby improving the uniformity of the liquid crystal display device.
Description
Technical Field
The application belongs to the technical field of electronic equipment, and particularly relates to a liquid crystal display device.
Background
A Thin Film Transistor Liquid Crystal Display (TFT-LCD) is a Display device that uses a Thin Film Transistor to generate a voltage to control the turning of Liquid Crystal molecules. The structure is that a liquid crystal box is arranged between two parallel glass substrates, a thin film transistor is arranged on the lower substrate glass, and a color filter is arranged on the upper substrate glass. The rotation direction of liquid crystal molecules is controlled by changing the signal and the voltage of the thin film transistor, so that the emergence of polarized light of each pixel point is controlled, and a picture is displayed.
The driving current of the liquid crystal molecules is related to the threshold voltage of the driving transistor, but the value of the threshold voltage may drift during use. The difference of the turn-on voltages of the thin film transistors causes the difference of the turning degrees of liquid crystal molecules, and finally causes the problems of uneven brightness, poor display and the like of the liquid crystal display.
SUMMERY OF THE UTILITY MODEL
The embodiment of the application provides a liquid crystal display device, which can eliminate the influence of threshold voltage on the overturning degree of liquid crystal molecules, thereby improving the problems of poor display and the like.
The embodiment of the application provides a liquid crystal display device, liquid crystal display device includes compensating circuit and liquid crystal layer, compensating circuit can drive liquid crystal molecule in the liquid crystal layer deflects, compensating circuit includes:
the grid electrode of the first transistor is electrically connected with a first node, the source electrode of the first transistor is electrically connected with the positive electrode of the power supply, and the drain electrode of the first transistor is electrically connected with a second node;
a grid electrode of the second transistor is connected with a scanning signal of the current stage, a source electrode of the second transistor is connected with a data signal of the current stage, and a drain electrode of the second transistor is electrically connected with a third node;
a third transistor having a gate connected to a previous scanning signal, a source electrically connected to the second node, and a drain electrically connected to the first node;
a fourth transistor, a gate of which is connected to a control signal, a source of which is electrically connected to the second node, and a drain of which is used for controlling the liquid crystal molecules in the liquid crystal layer to deflect;
a gate of the fifth transistor is connected to a superior scanning signal, a source of the fifth transistor is electrically connected to the positive electrode of the power supply, and a drain of the fifth transistor is electrically connected to the third node;
a first polar plate of the first capacitor is electrically connected with the positive electrode of the power supply, and a second polar plate of the first capacitor is electrically connected with the third node;
and a first polar plate of the second capacitor is electrically connected with the third node, and a second polar plate of the second capacitor is electrically connected with the first node.
Optionally, the operation cycle of the compensation circuit includes an initialization phase, a data writing phase and a light emitting phase;
in the initialization phase, the voltage of the first node is equal to the voltage of the positive pole of the power supply, and the voltage of the third node is equal to the voltage of the positive pole of the power supply;
in the data writing phase, the voltage of the first node is equal to the data voltage minus the threshold voltage of the first transistor;
in the light emitting phase, the voltage of the source electrode of the first transistor is equal to the voltage of the positive electrode of the power supply, and the voltage difference between the grid electrode and the source electrode of the first transistor is equal to the sum of the voltage of the positive electrode of the power supply and the threshold voltage of the first transistor minus the data voltage.
Optionally, in the initialization phase, the first transistor, the third transistor, and the fifth transistor are turned on, and the second transistor and the fourth transistor are turned off;
in the data writing phase, the first transistor, the second transistor and the third transistor are turned on, and the fourth transistor and the fifth transistor are turned off;
in the light emitting stage, the first transistor and the fourth transistor are turned on, and the second transistor, the third transistor, and the fifth transistor are turned off.
Optionally, in the initialization stage, the upper scanning signal is at a low level, the present scanning signal is at a high level, and the control signal is at a high level;
in the data writing stage, the superior scanning signal is at a high level, the present scanning signal is at a low level, and the control signal is at a high level;
in the light emitting stage, the superior scanning signal is at a high level, the present scanning signal is at a high level, and the control signal is at a low level.
Optionally, the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are low-temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
Optionally, the liquid crystal layer includes a plurality of pixel units, and the liquid crystal display device includes a plurality of compensation circuits, and each pixel unit is connected to one of the compensation circuits.
Optionally, the liquid crystal display device further includes an anti-polarization protection circuit, the anti-polarization protection circuit is electrically connected to the compensation circuit, and the anti-polarization protection circuit can provide two signals with opposite polarities to prevent polarization of liquid crystal molecules in the liquid crystal layer.
Optionally, the liquid crystal display device includes:
a liquid crystal control electrode, a drain electrode of the fourth transistor being electrically connected to the liquid crystal control electrode;
and the common electrode is electrically connected with the negative electrode of the power supply, the liquid crystal layer is arranged between the common electrode and the liquid crystal control electrode, and the common electrode and the liquid crystal control electrode form an electric field so as to deflect liquid crystal molecules in the liquid crystal layer.
Optionally, the liquid crystal display device includes:
the compensation circuit is arranged on the substrate, and the liquid crystal layer is arranged on one side of the substrate, on which the compensation circuit is arranged;
the backlight module is arranged on one side of the substrate, which is deviated from the compensation circuit, and the backlight module is used for emitting light.
Optionally, the first transistor includes:
a gate layer disposed on the substrate;
a gate insulating layer disposed between the gate electrode layer and the substrate;
the semiconductor layer is arranged on one side, far away from the grid electrode layer, of the grid electrode insulating layer;
the source drain layer is arranged on one side, far away from the grid insulation layer, of the semiconductor layer;
a protective film layer arranged on one side of the source drain electrode layer far away from the semiconductor layer, a via hole is arranged on the protective film layer, and the liquid crystal control electrode is connected with the source drain electrode layer through the via hole
In an embodiment of the present application, the liquid crystal display device includes a compensation circuit and a liquid crystal layer, wherein the compensation circuit can drive liquid crystal molecules in the liquid crystal layer to deflect. In the compensation circuit, the first transistor is a driving transistor of the liquid crystal layer, and the second transistor, the third transistor, the fourth transistor and the fifth transistor are used for compensating the first transistor. When liquid crystal molecules in the liquid crystal layer are deflected, the gate voltage of the first transistor is equal to the data voltage minus the threshold voltage of the first transistor, and the source voltage of the first transistor is equal to the voltage of the positive electrode of the power supply. The driving current of the liquid crystal layer I ═ k (power supply positive voltage-data voltage) 2 . The influence of the threshold voltage of the first transistor on the current flowing through the liquid crystal layer is eliminated, and the difference of the turning degree of liquid crystal molecules caused by the difference of the starting voltage of the thin film transistor is further reduced, so that the uniformity of the liquid crystal display device is improved.
Drawings
The technical solutions and advantages of the present application will become apparent from the following detailed description of specific embodiments of the present application when taken in conjunction with the accompanying drawings.
Fig. 1 is a schematic structural diagram of a liquid crystal display device according to an embodiment of the present application.
Fig. 2 is a schematic diagram of a screen end structure of a liquid crystal display device in an embodiment of the present application.
Fig. 3 is a schematic structural diagram of a compensation circuit according to an embodiment of the present disclosure.
Fig. 4 is a schematic diagram of the compensation circuit of fig. 3 at an initialization stage.
FIG. 5 is a diagram illustrating the compensation circuit of FIG. 3 during a data writing phase.
Fig. 6 is a schematic diagram of the compensation circuit in fig. 3 at a light emitting stage.
Fig. 7 is a timing diagram of the compensation circuit of fig. 3.
FIG. 8 is a schematic diagram of a first transistor
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It should be apparent that the described embodiments are only a few embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
At present, technology information products are all developed towards lightness and thinness, and display products with a long history in the periphery of computers are certainly no exception. On the premise of being convenient to carry and transport, the conventional display methods such as CRT video display and LED display are all limited by the factors of too large volume or huge power consumption, and thus cannot meet the actual requirements of users. The development of the liquid crystal display technology is just in line with the trend of the current information products, and the liquid crystal display device has the advantages of right-angle display, low power consumption, small volume, zero radiation and the like, and can enable users to enjoy better visual environments.
Liquid crystal displays are one type of display used in digital watches and many portable computers. Liquid crystal displays use two sheets of polarizing material with a liquid crystal layer between them. When current passes through the liquid crystal layer, the liquid crystal molecules are rearranged, so that the transmittance of light is changed. Each liquid crystal molecule acts like a louver, allowing light to pass through and blocking light. The thin film transistor liquid crystal display is a display which utilizes the thin film transistor to generate voltage to control the liquid crystal molecule to turn, and the structure is that a liquid crystal box is arranged between two parallel glass substrates, the thin film transistor is arranged on the lower substrate glass, and the color filter is arranged on the upper substrate glass. The rotation direction of the liquid crystal molecules is controlled by changing the signal and the voltage of the thin film transistor, so that the emergence of polarized light of each pixel point is controlled, and a picture is displayed.
Conventional liquidIn the display, only one thin film transistor is used for controlling liquid crystal molecules, and the calculation formula of the driving current of the liquid crystal is I LCD ＝k(Vgs-Vth) 2 Wherein, I LCD Is the drive current; k is the current amplification coefficient of the driving transistor and is determined by the electrical characteristics of the driving transistor; vgs is the voltage difference between the gate and source of the drive transistor and Vth is the threshold voltage of the drive transistor. It can be seen that the drive current I LCD Related to the threshold voltage Vth of the drive transistor. However, as the device ages or changes in temperature, the threshold voltage Vth of the drive transistor may shift, resulting in the drive current I LCD The display quality is affected by variations in brightness of the liquid crystal display panel, display defects, and the like.
Referring to fig. 1 and fig. 2, fig. 1 is a schematic structural diagram of a liquid crystal display device according to an embodiment of the present application, and fig. 2 is a schematic structural diagram of a screen of the liquid crystal display device according to the embodiment of the present application. The lcd device 100 may be any product or component with display function, such as a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, etc., and is not limited herein. The liquid crystal display device 100 comprises a compensation circuit 1 and a liquid crystal layer 5, wherein the compensation circuit 1 can drive liquid crystal molecules in the liquid crystal layer 5 to deflect, the liquid crystal layer 5 comprises a plurality of pixel units, the liquid crystal display device 100 comprises a plurality of compensation circuits 1, and each pixel unit is connected with one of the compensation circuits 1.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a compensation circuit 1 applied to a liquid crystal display device according to an embodiment of the present disclosure, in which the compensation circuit 1 includes a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a first capacitor C1, and a second capacitor C2. The first transistor T1 is a driving transistor, and compared with a conventional control circuit, the embodiment of the present application adds another four transistors to compensate the first transistor T1, and the four transistors cooperate with each other to maintain the driving current received by the liquid crystal layer 5 not to be affected by the threshold voltage of the driving transistor, thereby avoiding the occurrence of the inversion difference of the liquid crystal molecules and improving the problem of poor display.
The first transistor T1 has a gate electrically connected to the first node N, a source electrically connected to the positive power supply electrode, and a drain electrically connected to the second node P.
The gate of the second transistor T2 is connected to the present scan signal scan (n), the source is connected to the present data signal data (n), and the drain is electrically connected to the third node Q.
A gate of the third transistor T3 is connected to a higher scan signal scan (N-1), a source thereof is electrically connected to the second node P, and a drain thereof is electrically connected to the first node N.
The gate of the fourth transistor T4 is connected to the control signal em (n), the source is electrically connected to the second node P, and the drain is connected to the gate for controlling the liquid crystal molecules in the liquid crystal layer 5 to deflect.
A gate of the fifth transistor T5 is connected to a higher scan signal scan (n-1), a source thereof is electrically connected to the positive electrode of the power supply, and a drain thereof is electrically connected to the third node Q.
The first plate of the first capacitor C1 is electrically connected to the positive electrode of the power supply, and the second plate is electrically connected to the third node Q.
The first pole plate of the second capacitor C2 is electrically connected to the third node Q, and the second pole plate is electrically connected to the first node N.
It is understood that the first node N is electrically connected to the second plate of the second capacitor C2, the gate of the first transistor T1, and the drain of the third transistor T3 at the same time. The second node P is simultaneously electrically connected to the drain electrode of the first transistor T1, the source electrode of the third transistor T3, and the source electrode of the fourth transistor T4. The third node Q is electrically connected to the drain of the second transistor T2, the drain of the fifth transistor T5, the second plate of the first capacitor C1, and the first plate of the second capacitor C2.
The operation cycle of the compensation circuit 1 includes an initialization phase a1, a data writing phase a2, and a light emitting phase A3. Referring to fig. 4, 5 and 6, fig. 4 is a schematic diagram of the compensation circuit in fig. 3 in an initialization stage, fig. 5 is a schematic diagram of the compensation circuit in fig. 3 in a data writing stage, and fig. 6 is a schematic diagram of the compensation circuit in fig. 3 in a light emitting stage.
The degree of deflection of the liquid crystal molecules varies depending on the screen. When the display of the previous frame is completed, the liquid crystal molecules still maintain the previous deflection state, and each transistor in the compensation circuit 1 also remains in the state of the previous frame. Therefore, after the previous frame is displayed, the driving circuit needs to be initialized so that the next frame can be displayed normally. In the initialization stage a1, the voltage of the first node N is equal to the voltage VCC of the power supply anode, and the voltage of the third node Q is equal to the voltage VCC of the power supply anode. It is understood that, during the initialization phase a1, the first capacitor C1 and the second capacitor C2 are both in a short circuit state.
After the initialization is completed, the data writing phase a2 is entered, and the data signal data (n) is stored in the first capacitor C1 and the second capacitor C2 through the second transistor T2. In addition, the on voltage of the first transistor T1 is also stored in the first capacitor C1 and the second capacitor C2, and at this time, the voltage of the first node N is equal to the data voltage Vdata minus the threshold voltage Vth of the first transistor T1.
In the lighting phase a3, the source voltage of the first transistor T1 is equal to the power supply positive voltage, i.e., Vs equals VCC. At this time, the gate voltage of the first transistor T1 is equal to the data voltage Vdata minus the threshold voltage Vth of the first transistor T1, i.e., Vg ═ Vdata-Vth, Vgs ═ Vs — Vg ═ VCC — (Vdata-Vth). Substituting drive current formula, I ═ k (Vgs-Vth) 2 ＝(VCC—(Vdata—Vth)—Vth) 2 . It can be seen that the current flowing through the liquid crystal layer 5 is independent of the threshold voltage Vth of the first transistor T1. The compensation circuit 1 provided by the embodiment of the application eliminates the influence of the threshold voltage Vth of the first transistor T1 on the driving current, thereby improving the uniformity of display.
It should be noted that, in the initialization phase a1, the upper scan signal scan (n-1) is used as the initialization signal of the current row for resetting the first capacitor C1 and the second capacitor C2. At this time, the first transistor T1, the third transistor T3, and the fifth transistor T5 are turned on, and the second transistor T2 and the fourth transistor T4 are turned off, so that the voltage of the first node N and the voltage of the third node Q are equal to the power supply positive electrode voltage.
In the data write phase a2, the first transistor T1, the second transistor T2, and the third transistor T3 are turned on, and the fourth transistor T4 and the fifth transistor T5 are turned off; at this time, the voltage of the first node N is equal to the data voltage Vdata minus the threshold voltage Vth of the first transistor T1.
In the light emitting phase a3, the first transistor T1 and the fourth transistor T4 are turned on, and the second transistor T2, the third transistor T3 and the fifth transistor T5 are turned off. At this time, the voltage at the source of the first transistor T1 is made equal to the voltage VCC of the power supply anode.
The first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are low-temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
Illustratively, each transistor is a P-type transistor that is turned on when the gate is low and turned off when the gate is high. Referring to fig. 7, fig. 7 is a timing diagram of the compensation circuit of fig. 3. In the initialization phase a1, the upper scan signal scan (n-1) is at a low level, and the first transistor T1, the third transistor T3 and the fifth transistor T5 are turned on. The scan signal scan (n) is at a high level, and the control signal em (n) is at a high level, so that the fourth transistor T4 and the second transistor T2 are turned off. Referring to fig. 5, fig. 5 is a timing diagram of the compensation circuit of fig. 1.
In the data write phase a2, the upper scan signal scan (n-1) is high, the current scan signal scan (n) is low, and the control signal em (n) is high. At this time, the first transistor T1, the second transistor T2, and the third transistor T3 are turned on, and the fourth transistor T4 and the fifth transistor T5 are turned off.
In the light emitting period a3, if the upper scan signal scan (n-1) is at a high level, the current scan signal scan (n) of the third transistor T3 is at a high level, and the emission signal is at a low level. At this time, the first transistor T1 and the fourth transistor T4 are turned on, and the second transistor T2, the third transistor T3 and the fifth transistor T5 are turned off.
The liquid crystal display device 100 includes a liquid crystal panel assembly, a data driver and a gate driver connected to the liquid crystal panel assembly, a gray voltage generator connected to the data driver, a timing controller for controlling the gate driver and the data driver, and a dc-to-dc power supply for supplying power to the liquid crystal display. The liquid crystal panel assembly comprises a liquid crystal control electrode 6 and a common electrode 7 which correspond to each other, and a liquid crystal layer 5 which is clamped between the liquid crystal control electrode 6 and the common electrode 7, wherein the common electrode 7 is electrically connected with a negative electrode of a power supply. The liquid crystal control electrode 6 and the common electrode 7 are respectively disposed at both sides of the liquid crystal layer 5, and supply a voltage to the liquid crystal layer 5 to invert liquid crystal molecules.
The liquid crystal display device 100 further comprises a substrate 4, the compensation circuit 1 is disposed on the substrate 4, and the liquid crystal layer 5 is disposed on one side of the substrate 4 where the compensation circuit 1 is disposed. The backlight module is arranged on one side of the substrate 4 departing from the compensation circuit 1, and the backlight module is used for emitting light. It is understood that the light emitted from the backlight unit passes through the liquid crystal layer 5 and the color filter to display different colors and gray scales.
If the pulse signal with the same polarity is continuously supplied to the liquid crystal layer 5, the liquid crystal molecules are continuously in the electric field formed by the bias in the same direction, and the polarization phenomenon is easily generated, so that the rotation characteristic is gradually lost, and the liquid crystal display device 100 cannot normally display the image, thereby affecting the display effect of the liquid crystal display device 100. Therefore, the liquid crystal display device 100 further includes an anti-polarization protection circuit electrically connected to the compensation circuit 1, which is capable of providing two signals of opposite polarities to prevent polarization of liquid crystal molecules in the liquid crystal layer 5. Illustratively, the anti-polarization protection circuit may include an inverter.
Referring to fig. 8, fig. 8 is a schematic structural diagram of the first transistor. The first transistor T1 includes:
a gate layer 12 disposed on the substrate 4;
a gate insulating layer 13, the gate electrode layer 12 being disposed between the gate insulating layer 13 and the substrate 4;
a semiconductor layer 14 disposed on a side of the gate insulating layer 13 away from the gate layer 12;
the source and drain layers 15 are arranged on one side, away from the gate insulating layer 13, of the semiconductor layer 14, and the source and drain layers 15 can form a source and a drain of the first transistor T1;
the protective film layer 16 is arranged on one side, away from the semiconductor layer 14, of the source drain layer 15, a through hole 17 is formed in the protective film layer 16, and the liquid crystal control electrode 6 is connected with the source drain layer 15 through the through hole 17. It is understood that the protective film layer 16 can form a specific connection channel between the source electrode and the drain electrode. The compensation circuit 1 is able to charge the liquid crystal layer 5 via the liquid crystal control electrode 6 to deflect the molecules in the liquid crystal layer 5.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to the related descriptions of other embodiments.
The principle and implementation of the present application are explained in the foregoing for the liquid crystal display device provided in the embodiments of the present application by applying specific examples, and the above description of the embodiments is only used to help understanding the method and the core idea of the present application; meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (7)
1. A liquid crystal display device, comprising a compensation circuit and a liquid crystal layer, wherein the compensation circuit is capable of driving liquid crystal molecules in the liquid crystal layer to deflect, the compensation circuit comprising:
the grid electrode of the first transistor is electrically connected with a first node, the source electrode of the first transistor is electrically connected with the positive electrode of the power supply, and the drain electrode of the first transistor is electrically connected with a second node;
a grid electrode of the second transistor is connected with a scanning signal of the current stage, a source electrode of the second transistor is connected with a data signal of the current stage, and a drain electrode of the second transistor is electrically connected with a third node;
a third transistor having a gate connected to a previous scanning signal, a source electrically connected to the second node, and a drain electrically connected to the first node;
a fourth transistor, a gate of which is connected to a control signal, a source of which is electrically connected to the second node, and a drain of which is used for controlling the liquid crystal molecules in the liquid crystal layer to deflect;
a gate of the fifth transistor is connected to a superior scanning signal, a source of the fifth transistor is electrically connected to the positive electrode of the power supply, and a drain of the fifth transistor is electrically connected to the third node;
a first polar plate of the first capacitor is electrically connected with the positive electrode of the power supply, and a second polar plate of the first capacitor is electrically connected with the third node;
and a first polar plate of the second capacitor is electrically connected with the third node, and a second polar plate of the second capacitor is electrically connected with the first node.
2. The liquid crystal display device according to claim 1, wherein the first transistor, the second transistor, the third transistor, the fourth transistor, and the fifth transistor are low-temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
3. The liquid crystal display device of claim 1, wherein the liquid crystal layer comprises a plurality of pixel units, and the liquid crystal display device comprises a plurality of compensation circuits, each pixel unit being connected to one of the compensation circuits.
4. The liquid crystal display device according to claim 3, further comprising an anti-polarization protection circuit electrically connected to the compensation circuit, the anti-polarization protection circuit being capable of providing two signals of opposite polarities to prevent polarization of liquid crystal molecules in the liquid crystal layer.
5. The liquid crystal display device according to claim 4, further comprising:
a liquid crystal control electrode, a drain electrode of the fourth transistor being electrically connected to the liquid crystal control electrode;
and the common electrode is electrically connected with the negative electrode of the power supply, the liquid crystal layer is arranged between the common electrode and the liquid crystal control electrode, and the common electrode and the liquid crystal control electrode form an electric field so as to deflect liquid crystal molecules in the liquid crystal layer.
6. The liquid crystal display device according to claim 5, further comprising:
the compensation circuit is arranged on the substrate, and the liquid crystal layer is arranged on one side of the substrate, which is provided with the compensation circuit;
the backlight module is arranged on one side of the substrate, which is deviated from the compensation circuit, and the backlight module is used for emitting light.
7. The liquid crystal display device according to claim 6, wherein the first transistor comprises:
a gate layer disposed on the substrate;
a gate insulating layer disposed between the gate electrode layer and the substrate;
the semiconductor layer is arranged on one side, far away from the grid electrode layer, of the grid electrode insulating layer;
the source drain layer is arranged on one side, far away from the grid insulation layer, of the semiconductor layer;
the protective film layer is arranged on one side, away from the semiconductor layer, of the source drain electrode layer, a through hole is formed in the protective film layer, and the liquid crystal control electrode is connected with the source drain electrode layer through the through hole.
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| CN202122941270.0U CN217061411U (en) | 2021-11-25 | 2021-11-25 | Liquid crystal display device having a plurality of pixel electrodes |
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