CN217010822U - Gain self-adaptive signal amplification circuit structure and ultrasonic metering module - Google Patents
Gain self-adaptive signal amplification circuit structure and ultrasonic metering module Download PDFInfo
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Abstract
The utility model relates to a gain self-adaptive signal amplification circuit structure and an ultrasonic metering module, wherein the gain self-adaptive signal amplification circuit structure comprises: the output end of the amplifying circuit is connected with the input end of the peak value sampling circuit, and the output end of the peak value sampling circuit is connected with the feedback input end of the amplifying circuit; the amplifying circuit is used for amplifying a signal to be amplified and then outputting the amplified signal; and the peak value sampling circuit is used for sampling the peak voltage of the signal output by the amplifying circuit and outputting the peak voltage to the amplifying circuit so as to adjust the amplifying gain of the amplifying circuit according to the peak voltage. The circuit has no active device, does not need program control, and greatly reduces the complexity of the circuit structure.
Description
Technical Field
The utility model relates to the technical field of amplification circuits, in particular to a gain self-adaptive signal amplification circuit structure and an ultrasonic metering module.
Background
With the development of ultrasonic technology, the application of ultrasonic measurement in a gas meter is becoming mature. The ultrasonic metering module is used as a core component, bears the functions of signal detection and flow calculation, and directly influences the accuracy and reliability of gas meter metering.
In an actual metering scene, the size of the ultrasonic signal changes along with the influence of the measurement conditions such as gas quality, flow, temperature, pressure and the like. In order to adapt to the metering application in multiple scenes, the gain of the signal amplification module in the ultrasonic signal conditioning module is generally designed to be adjustable.
Currently, a common scheme generally implements gain adjustability by peak sampling, an adjustable gain operational amplifier, and a DAC in cooperation with program control, as shown in fig. 5. The peak value sampling is used for obtaining the peak voltage of the ultrasonic echo signal, and the MCU adjusts the gain of the operational amplifier by comparing the returned voltage value, so that the peak value of the echo signal is always in a reasonable range, and the adaptability to multi-scene application is realized.
The above solution has at least the following drawbacks:
1. according to the scheme, high-power-consumption chips such as a DAC (digital-to-analog converter) and an adjustable gain amplifier are used, so that the overall low-power-consumption design is difficult.
2. The ultrasonic signal is a tiny signal, and the requirements on performance such as noise, temperature drift and the like are high, so that the type selection of the device is difficult.
3. The high-performance DAC and the adjustable gain amplifier are high in price, and the implementation cost of the scheme is high.
4. The gears of part of the adjustable gain amplifiers are fixed, and the fine adjustment of signals cannot be realized.
5. The program control is required, the ultrasonic signal receiving and transmitting time sequence is strictly matched, and the program complexity is high.
SUMMERY OF THE UTILITY MODEL
The application provides a gain self-adaptation signal amplification circuit structure, ultrasonic wave measurement module, this circuit structure does not use the initiative device, need not program control to the complexity of circuit structure has been reduced.
A first aspect provides a gain adaptive signal amplifying circuit structure, including:
the output end of the amplifying circuit is connected with the input end of the peak value sampling circuit, and the output end of the peak value sampling circuit is connected with the feedback input end of the amplifying circuit;
the amplifying circuit is used for amplifying a signal to be amplified and then outputting the amplified signal; the peak value sampling circuit is used for sampling the peak value voltage of the signal output by the amplifying circuit and outputting the peak value voltage to the amplifying circuit so as to adjust the amplifying gain of the amplifying circuit according to the peak value voltage.
In some embodiments, the amplifying circuit includes a first amplifying circuit and a second amplifying circuit connected in series; the second amplifying circuit comprises a gain adjusting module and a signal amplifying module, wherein the output end of the gain adjusting module is connected with the input end of the signal amplifying module, and the input end of the gain adjusting module is connected with the output end of the peak value sampling circuit; the peak value sampling circuit outputs the peak value voltage to the gain adjusting module so as to adjust the gain resistance of the gain adjusting module according to the peak value voltage.
In some embodiments, the gain adjustment module includes a voltage division unit and an adjustable resistance unit, an output end of the voltage division unit is connected to an input end of the adjustable resistance unit, and an input end of the voltage division unit is connected to an output end of the peak value sampling circuit; the voltage dividing unit is used for attenuating the peak voltage and then outputting the attenuated peak voltage to the adjustable resistance unit so as to adjust the gain resistance of the adjustable resistance unit.
In some embodiments, the voltage dividing unit includes a second resistor R2 and a third resistor R3 connected in series, the other end of the second resistor R2 is connected to ground, and the other end of the third resistor R3 is connected to the output end of the peak sampling circuit;
the adjustable resistance unit comprises a triode Q1, a second capacitor C2 and a seventh resistor R7; the gate of the triode Q1 is connected between the second resistor R2 and the third resistor R3, the source is connected to one end of the second capacitor C2, and the drain is connected to one end of the seventh resistor R7; the other end of the second capacitor C2 is grounded, and the other end of the seventh resistor R7 is connected with the signal amplification module;
the signal amplification module comprises a third amplifier U3, a fifth capacitor C5 and a fifth resistor R5, wherein the output end of the third amplifier U3 is the output end of the amplification circuit; one end of the fifth capacitor C5 is connected to the positive input end of the third amplifier U3, and the other end is connected to the output end of the first amplifying circuit; one end of the fifth resistor R5 is connected with the negative input end of the third amplifier U3, and the other end of the fifth resistor R5 is connected with the output end of the third amplifier U3; one end of the fifth resistor R5 is connected with the other end of the seventh resistor R7.
In some embodiments, the signal amplification module further comprises a third capacitor C3, and the third capacitor C3 is connected in parallel with the fifth resistor R5.
In some embodiments, the first amplification circuit comprises: a fourth amplifier U4, a sixth capacitor C6, a sixth resistor R6, an eighth resistor R8 and a seventh capacitor C7;
the positive input end of the fourth amplifier U4 is the input end of the amplifying circuit and is connected with the sixth capacitor C6, and the output end of the fourth amplifier U4 is connected with the input end of the second amplifying circuit; one end of the sixth resistor R6 is connected with the negative input end of the fourth amplifier U4, and the other end of the sixth resistor R6 is connected with the output end of the fourth amplifier U4; one end of the eighth resistor is connected with one end of the sixth resistor R6, and the other end of the eighth resistor is connected with one end of the seventh capacitor C7; the other end of the seventh capacitor C7 is grounded.
In some embodiments, the first amplifying circuit further comprises a fourth capacitor C4, and the fourth capacitor C4 is connected in parallel with the sixth resistor R6.
In some embodiments, the peak sampling circuit comprises: the circuit comprises a first amplifier U1, a second amplifier U2, a first diode D1, a second diode D2, a first capacitor C1 and a fourth resistor R4;
wherein the positive input end of the first amplifier U1 is the input end of the peak value sampling circuit, and the output end of the second amplifier U2 is the output end of the peak value sampling circuit; the output end of the first amplifier U1 is connected with the anode of the first diode D1, and the cathode of the first diode D1 is connected with the positive input end of the second amplifier U2; the negative input end of the first amplifier U1 is connected with the anode of the second diode D2, and the cathode of the second diode D2 is connected with the anode of the first diode D1; the negative input end of the first amplifier U1 is connected with one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected with the negative input end of the second amplifier U2; the negative input end of the second amplifier U2 is connected with the output end of the second amplifier U2; one end of the first capacitor C1 is connected to the cathode of the first diode D1, and the other end is grounded.
In some embodiments, the peak sampling circuit further comprises: a first resistor R1, the first resistor R1 being connected to the positive input of the first amplifier U1.
A second aspect provides an ultrasonic metering module, which includes a gain adaptive signal amplification circuit structure, where the gain adaptive signal amplification circuit structure is the gain adaptive signal amplification circuit structure described above.
According to the gain self-adaptive signal amplification circuit structure and the ultrasonic metering module, the gain of the amplification circuit is adjustable, the gain of the amplification circuit is adjusted according to the peak voltage of the signal output by the amplification circuit sampled by the peak sampling circuit, the circuit structure is not provided with an active device, the self-adaptive adjustment of the gain is realized through a hardware circuit, program control is not needed, and the complexity of a system is greatly reduced. Meanwhile, the whole circuit is a passive device except the operational amplifier, so that the circuit is low in power consumption, simple in design, low in implementation cost and higher in reliability.
Drawings
Fig. 1 is a block diagram of a gain adaptive signal amplification circuit according to the present application;
FIG. 2 is a schematic diagram of a first amplifying circuit of the gain adaptive signal amplifying circuit structure according to the present application;
FIG. 3 is a schematic diagram of a second amplifying circuit and a gain adjusting circuit of the gain adaptive signal amplifying circuit structure according to the present application;
FIG. 4 is a schematic diagram of a peak sampling circuit of the gain adaptive signal amplifying circuit structure according to the present application;
fig. 5 is a block diagram of a current circuit for realizing adjustable gain.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the utility model and are not intended to limit the utility model.
It will be understood that, as used herein, the terms "first," "second," and the like may be used herein to describe various elements, but these elements should not be limited by these terms. These terms are only used to distinguish one element from another.
As shown in fig. 1 to 4, a gain adaptive signal amplifying circuit structure of the present embodiment includes: the output end of the amplifying circuit is connected with the input end of the peak value sampling circuit, and the output end of the peak value sampling circuit is connected with the feedback input end of the amplifying circuit;
the amplifying circuit is used for amplifying a signal to be amplified and then outputting the amplified signal; and the peak value sampling circuit is used for sampling the peak voltage of the signal output by the amplifying circuit and outputting the peak voltage to the amplifying circuit so as to adjust the amplifying gain of the amplifying circuit according to the peak voltage.
The working principle of the gain adaptive signal amplifying circuit structure of the embodiment is as follows: the amplifying circuit amplifies and outputs a signal to be amplified (such as an ultrasonic signal), the signal amplified by the peak value sampling circuit is sampled to obtain a peak voltage of the amplified signal, and the peak voltage is input to the amplifying circuit to adjust a gain resistor of the amplifying circuit, so that the amplifying gain of the amplifying circuit is adjusted.
The circuit structure in the embodiment does not use an active device, realizes the self-adaptive adjustment of the gain through a hardware circuit, does not need program control, and greatly reduces the complexity of the system. Meanwhile, the whole circuit is a passive device except the operational amplifier, so that the circuit is low in power consumption, simple in design, low in implementation cost and higher in reliability.
In some embodiments, in the above circuit structure, the amplifying circuit includes a first amplifying circuit and a second amplifying circuit connected in sequence; the second amplifying circuit comprises a gain adjusting module and a signal amplifying module, wherein the output end of the gain adjusting module is connected with the input end of the signal amplifying module, and the input end of the gain adjusting module is connected with the output end of the peak value sampling circuit; the peak value sampling circuit outputs a peak value voltage to the gain adjusting module so as to adjust the gain resistance of the gain adjusting module according to the peak value voltage.
In this embodiment, the first amplifying circuit amplifies a signal to be amplified for one time, the amplified signal is input to the second amplifying circuit with adjustable gain to be amplified, the peak sampling circuit samples a peak signal of a signal output after the secondary amplification, and the gain resistance of the second amplifying circuit is adjusted according to the peak voltage, so as to adjust the amplification gain of the second amplifying circuit.
Further, the two-stage amplifying circuit in this example includes, but is not limited to, an inverse proportional amplifying circuit, a bipolar power source amplifying circuit, and the like. The amplifying circuit is powered by a bipolar power supply, extra bias voltage is not needed, the operational state of the operational amplifier is more stable, and the performance of the circuit is favorably improved.
In some embodiments, the gain adjustment module includes a voltage division unit and an adjustable resistance unit, an output end of the voltage division unit is connected with an input end of the adjustable resistance unit, and an input end of the voltage division unit is connected with an output end of the peak value sampling circuit; the voltage dividing unit is used for attenuating the peak voltage and outputting the attenuated peak voltage to the adjustable resistance unit so as to adjust the gain resistance of the adjustable resistance unit.
In this embodiment, the voltage dividing unit attenuates the peak voltage and outputs the attenuated peak voltage to the adjustable resistance unit, where the attenuated voltage can change the resistance of the adjustable resistance unit, and the change of the resistance of the adjustable resistance unit changes the amplification gain of the second amplification circuit, thereby implementing adaptive adjustment of a signal input to the amplification circuit.
In a specific circuit configuration, as shown in fig. 2, a specific circuit configuration of a first amplification circuit, the first amplification circuit includes: a fourth amplifier U4, a sixth capacitor C6, a sixth resistor R6, an eighth resistor R8 and a seventh capacitor C7;
the positive Input end of the fourth amplifier U4 is the Input end of the amplifying circuit, and is used for inputting a Signal to be amplified and primarily amplifying the Signal to be amplified, the Input end (Signal _ Input) is connected to the sixth capacitor C6, and the output end of the fourth amplifier U4 is connected to the Input end of the second amplifying circuit; one end of the sixth resistor R6 is connected with the negative input end of the fourth amplifier U4, and the other end of the sixth resistor R6 is connected with the output end of the fourth amplifier U4; one end of the eighth resistor is connected with one end of the sixth resistor R6, and the other end of the eighth resistor is connected with one end of the seventh capacitor C7; the other terminal of the seventh capacitor C7 is connected to ground.
Further, the first amplifying circuit further includes a fourth capacitor C4, and the fourth capacitor C4 is connected in parallel with the sixth resistor R6. The fourth capacitor C4 is used to increase circuit stability.
In fig. 2, a signal to be amplified is input to the amplifying circuit through a sixth capacitor C6, the sixth capacitor C6 is an input blocking capacitor, a reference voltage monitoring point Vref is arranged between the positive input ends of the sixth capacitor C6 and the fourth amplifier U4, Vref is a direct current bias voltage, the sixth resistor R6 and the fourth capacitor C4 are a feedback resistor and a feedback capacitor, the eighth resistor R8 is a gain resistor, the seventh capacitor C7 is a feedback blocking capacitor, and the fourth amplifier U4 forms a homodromous amplifying circuit, and the amplification gain of the first amplifying circuit is determined by the ratio of the sixth resistor R6 to the eighth resistor R8. The signal output by the output end of the fourth amplifier U4 in the first amplifying circuit is V1, and is output to the second amplifying circuit, and the input and output signal relationship of the first amplifying circuit is:
in a specific circuit structure, as shown in fig. 3, in the specific circuit structure of the second amplifying circuit, the voltage dividing unit includes a second resistor R2 and a third resistor R3 connected in series, the other end of the second resistor R2 is grounded, and the other end of the third resistor R3 is connected to the output end of the peak sampling circuit;
the adjustable resistance unit comprises a triode Q1, a second capacitor C2 and a seventh resistor R7; a gate of the triode Q1 is connected between the second resistor R2 and the third resistor R3, a source is connected to one end of the second capacitor C2, and a drain is connected to one end of the seventh resistor R7; the other end of the second capacitor C2 is grounded, and the other end of the seventh resistor R7 is connected with the signal amplification module;
the signal amplification module comprises a third amplifier U3, a fifth capacitor C5 and a fifth resistor R5, wherein the output end of the third amplifier U3 is the output end of the amplification circuit; one end of the fifth capacitor C5 is connected with the positive input end of the third amplifier U3, and the other end is connected with the output end of the first amplifying circuit; one end of the fifth resistor R5 is connected with the negative input end of the third amplifier U3, and the other end of the fifth resistor R5 is connected with the output end of the third amplifier U3; one end of the fifth resistor R5 is connected to the other end of the seventh resistor R7.
In fig. 3, the peak voltage V3 output by the peak sampling circuit is input into a voltage dividing unit, i.e., a voltage dividing chain formed by the second resistor R2 and the third resistor R3, and the voltage dividing chain attenuates V3; the second capacitor C2 is a feedback blocking capacitor and blocks the direct current gain link; a seventh resistor R7 in the adjustable resistance unit is a preset gain resistor and is used as a default gain value when the circuit is started; the triode Q1 is an MOS tube, works in a linear region and serves as an adjustable resistor, the voltage (attenuated voltage) output by the voltage division unit can change the resistance of the triode Q1, and the voltage division unit and the adjustable resistor unit form a gain adjustment circuit. The fifth capacitor C5 is a dc blocking capacitor, the fifth resistor R5 is a feedback resistor, the third capacitor C3 is a feedback capacitor, and forms a signal amplification module together with the third amplifier U3 and the gain adjustment circuit. The Signal V1 output by the first amplification circuit is input to the second amplification circuit (i.e., the positive input terminal of the third amplifier U3) via the fifth capacitor, amplified for the second time, and then output, where the output terminal of the third amplifier U3 is the output terminal (Signal _ Out) of the amplification circuit. And a reference voltage monitoring point Vref is arranged between the positive input end of the fifth capacitor C5 and the positive input end of the third amplifier U3.
The gain adjusting module and the signal amplifying module form a second amplifying circuit, the ratio of the resistance of the fifth resistor R5 to the resistance of the seventh resistor R7 and the resistor Q1 determines the amplification gain of the second amplifying circuit, the resistance of the transistor Q1 is changed according to the peak voltage of the output signal of the amplifying circuit, and thus the amplification gain of the second amplifying circuit is changed according to the peak voltage. After the signal to be amplified is amplified by the amplifying circuit, the peak value sampling circuit detects the amplified signal, the obtained peak value voltage of the signal is attenuated by a preset voltage division chain, and the attenuated voltage is used for the gain adjusting circuit. The MOS tube in the gain adjusting circuit works and linearly presents a resistance value with a fixed proportion through the size of the grid input voltage, so that the gain of the second amplifying circuit is changed, and the self-adaptive adjustment of ultrasonic signal amplification is realized. The overall input-output relationship of the second amplifying circuit is as follows:
further, the signal amplification module further includes a third capacitor C3, and the third capacitor C3 is connected in parallel with the fifth resistor R5. The third capacitor C3 is used to increase circuit stability.
In a specific circuit configuration, as shown in fig. 4, a specific circuit configuration of a peak value sampling circuit, the peak value sampling circuit includes: a first amplifier U1, a second amplifier U2, a first diode D1, a second diode D2, a first capacitor C1 and a fourth resistor R4;
the positive input end of the first amplifier U1 is the input end of the peak value sampling circuit, and the output end of the second amplifier U2 is the output end of the peak value sampling circuit; the output terminal of the first amplifier U1 is connected to the anode of a first diode D1, and the cathode of the first diode D1 is connected to the positive input terminal of the second amplifier U2; the negative input end of the first amplifier U1 is connected with the anode of a second diode D2, and the cathode of the second diode D2 is connected with the anode of a first diode D1; the negative input end of the first amplifier U1 is connected with one end of a fourth resistor R4, and the other end of the fourth resistor R4 is connected with the negative input end of a second amplifier U2; the negative input end of the second amplifier U2 is connected with the output end of the second amplifier U2; one end of the first capacitor C1 is connected to the cathode of the first diode D1, and the other end is grounded.
In fig. 4, the first amplifier U1 and the second amplifier U2 are voltage followers and are respectively used as an input (V2) buffer and an output (V3) buffer; the second diode D2 and the fourth resistor R4 are feedback diodes and resistors, and are used for compensating the voltage drop across the first diode D1; the first diode D1 is an anti-reverse diode and limits the current direction; the first capacitor C1 is an energy storage capacitor, and the first capacitor C1 records the peak voltage sampled by the peak sampling circuit, i.e. the voltage of the first capacitor C1 is always kept as the peak voltage. The fourth resistor R4 is used to compensate for the voltage drop across the second diode D2. The input and output signal relationship of the peak value sampling circuit is as follows: v3 ═ VpV2。
Further, the peak sampling circuit further includes: a first resistor R1, a first resistor R1 is connected to the positive input of the first amplifier U1. The first resistor R1 and the first resistor R1 are input resistors for limiting input current and performing impedance matching.
In some embodiments, the first amplification circuit and the second amplification circuit are both powered by a bipolar power supply. Extra bias voltage is not needed any more, the operating state of the operational amplifier is more stable, and the performance of the circuit is favorably improved.
Further, the peak value sampling circuit is formed on an integrated chip having a peak value sampling function. The peak value sampling circuit adopts an integrated chip form, the voltage sampling precision is higher, and the circuit integration level is higher.
And other complex analog electronic load circuits are adopted, so that the precision and the range of the adjustable gain can be effectively improved.
The present embodiment provides an ultrasonic measurement module, which includes a gain adaptive signal amplification circuit structure, where the gain adaptive signal amplification circuit structure is the gain adaptive signal amplification circuit structure described in the foregoing embodiment.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and can include the processes of the embodiments of the methods described above when the computer program is executed. The storage medium may be a non-volatile storage medium such as a magnetic disk, an optical disk, a Read-Only Memory (ROM), or a Random Access Memory (RAM).
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above examples only show some embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A gain adaptive signal amplification circuit structure, comprising: the output end of the amplifying circuit is connected with the input end of the peak value sampling circuit, and the output end of the peak value sampling circuit is connected with the feedback input end of the amplifying circuit;
the amplifying circuit is used for amplifying a signal to be amplified and then outputting the amplified signal; the peak value sampling circuit is used for sampling the peak value voltage of the signal output by the amplifying circuit and outputting the peak value voltage to the amplifying circuit so as to adjust the amplifying gain of the amplifying circuit according to the peak value voltage.
2. The gain adaptive signal amplifying circuit structure according to claim 1, wherein the amplifying circuit includes a first amplifying circuit and a second amplifying circuit connected in series; the second amplifying circuit comprises a gain adjusting module and a signal amplifying module, wherein the output end of the gain adjusting module is connected with the input end of the signal amplifying module, and the input end of the gain adjusting module is connected with the output end of the peak value sampling circuit; the peak value sampling circuit outputs the peak value voltage to the gain adjusting module so as to adjust the gain resistance of the gain adjusting module according to the peak value voltage.
3. The structure of claim 2, wherein the gain adjustment module comprises a voltage division unit and an adjustable resistance unit, an output terminal of the voltage division unit is connected to an input terminal of the adjustable resistance unit, and an input terminal of the voltage division unit is connected to an output terminal of the peak sampling circuit; the voltage dividing unit is used for attenuating the peak voltage and then outputting the attenuated peak voltage to the adjustable resistance unit so as to adjust the gain resistance of the adjustable resistance unit.
4. The structure of claim 3, wherein the voltage divider unit comprises a second resistor (R2) and a third resistor (R3) connected in series, the other end of the second resistor (R2) is connected to ground, and the other end of the third resistor (R3) is connected to the output terminal of the peak sampling circuit;
the adjustable resistance unit comprises a triode (Q1), a second capacitor (C2) and a seventh resistor (R7); the grid electrode of the triode (Q1) is connected between the second resistor (R2) and the third resistor (R3), the source electrode of the triode is connected with one end of the second capacitor (C2), and the drain electrode of the triode is connected with one end of the seventh resistor (R7); the other end of the second capacitor (C2) is grounded, and the other end of the seventh resistor (R7) is connected with the signal amplification module;
the signal amplification module comprises a third amplifier (U3), a fifth capacitor (C5) and a fifth resistor (R5), and the output end of the third amplifier (U3) is the output end of the amplification circuit; one end of the fifth capacitor (C5) is connected with the positive input end of the third amplifier (U3), and the other end of the fifth capacitor is connected with the output end of the first amplifying circuit; one end of the fifth resistor (R5) is connected with the negative input end of the third amplifier (U3), and the other end of the fifth resistor (R5) is connected with the output end of the third amplifier (U3); one end of the fifth resistor (R5) is connected to the other end of the seventh resistor (R7).
5. The gain-adaptive signal amplification circuit structure according to claim 4, wherein the signal amplification module further comprises a third capacitor (C3), and the third capacitor (C3) is connected in parallel with the fifth resistor (R5).
6. The gain adaptive signal amplification circuit structure according to claim 2, wherein the first amplification circuit comprises: a fourth amplifier (U4), a sixth capacitor (C6), a sixth resistor (R6), an eighth resistor (R8) and a seventh capacitor (C7);
wherein, the positive input end of the fourth amplifier (U4) is the input end of the amplifying circuit and is connected with the sixth capacitor (C6), and the output end of the fourth amplifier (U4) is connected with the input end of the second amplifying circuit; one end of the sixth resistor (R6) is connected with the negative input end of the fourth amplifier (U4), and the other end of the sixth resistor (R6) is connected with the output end of the fourth amplifier (U4); one end of the eighth resistor is connected with one end of the sixth resistor (R6), and the other end of the eighth resistor is connected with one end of the seventh capacitor (C7); the other end of the seventh capacitor (C7) is grounded.
7. The gain-adaptive signal amplification circuit structure according to claim 6, wherein the first amplification circuit further comprises a fourth capacitor (C4), and the fourth capacitor (C4) is connected in parallel with the sixth resistor (R6).
8. The gain adaptive signal amplification circuit structure according to claim 1, wherein the peak sampling circuit comprises: a first amplifier (U1), a second amplifier (U2), a first diode (D1), a second diode (D2), a first capacitor (C1), and a fourth resistor (R4);
wherein the positive input of the first amplifier (U1) is the input of the peak sampling circuit, and the output of the second amplifier (U2) is the output of the peak sampling circuit; the output end of the first amplifier (U1) is connected with the anode of the first diode (D1), and the cathode of the first diode (D1) is connected with the positive input end of the second amplifier (U2); the negative input end of the first amplifier (U1) is connected with the anode of the second diode (D2), and the cathode of the second diode (D2) is connected with the anode of the first diode (D1); the negative input end of the first amplifier (U1) is connected with one end of the fourth resistor (R4), and the other end of the fourth resistor (R4) is connected with the negative input end of the second amplifier (U2); the negative input end of the second amplifier (U2) is connected with the output end of the second amplifier (U2); one end of the first capacitor (C1) is connected with the cathode of the first diode (D1), and the other end is grounded.
9. The gain adaptive signal amplification circuit structure of claim 8, wherein the peak sampling circuit further comprises: a first resistor (R1), the first resistor (R1) being connected at a positive input of the first amplifier (U1).
10. An ultrasonic metering module comprising a gain adaptive signal amplification circuit structure according to any one of claims 1 to 9.
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