CN216959694U - Grid-connected inverter current loop control system based on linear active disturbance rejection control - Google Patents
Grid-connected inverter current loop control system based on linear active disturbance rejection control Download PDFInfo
- Publication number
- CN216959694U CN216959694U CN202122370116.2U CN202122370116U CN216959694U CN 216959694 U CN216959694 U CN 216959694U CN 202122370116 U CN202122370116 U CN 202122370116U CN 216959694 U CN216959694 U CN 216959694U
- Authority
- CN
- China
- Prior art keywords
- axis
- module
- output end
- input end
- unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/40—Arrangements for reducing harmonics
Abstract
The utility model provides a grid-connected inverter current loop control system based on linear active disturbance rejection control, which comprises an inversion module, a coordinate transformation module, a control complex impedance module, a switching logic module, a repetitive control module RCC, a linear active disturbance rejection control module LADRC and a PWM modulation module; the input end of the inversion module is connected with a direct-current voltage source, and the inversion module outputs a three-phase power grid; the output end of the inversion module is connected with the input end of the coordinate transformation module, and the voltage output end and the current output end of the coordinate transformation module are respectively connected with the input end of the complex impedance control module and the first input end of the linear active disturbance rejection control module LADRC; the utility model can reduce the relative order based on the object modeling of the inverter current feedback, thereby reducing the control order of the linear active disturbance rejection controller, simplifying the setting process of the controller parameters and improving the stability of the system.
Description
Technical Field
The utility model belongs to the technical field of grid-connected inverter control, and particularly relates to a grid-connected inverter current loop control system based on linear active disturbance rejection control.
Background
Aiming at the resonance and coupling problems of the LCL type grid-connected inverter, a damping link is added on the traditional current loop PI controller, wherein the most common damping method comprises a virtual resistance method, a wave trap method and the like. However, the above control method has the defects of requiring more sensors, being highly dependent on the accuracy of a system model, and the like, and is difficult to be directly applied to complex industrial applications. The LCL grid-connected inverter current loop control based on the active disturbance rejection control can observe and compensate internal and external disturbances such as parameter errors, object coupling, resonance spikes, power grid fluctuation and the like in real time through a linear extended state observer, reduce the degree of dependence on a model, improve the robustness and stability of a system, and realize high-quality power grid current control. However, since the stability analysis of the nonlinear active disturbance rejection control is complicated and the requirement on the computing capability of the processor is high, the linear active disturbance rejection control LADRC is generally adopted in practical engineering application. The linear active disturbance rejection controller based on the current feedback of the power grid has high order, more state variables needing to be controlled, large phase lag in output signals, more complex parameter selection and larger control difficulty, and limits the application of the linear active disturbance rejection controller in engineering. In addition, although the LADRC has a relatively good suppression effect on large disturbance and large uncertainty, the suppression effect on harmonic interference with a small amplitude and a low frequency is relatively poor, if the ac side current harmonics of the LCL grid-connected inverter are mainly 6k ± 11(k is 1,2, etc.) subharmonics such as 5, 7, 11, 13, etc., if the LCL grid-connected inverter is designed one by a specific frequency trap method, the whole design difficulty and time cost are relatively high, and the repeated control based on the internal model principle makes up for the problem, and can generate relatively large attenuation suppression on the harmonics with integral multiples of frequency, but the repeated control can introduce relatively large phase lag to the system, and can possibly make the system unstable.
SUMMERY OF THE UTILITY MODEL
In view of this, the utility model provides a grid-connected inverter current loop control system based on linear active disturbance rejection control. The utility model can reduce the relative order based on the object modeling of the inverter current feedback, thereby reducing the control order of the linear active disturbance rejection controller, simplifying the setting process of the controller parameters and also improving the stability and the bandwidth of the system; a one-beat delay link is introduced at the input end of the observer control quantity, so that the time delay influence caused by sampling and SVPWM can be counteracted, and the stability of the system is further improved; the introduced control complex impedance module can correct the given parameters of the current loop, so that the independent control of active power and reactive power is ensured, and the system can always work under a unit power factor; aiming at the existing harmonic waves with small amplitude and integral multiple frequency, an internal model module in the repetitive controller can track the harmonic disturbance in the time of several beats, and a phase compensation module and an object gain compensation module of the repetitive controller can enable the system to have zero phase shift and zero gain in a low frequency band, increase the inhibition capability of high frequency and further improve the steady-state precision of the system; the switching logic module controls the state of the switch KT by adopting a sliding average method, ensures that repeated control is switched in when the system is in a steady state, and is beneficial to reducing the influence of a repeated control module on the dynamic performance of the system; the introduced repetitive control module is connected with the active disturbance rejection module LESF in parallel, and has small influence on the setting of the original active disturbance rejection control system parameters and the stability of the system.
The purpose of the utility model is realized by the following technical scheme:
a grid-connected inverter current loop control system based on linear active disturbance rejection control comprises an inversion module, a coordinate transformation module, a complex impedance control module, a switching logic module, a repetitive control module RCC, a linear active disturbance rejection control module LADRC and a PWM modulation module; the input end of the inversion module is connected with a direct-current voltage source, and the inversion module outputs a three-phase power grid; the output end of the inversion module is connected with the input end of the coordinate transformation module, and the voltage output end and the current output end of the coordinate transformation module are respectively connected with the input end of the complex impedance control module and the first input end of the linear active disturbance rejection control module LADRC; the output end of the complex impedance control module is connected with the second input end of the linear active disturbance rejection control module LADRC; the first output end of the linear active disturbance rejection control module LADRC is connected with the input end of the PWM modulation module, the output end of the PWM modulation module is connected with the inversion module, the second output end of the linear active disturbance rejection control module LADRC is connected with the switching logic module and the repetitive control module, the output end of the switching logic module is connected with the repetitive control module, and the output end of the repetitive control module is connected with the linear active disturbance rejection control module LADRC.
Preferably, the switching logic module includes a d-axis switching logic unit and a q-axis switching logic unit which are completely the same, the repetitive control module includes a d-axis repetitive controller and a q-axis repetitive controller which are completely the same, and the linear active disturbance rejection control module LADRC includes a d-axis active disturbance rejection control unit and a q-axis active disturbance rejection control unit which are completely the same; the current output end of the coordinate transformation module is respectively connected with the first input end of the d-axis active disturbance rejection control unit and the first input end of the q-axis active disturbance rejection control unit; the output end of the control complex impedance module is respectively connected with the first input end of the d-axis active-disturbance-rejection control unit and the second input end of the q-axis active-disturbance-rejection control unit; the first output end of the d-axis active disturbance rejection control unit and the first output end of the q-axis active disturbance rejection control unit are both connected with the input end of the PWM modulation module, and the second output end of the d-axis active disturbance rejection control unit is connected with the d-axis switching logic unit and the d-axis repetitive controller; the second output end of the q-axis active disturbance rejection control unit is connected with the q-axis switching logic unit and the q-axis repetitive controller; the d-axis switching logic unit, the d-axis repetitive controller and the d-axis active disturbance rejection control unit are further connected in sequence, and the q-axis switching logic unit, the q-axis repetitive controller and the q-axis active disturbance rejection control unit are further connected in sequence.
Preferably, the d-axis and q-axis active disturbance rejection control units each comprise a linear state feedback controller LESF and a linear extended state observer LESO; the input end of a linear state feedback controller LESF of the d axis is connected with a given value end of current on the side of the d axis inverter, a real-time value end of the current on the side of the d axis inverter, the output end of a d axis repetitive controller and a d axis disturbance observation value end; the output end of the linear state feedback controller LESF of the d axis is connected with the PWM modulation module and the d axis linear extended state observer LESO; the input end of the d-axis linear extended state observer LESO is connected to the output end of the d-axis linear state feedback controller LESF and the real-time value end of the d-axis inverter-side current, and the output end of the d-axis linear extended state observer LESO is connected to the d-axis linear state feedback controller LESF.
Preferably, the d-axis repetitive controller and the q-axis repetitive controller both comprise an internal model unit, a phase compensation unit and a gain unit which are connected in sequence, the input end of the internal model unit of the d-axis is connected with the second output end of the d-axis active disturbance rejection control unit and the d-axis logic switching unit through a switch, and the output end of the gain unit of the d-axis is connected with the input end of the d-axis active disturbance rejection control unit through a switch.
Preferably, the inversion module comprises an LCL filter and a three-phase full-bridge inverter which are connected in sequence, wherein the input end of the three-phase full-bridge inverter is connected with a direct-current voltage source, and the output end of the LCL filter is connected with a three-phase power grid; the output end of the LCL filter is also connected with the first input end of the coordinate transformation module, and the three-phase current end of the three-phase full-bridge inverter is connected with the second input end of the coordinate transformation module.
Preferably, the control complex impedance modules each include a first scaling factor unit, a second scaling factor unit, a first adder-subtractor, a third scaling factor unit, a fourth scaling factor unit, and a first adder; the input end of the first scaling coefficient unit is connected with a d-axis power grid current set value end, the output end of the first scaling coefficient unit is connected with the adding input end of a first adder-subtractor, the input end of the second scaling coefficient unit is connected with a q-axis power grid real-time voltage end, the output end of the second scaling coefficient unit is connected with the subtracting input end of the first adder-subtractor, the output end of the first adder-subtractor is connected with a d-axis active-disturbance-rejection control unit, the input end of the third scaling coefficient unit is connected with a q-axis power grid current set value end, the output end of the third scaling coefficient unit is connected with the adding input end of a first adder, the input end of the fourth scaling coefficient unit is connected with a d-axis power grid voltage end, the output end of the fourth scaling coefficient unit is connected with the adding input end of the first adder-subtractor, and the first adder is connected with a linear active-disturbance-rejection control module.
Preferably, the linear extended state observation module LESO includes a second adder-subtractor, a second adder, a first integrator, a second integrator, a first observer coefficient unit, a second observer coefficient unit, a first compensation factor, and a one-beat hysteresis unit; the addition input end of the second adder-subtractor is connected with the real-time current signal end of the inverter side and the output end of the first integrator, the output end of the second adder-subtractor is connected with the input ends of the first observer coefficient unit and the second observer coefficient unit, the output end of the first observer coefficient unit is connected with the addition input end of the second adder, the output end of the second observer coefficient unit is connected with the input end of the second integrator, the output end of the second integrator is connected with the input end of the first adder and the linear state feedback controller LESF, the second adder-subtractor, the first integrator, the second adder, the first compensation factor and the beat delay unit are sequentially connected, and the input end of the beat delay unit is connected with the output end of the line state feedback controller LESFF.
Preferably, the linear state feedback controller LESF includes a third adder-subtractor, a fifth scale factor unit, a fourth adder-subtractor, and a second compensation factor; the addition input end of the third adder-subtractor is connected with a given current signal end at the inverter side and a real-time current signal end at the inverter side, the subtraction input end of the second adder-subtractor is connected with the output end of the RCC, the output end of the third adder-subtractor is connected with the input end of the fifth proportionality coefficient unit, the output end of the fifth proportionality coefficient unit is connected with the addition input end of the fourth adder-subtractor, the subtraction input end of the fourth adder-subtractor is connected with the output end of the second integrator, the output end of the fourth adder-subtractor is connected with the input end of the second compensation factor, and the output end of the second compensation factor is connected with the PWM signal output module.
Compared with the prior art, the utility model has the following advantages:
(1) the reduced-order linear active disturbance rejection controller provided by the utility model establishes the controller and the observer which are equal to the relative order of the object based on the current feedback of the inverter, so that a new dynamic equation with the order lower than that of the dynamic equation of the original system is obtained, the control parameters needing to be set are greatly reduced, and the stability and the system bandwidth of the whole system can be improved based on the current closed-loop control of the inverter side compared with the current closed-loop control of the power grid side.
(2) The linear extended state observer provided by the utility model adds a one-beat hysteresis link at the input end of the control quantity, can offset the time delay influence caused by current sampling and SVPWM modulation, and further improves the stability of the system.
(3) The control complex impedance module introduced by the utility model can correct the given value of the current loop at the inverter side, and solves the problem of phase angle lag existing in the current loop at the inverter side, so as to ensure the independent control of active power and reactive power and ensure that the system can always work under a unit power factor.
(4) Aiming at the existing harmonic waves with small amplitude and integral multiple frequency, an internal model module in the repetitive controller can track harmonic disturbance in a time of several beats, and a phase compensation module and an object gain compensation module of the repetitive controller can enable a system to have zero phase shift and zero gain in a low frequency band, increase the high-frequency inhibition capability and further improve the steady-state precision of the system;
(5) the switching logic module of the utility model adopts a sliding average method to control the state of the switch KT, ensures that repeated control is switched in only when the system is in a steady state, and is beneficial to reducing the influence of the repeated control module on the dynamic performance of the system.
(6) The repeated control module introduced by the utility model is connected with the active disturbance rejection module LESF in parallel, and has small influence on the setting of the parameters of the original active disturbance rejection control system and the stability of the system.
Drawings
Fig. 1(a) is a schematic block diagram of a control method according to the present invention.
Fig. 1(b) is a schematic block diagram of a complex impedance control module in the control method of the present invention.
Fig. 1(c) is a schematic block diagram of a repetitive control module in the control method of the present invention.
Fig. 1(d) is a schematic block diagram of the LADRC module in the control method of the present invention.
Fig. 1(e) is a schematic block diagram of an LESO module in the control method of the present invention.
Fig. 1(f) is a schematic block diagram of an LESF module in the control method of the present invention.
FIG. 2 is a bode diagram of the transfer function of disturbance to controlled quantity of RCC-LADRC and conventional LADRC according to the present invention.
FIG. 3 (a) is a graph of the total harmonic content corresponding to RCC-LADRC using the method set forth herein.
Fig. 3 (b) is a graph of total harmonic content corresponding to the use of a conventional LADRC.
Fig. 4 (a) is a diagram of the total harmonic content corresponding to the RCC-LADRC using the method of the present invention.
Fig. 4 (b) is a graph of total harmonic content corresponding to the conventional LADRC.
Detailed Description
The utility model is further illustrated by the following figures and examples.
The grid-connected inverter current loop control system based on linear active disturbance rejection control comprises an inversion module, a coordinate transformation module, a complex impedance control module, a switching logic module, a repetitive control module RCC, a linear active disturbance rejection control module LADRC and a PWM modulation module;
the inversion module consists of an LCL filter and a three-phase full-bridge inverter which are sequentially connected, inputs a direct-current voltage source and outputs the direct-current voltage source to a three-phase power grid;
the coordinate transformation module inputs a power grid electrical angle, three-phase power grid voltage and three-phase current at the side of the inverter and outputs the power grid electrical angle, the three-phase power grid voltage and the three-phase current to a d-axis active disturbance rejection control unit (d-axis LADRC) and a q-axis active disturbance rejection control unit (q-axis LADRC) of the control complex impedance module and the linear active disturbance rejection control module LADRC;
the PWM modulation module inputs the output control quantity and the power grid electrical angle of dq axis LADRC (a d axis active disturbance rejection control unit and a q axis active disturbance rejection control unit of the linear active disturbance rejection control module LADRC), and outputs and acts on the inversion module;
the control complex impedance module is used for correcting a given value of d-axis current at the side of the inverter and a given value of q-axis current at the side of the inverter; the input end of the control complex impedance module receives a given value of d-axis current of a power grid, a given value of q-axis current of the power grid, d-axis voltage of the power grid and q-axis voltage of the power grid, and the output end of the control complex impedance module outputs a given value of d-axis current of an inverter side and a given value of q-axis current of the inverter side;
the switching logic module comprises a d-axis switching logic unit and a q-axis switching logic unit, and respectively determines whether a dq-axis repetitive controller RCC (the d-axis switching logic unit and the q-axis switching logic unit) is switched in or not, wherein the input end of the d-axis switching logic unit is connected with the output end of a dq-axis LADRC, and the output end of the d-axis switching logic unit is connected with the input end of the dq-axis repetitive controller module (the dq-axis repetitive controller RCC);
the repetitive control module comprises a d-axis repetitive controller and a q-axis repetitive controller, and consists of an internal module unit, a phase compensation unit and a gain unit, wherein the input end of the repetitive control module is connected with the output end of the dq-axis LADRC and the dq-axis logic switching module, and the output end of the repetitive control module is connected with the input end of the dq-axis LADRC; the repetition control module; the dq-axis internal model unit is used for inhibiting fundamental frequency and harmonic disturbance of integral multiple thereof; the input end of the dq axis internal model unit is connected with a dq axis input end switch, receives an error quantity output by the dq axis LADRC, and the output end of the dq axis internal model unit is connected with the dq axis phase compensation unit; the dq-axis phase compensation unit is used for compensating the lag of the interference signal after passing through the object and sampling modulation; the input end of the dq-axis phase compensation unit is connected with the dq-axis internal model unit, and the output end of the dq-axis phase compensation unit is connected with the dq-axis gain unit; the dq axis gain compensation unit is used for compensating the low-frequency gain of the controlled object; the input end of the dq axis gain unit is connected with the dq axis phase compensation unit, the output end of the dq axis gain unit is connected with a dq axis output end switch, and the dq axis LADRC is used for outputting repeated control quantity to a dq axis;
the linear active disturbance rejection control module LADRC comprises a d-axis active disturbance rejection control unit and a q-axis active disturbance rejection control unit, which are both composed of a linear state feedback controller LESF and a linear extended state observer LESO, the input end of the dq-axis linear active disturbance rejection control module (the d-axis active disturbance rejection control unit and the q-axis active disturbance rejection control unit) is connected with the output end of a control complex impedance module, the output end of a dq-axis repetitive controller and the real-time current of a dq-axis shaft at an inversion side, and the output end of the dq-axis linear active disturbance rejection control module is connected with the input end of a PWM signal output module, the dq-axis repetitive controller and a dq-axis switching logic unit;
the dq axis state feedback controller LESF is used for compensating object disturbance and carrying out current closed-loop control; the input quantity of the dq axis state feedback controller is a given value of a current on the dq axis inverter side, a real-time value of the current on the dq axis inverter side, an output control quantity of the dq axis repetitive controller and a dq axis disturbance observed value; the output of the dq-axis linear state feedback controller is sent to a PWM modulation module and a dq-axis linear extended state observer LESO;
the dq-axis linear extended state observer is used for estimating the controlled quantity and uncertain disturbance of an object; the input quantity of the dq axis extended state observer is the output quantity of the dq axis linear feedback controller and the real-time current of the dq axis at the inverter side, and is output to the dq axis linear feedback controller; the uncertain disturbance comprises internal and external disturbances faced by a controlled object such as a modeling error, power grid fluctuation, a driving dead zone and the like;
the switching logic module is designed by adopting a moving average method.
The repetitive controller is connected in parallel with the active disturbance rejection controller through a switch.
The internal model module contains an adjustable gain constant Q.
The control complex impedance module adopts an equivalent impedance matching method.
The linear extended state observer establishes a second-order state observer based on inverter-side current feedback.
The linear extended state observer adds a one-beat hysteresis link at the input end of the control quantity.
A grid-connected inverter current loop control method based on linear active disturbance rejection control comprises the following steps:
firstly, sinusoidal quantity under a static coordinate system of three-phase power grid voltage and three-phase current at an inversion side is converted into direct current quantity under a two-phase rotating coordinate system, so that tracking of power grid voltage vectors is realized. Based on the constant amplitude principle, Clark conversion is carried out on the sampled three-phase voltage signal and the inversion side three-phase current signal, and the conversion formulas are respectively shown as the following formulas:
wherein u isα、uβ、u0、iiα、iiβ、ii0Voltage and current variables u in two-phase stationary coordinate systema、ub、ucIs the phase voltage of a three-phase power supply iia、iib、iicIs an inverter side three-phase current. u. u0、ii0Can be ignored under the balanced power grid, and then u is pairedα、uβ、iiα、iiβPerforming Park transformation, wherein the transformation formula is shown as the following formula:
where θ is the electrical angle of the grid voltage vector. Three-phase power grid fundamental wave sine variable ua、ub、uc、iia、iib、iicConversion to a direct current variable ud、uq、iid、iiq。
Step 2, setting given values of d-axis current and q-axis current of an inverter side based on an equivalent impedance matching relation according to target values of d-axis current and q-axis current of a power grid, and outputting the given values to a dq-axis LADRC module;
taking the direction from the inverter side to the power grid as the positive direction, taking the direction from the capacitor parallel point to the capacitor connecting point as the positive direction, and recording
For the current phasor on the inverter side inductor, the filter capacitor and the network side inductor is
The complex impedance when looking into the LCL filter from the grid can be considered as the equivalent complex impedance of the system, and the negative value of the phasor quotient of the grid voltage and the grid current is defined as the grid complex impedance ZgAnd is recorded as:
according to the node current theorem, the current phasor in the capacitive branch satisfies the following relationship:
defining the negative value of the phasor quotient of the grid voltage and the output current of the inverter as the control complex impedance Zi：
The combined vertical type (6), (7) and (8) can obtain ZgAnd ZiSatisfies the following conditions:
since the square term in the numerator of equation (9) is small in magnitude, it can be ignored for simplifying the analysis, and further simplified as:
as can be seen from the formula (10), when Z isiWhen it exhibits negative resistance characteristic, ZgLead in ZiAnd the lead angle follows CfIs increased. Therefore, under the inverter-side current closed-loop control strategy, the q-axis component of the inverter-side current is zero, and the grid-connected current cannot be in the same phase with the grid voltage, so that the grid-connected current lags behind the grid-connected voltage.
When the system adopts an SVPWM-based inverter side current closed-loop control strategy, if the actual value of the grid side current can better track the reference signal, the SVPWM-based inverter side current closed-loop control strategy is adopted
And
while remaining in the same direction, ZgThe inverter is in a negative impedance characteristic, works under a negative unit power factor and only outputs active power.
The combined vertical type (6), (8) and (10) can obtain the output current of the inverter
And current of grid connection
The relationship therebetween satisfies the following formula:
in conjunction with the derivation of equations (2) and (11), the relationship between the inverter-side output current dq component and the grid-connected current dq component can be found:
when the current on the side of the inverter is controlled in a closed loop mode, the problem is solved because of the Z of the systemgAnd ZiThe problem of grid-connected current phase angle lag caused by deviation can be given according to the grid-connected current
Inverter output current setting signal by equation (12)
And correcting to obtain a given value which can ensure the unit power factor operation of the system under the current feedback control of the inverter side as follows:
the designed switching logic module is designed by adopting a moving average method, and N is continuously acquiredsAn error signal point, and using it as a one-dimensional array sample [ N ]s]Storage, wherein the number of sampling points set by the embodiment is Ns500. When the collection point number reaches NsBefore, the switch state is kept unchanged. When the current collection point number is equal to NsThen, the error Distance _ sample is calculated for the logarithm group sample by adopting the following calculation formula
As the system enters steady stateThe Distance _ sample is gradually decreased, so that the Distance _ sample has a minimum value when the system is in steady stateminLet the switching threshold kthSlightly larger than this value, when the real-time Distance _ sample is smaller than kthWhen the system enters a steady state, the output KT is made to be 1, the switch is closed again at the moment, the repetitive control is switched in, otherwise, the output KT is made to be 0, and the repetitive controller is switched off. After actual debugging, considering a certain margin, the switching threshold k is taken out in the embodiment th3. In addition, due to the symmetry of the control structure of the dq axis and the symmetry of the control parameters, the dq axis repetitive control should be switched in synchronously, otherwise the control performance is deteriorated due to the internal coupling.
Step 4, calculating the control quantity of the dq axis repetitive controller according to the input dq axis error quantity;
the discrete closed loop transfer function of the internal model unit is
Wherein N is the number of sampling points in one fundamental wave period, and satisfies
T0Related to the fundamental frequency of the harmonic to be suppressed, usually taken as the fundamental frequency of the power grid, i.e.
And the switching frequency and the sampling frequency set by the control system are fs20khz, so
In general, Q (z) is a constant or a low-pass filter smaller than 1, but it is difficult to implement the filter, Q (z) is a constant to obtain a good harmonic suppression effect, Q is too large to make the system unstable, Q is too small to obtain a harmonic suppression effect, the value range of Q is usually 0.9-0.98, and Q is 0.96 in this embodiment. Gain unit krTypically, a constant close to 1 is taken, where k is takenr0.7. The phase compensation module is mainly used for compensating the phase lag of an interference signal passing object, and can be known by combining an actual debugging result, when the value range of k is 0-5, the stability of the system can be ensured, and k can be taken as 2 here.
Considering the control quantity KT output by the dq axis logic switching module, the output quantity of the repetitive controller can be known as
urc＝Gc(z)*zk-N*kr*ei*KT (16)
Wherein e isiAnd KT is the switch control quantity output by the dq axis logic switching module.
And 5, estimating the total disturbance quantity by the LESO in the dq-axis LADRC, outputting the value to the corresponding LESF, calculating the total control quantity by combining the repeated control quantity, and finally outputting the total control quantity to the PWM module.
Under a two-phase rotating dq coordinate system, the differential equation form of the LCL grid-connected inverter is as follows:
based on ADRC design theory, the formula (17) can be further simplified into
Wherein f isdAnd fqThe disturbance is considered to be a generalized disturbance of the model, including the coupling disturbance between the filter capacitor voltage and the dq-axis current component of the inverter, the disturbance of the model parameters, and the external disturbance. It can be seen that, since the differential equation structures of the dq axes are the same, the design process of the active disturbance rejection controller for the dq axis current of the inverter is similar, and only d-axis current control will be described hereinafter.
Let generalized disturbance quantity fdIs an expansion state quantity x2：
The state space expression of the LCL grid-connected inverter based on the inverter side current feedback obtained from the (17), (18) and (19) is
Wherein the content of the first and second substances,
hdis fdDifferential with respect to time, uc＝uidThe output control quantity of the linear active disturbance rejection controller is finally sent to the PWM signal output module.
According to equation (20) and the time delay influence brought by the actual SVPWM modulation and sampling, a second-order linear active disturbance rejection controller structure shown in fig. 1(d) is adopted, and a second-order linear extended state observer LESO shown in equation (21) below is established, and the structure diagram is shown in fig. 1 (e).
Wherein:
z1and z2For the value of the state variable observed by the observer, the appropriate state observer coefficient matrix L is selected and is respectively used for estimating the system state, and according to a bandwidth setting method, the observer gain matrix L can be set through the following formula:
|sI2×2-(A-LC)|＝(s+ω0)2 (22)
wherein, ω is0For observer bandwidth, on the premise of stability, it is often selected according to the convergence rate of the LESO and the main suppression band. The observer bandwidth should be greater than or equal to the maximum disturbance frequency
However, the observer bandwidth cannot be too high, or the system will be unstable. Combining (21), (22), observer gain β can be calculated1And beta2Can be selected as
As can be seen from FIG. 1(f), after disturbance information is observed, disturbance f is detected in (18)dAnd (3) performing feedforward compensation:
wherein u is0Is the output of the LESF controller and,
substituting (24) into (18) when the total disturbance fdWhen fully compensated, (18) can be expressed as:
therefore, based on the internal model principle and the combination formula (16), the LESF controller can be designed using a proportional link:
u0＝kp(r-z1)+urc (26)
where r is the required reference input, kp＝ωcIs a bandwidth parameter of the LESF controller, and is known based on the application background of the LCL inverter, omegacIs usually in the range of ωc＝2π×200～2π×500。
As can be seen from (23) and (26), the control parameter configurationThe problem can be simplified to omega0And omegacThe design of (2) effectively solves the problem of parameter design complexity caused by the improvement of the order of the controller.
By combining the above analysis, a schematic block diagram of the current loop control of the reduced-order linear active disturbance rejection control LCL grid-connected inverter based on the repetitive control switching control can be obtained, as shown in fig. 1 (a).
The utility model can be advantageously implemented according to the above-described embodiments. It should be noted that the above-mentioned embodiments are only preferred embodiments of the present invention, but the present invention is not limited to the above-mentioned embodiments, and any other changes, modifications, substitutions, combinations, and simplifications which do not depart from the spirit and principle of the present invention should be regarded as equivalent replacements and equivalents, and all are included in the protection scope of the present invention.
Claims (6)
1. A grid-connected inverter current loop control system based on linear active disturbance rejection control is characterized by comprising an inversion module, a coordinate transformation module, a control complex impedance module, a switching logic module, a repetitive control module RCC, a linear active disturbance rejection control module LADRC and a PWM modulation module;
the input end of the inversion module is connected with a direct-current voltage source and outputs the direct-current voltage source to a three-phase power grid; the output end of the inversion module is connected with the input end of the coordinate transformation module, and the voltage output end and the current output end of the coordinate transformation module are respectively connected with the input end of the complex impedance control module and the first input end of the linear active disturbance rejection control module LADRC; the output end of the complex impedance control module is connected with the second input end of the linear active disturbance rejection control module LADRC; a first output end of the linear active disturbance rejection control module LADRC is connected with an input end of the PWM modulation module, an output end of the PWM modulation module is connected with the inversion module, a second output end of the linear active disturbance rejection control module LADRC is connected with the switching logic module and the repetition control module, an output end of the switching logic module is connected with the repetition control module, and an output end of the repetition control module is connected with the linear active disturbance rejection control module LADRC;
the switching logic module comprises a d-axis switching logic unit and a q-axis switching logic unit which are completely the same, the repetitive control module comprises a d-axis repetitive controller and a q-axis repetitive controller which are completely the same, and the linear active disturbance rejection control module LADRC comprises a d-axis active disturbance rejection control unit and a q-axis active disturbance rejection control unit which are completely the same;
the current output end of the coordinate transformation module is respectively connected with the first input end of the d-axis active disturbance rejection control unit and the first input end of the q-axis active disturbance rejection control unit; the output end of the control complex impedance module is respectively connected with the first input end of the d-axis active-disturbance-rejection control unit and the second input end of the q-axis active-disturbance-rejection control unit; the first output end of the d-axis active disturbance rejection control unit and the first output end of the q-axis active disturbance rejection control unit are both connected with the input end of the PWM modulation module, and the second output end of the d-axis active disturbance rejection control unit is connected with the d-axis switching logic unit and the d-axis repetitive controller; the second output end of the q-axis active disturbance rejection control unit is connected with the q-axis switching logic unit and the q-axis repetitive controller; the d-axis switching logic unit, the d-axis repetitive controller and the d-axis active disturbance rejection control unit are also sequentially connected, and the q-axis switching logic unit, the q-axis repetitive controller and the q-axis active disturbance rejection control unit are also sequentially connected;
the control complex impedance modules comprise a first scale coefficient unit, a second scale coefficient unit, a first adder-subtractor, a third scale coefficient unit, a fourth scale coefficient unit and a first adder; the control complex impedance module is used for correcting a given value of the current on the side of the inverter;
the input end of the first scaling coefficient unit is connected with a d-axis power grid current set value end, the output end of the first scaling coefficient unit is connected with the adding input end of a first adder-subtractor, the input end of the second scaling coefficient unit is connected with a q-axis power grid real-time voltage end, the output end of the second scaling coefficient unit is connected with the subtracting input end of the first adder-subtractor, the output end of the first adder-subtractor is connected with a d-axis active-disturbance-rejection control unit, the input end of the third scaling coefficient unit is connected with a q-axis power grid current set value end, the output end of the third scaling coefficient unit is connected with the adding input end of a first adder, the input end of the fourth scaling coefficient unit is connected with a d-axis power grid voltage end, the output end of the fourth scaling coefficient unit is connected with the adding input end of the first adder-subtractor, and the first adder is connected with a linear active-disturbance-rejection control module.
2. The linear active disturbance rejection control based grid-connected inverter current loop control system according to claim 1, wherein the d-axis active disturbance rejection control unit and the q-axis active disturbance rejection control unit each comprise a linear state feedback controller LESF and a linear extended state observer LESO;
the input end of a linear state feedback controller LESF of the d axis is connected with a given value end of current on the side of the d axis inverter, a real-time value end of the current on the side of the d axis inverter, the output end of a d axis repetitive controller and a d axis disturbance observation value end; the output end of the linear state feedback controller LESF of the d axis is connected with the PWM modulation module and the d axis linear extended state observer LESO;
the input end of the d-axis linear extended state observer LESO is connected to the output end of the d-axis linear state feedback controller LESF and the real-time value end of the d-axis inverter-side current, and the output end of the d-axis linear extended state observer LESO is connected to the d-axis linear state feedback controller LESF.
3. The current loop control system of the grid-connected inverter based on the linear active disturbance rejection control as claimed in claim 1, wherein the d-axis repetitive controller and the q-axis repetitive controller each comprise an internal model unit, a phase compensation unit and a gain unit connected in sequence, an input end of the internal model unit of the d-axis is connected with a second output end of the d-axis active disturbance rejection control unit and a d-axis logic switching unit through a switch, and an output end of the gain unit of the d-axis is connected with an input end of the d-axis active disturbance rejection control unit through a switch.
4. The linear active disturbance rejection control-based grid-connected inverter current loop control system according to claim 1, wherein the inverting module comprises an LCL filter and a three-phase full-bridge inverter which are connected in sequence, an input end of the three-phase full-bridge inverter is connected with a direct current voltage source, and an output end of the LCL filter is connected with a three-phase power grid; the output end of the LCL filter is also connected with the first input end of the coordinate transformation module, and the three-phase current end of the three-phase full-bridge inverter is connected with the second input end of the coordinate transformation module.
5. The linear active disturbance rejection control-based grid-connected inverter current loop control system according to claim 2, wherein the linear extended state observation module LESO comprises a second adder-subtractor, a second adder, a first integrator, a second integrator, a first observer coefficient unit, a second observer coefficient unit, a first compensation factor, and a one-beat hysteresis unit;
the addition input end of the second adder-subtractor is connected with the real-time current signal end of the inverter side and the output end of the first integrator, the output end of the second adder-subtractor is connected with the input ends of the first observer coefficient unit and the second observer coefficient unit, the output end of the first observer coefficient unit is connected with the addition input end of the second adder, the output end of the second observer coefficient unit is connected with the input end of the second integrator, the output end of the second integrator is connected with the input end of the first adder and the linear state feedback controller LESF, the second adder-subtractor, the first integrator, the second adder, the first compensation factor and the beat delay unit are sequentially connected, and the input end of the beat delay unit is connected with the output end of the line state feedback controller LESFF.
6. The linear active disturbance rejection control-based grid-connected inverter current loop control system according to claim 5, wherein the linear state feedback controller LESF comprises a third adder-subtractor, a fifth scaling coefficient unit, a fourth adder-subtractor and a second compensation factor;
the addition input end of the third adder-subtractor is connected with a given current signal end at the inverter side and a real-time current signal end at the inverter side, the subtraction input end of the second adder-subtractor is connected with the output end of the RCC, the output end of the third adder-subtractor is connected with the input end of the fifth proportionality coefficient unit, the output end of the fifth proportionality coefficient unit is connected with the addition input end of the fourth adder-subtractor, the subtraction input end of the fourth adder-subtractor is connected with the output end of the second integrator, the output end of the fourth adder-subtractor is connected with the input end of the second compensation factor, and the output end of the second compensation factor is connected with the PWM signal output module.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122370116.2U CN216959694U (en) | 2021-09-28 | 2021-09-28 | Grid-connected inverter current loop control system based on linear active disturbance rejection control |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122370116.2U CN216959694U (en) | 2021-09-28 | 2021-09-28 | Grid-connected inverter current loop control system based on linear active disturbance rejection control |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN216959694U true CN216959694U (en) | 2022-07-12 |
Family
ID=82303882
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202122370116.2U Active CN216959694U (en) | 2021-09-28 | 2021-09-28 | Grid-connected inverter current loop control system based on linear active disturbance rejection control |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN216959694U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114079399A (en) * | 2021-09-28 | 2022-02-22 | 华南理工大学 | Grid-connected inverter current loop control system and method based on linear active disturbance rejection control |
| CN117895460A (en) * | 2024-03-14 | 2024-04-16 | 国网四川省电力公司电力科学研究院 | Method and system for setting linear active disturbance rejection control parameters of micro-grid energy storage converter |
-
2021
- 2021-09-28 CN CN202122370116.2U patent/CN216959694U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114079399A (en) * | 2021-09-28 | 2022-02-22 | 华南理工大学 | Grid-connected inverter current loop control system and method based on linear active disturbance rejection control |
| CN114079399B (en) * | 2021-09-28 | 2023-12-15 | 华南理工大学 | Grid-connected inverter current loop control system and method based on linear active disturbance rejection control |
| CN117895460A (en) * | 2024-03-14 | 2024-04-16 | 国网四川省电力公司电力科学研究院 | Method and system for setting linear active disturbance rejection control parameters of micro-grid energy storage converter |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN114079399B (en) | Grid-connected inverter current loop control system and method based on linear active disturbance rejection control | |
| CN109004669B (en) | Improved passive control method of three-phase grid-connected inverter based on interference observer compensation | |
| CN110323988B (en) | Permanent magnet synchronous motor low carrier ratio dead beat control system and method | |
| CN216959694U (en) | Grid-connected inverter current loop control system based on linear active disturbance rejection control | |
| CN112953172A (en) | Method for modeling sequence impedance of modular multilevel converter under phase-locked loop coupling | |
| CN111130366B (en) | Prediction control method of non-grid voltage sensor of three-phase VIENNA rectifier | |
| CN113346785B (en) | Adaptive error compensation control system and method for inverter | |
| CN112653342B (en) | Complex vector current loop decoupling control device and method under static coordinate system | |
| CN113839388B (en) | Current double-loop control method of active power filter based on hybrid load | |
| CN113708693A (en) | Compensation control method and system for permanent magnet synchronous motor | |
| CN110429603B (en) | Six-switch seven-level active power filter and compensation method | |
| CN110266044B (en) | Microgrid grid-connected control system and method based on energy storage converter | |
| CN112039123A (en) | Control method for grid-connected inverter without alternating voltage sensor | |
| Zhou et al. | Hybrid prediction-based deadbeat control for a high-performance shunt active power filter | |
| CN114301361B (en) | Control method of electrolytic capacitor-free permanent magnet synchronous motor driving system based on bus current control | |
| CN115378025A (en) | Wind power converter grid-connected control method, device and medium without phase-locked loop | |
| CN113644696B (en) | Three-phase power grid voltage phase-locked loop based on linear active disturbance rejection control and phase-locked method | |
| CN112701970B (en) | PMSM (permanent magnet synchronous motor) accurate discrete active-disturbance-rejection control method under low carrier ratio | |
| CN111756261B (en) | PWM rectifier control method and device | |
| CN112350600B (en) | Modular multilevel converter power decoupling control method based on disturbance estimation | |
| CN109861574B (en) | Model-free adaptive iterative learning MMC converter control method fusing adaptive circulation suppression | |
| CN110880881A (en) | Electric energy quality control method of four-bridge arm inverter and embedded repetitive controller thereof | |
| CN112953269B (en) | Zero-sequence current algorithm for reducing triangular series medium-voltage current stress of solid-state transformer | |
| CN113890090B (en) | VSC converter model predictive control method and system considering unbalanced filter inductance | |
| CN117394421B (en) | Improved active disturbance rejection control method of energy storage converter based on supercoiled sliding mode observer |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant |