CN216957398U - Pixel driving circuit and display panel - Google Patents

Abstract

The utility model relates to a pixel driving circuit and a display panel, wherein a first power supply circuit in the pixel driving circuit is electrically connected with each pixel row in a pixel array circuit through a plurality of first switch modules in a first switch circuit; the voltage limiting control circuit is used for outputting limiting voltage to the target pixel row when the first switch module corresponding to the target pixel row is switched from a closed state to an open state; the limiting voltage is smaller than the minimum driving voltage of the target pixel row, and the target pixel row is a pixel row corresponding to the first switch module which is switched from the closed state to the open state at present. The pixel driving circuit provided by the utility model can provide limiting voltage for the pixel row corresponding to the first switch module which is switched from the closed state to the open state at present, so that the voltage of the input end of the corresponding pixel row is reduced, the pixel row cannot be driven, and the display effect of the display panel is improved.

Description

Pixel driving circuit and display panel

Technical Field

The utility model relates to the field of display devices, in particular to a pixel driving circuit and a display panel.

Background

In the conventional display panel, the distance between the pixel rows inside the display panel is small, so that the parasitic capacitance on the pixel array circuit in the display panel is large. When the gate driver chip switches the pixel row to be scanned currently, the input voltage of the previous pixel row can still be in a light-emitting state due to the existence of the parasitic capacitance, so that the ghost problem in the traditional sense is generated, and the display effect of the display panel is affected.

Therefore, it is desirable to provide a display panel capable of solving the above-mentioned ghost problem.

SUMMERY OF THE UTILITY MODEL

In view of the above, the present invention provides a pixel driving circuit of a display panel and a display panel.

According to an aspect of the present invention, there is provided a pixel driving circuit for a display panel, the pixel driving circuit including: the pixel array circuit comprises a first power supply circuit, a first switch circuit, a voltage limiting control circuit and a pixel array circuit; the first power supply circuit is electrically connected with the voltage limiting control circuit and the pixel array circuit through the first switch circuit respectively, and the voltage limiting control circuit is electrically connected with the pixel array circuit; the first power supply circuit is electrically connected with each pixel row in the pixel array circuit through a plurality of first switch modules in the first switch circuit respectively; the voltage limiting control circuit is used for outputting limiting voltage to the target pixel row when the first switch module corresponding to the target pixel row is switched from a closed state to an open state; the limiting voltage is smaller than the minimum driving voltage of the target pixel row, and the target pixel row is the pixel row corresponding to the first switch module which is switched from the closed state to the open state at present.

Further, under the condition that the voltage of the input end of the target pixel row is smaller than the preset voltage, the voltage limiting control circuit stops outputting the limiting voltage to the target pixel row.

Further, the voltage limiting control circuit includes: the second power supply circuit, the second switch circuit and the control circuit; the second power supply circuit is electrically connected with each pixel row in the pixel array circuit through a plurality of second switch modules in the second switch circuit respectively; and the control circuit controls the on-off state of a second switch module corresponding to the target pixel row in the second switch circuit according to the voltage of the input end of the target pixel row.

Further, when any one of the first switch modules is switched from on to off currently, the control circuit turns on a second switch module electrically connected to the target pixel row connected to the first switch module; and under the condition that the voltage of the input end of the target pixel row is less than the preset voltage, the control circuit disconnects the second switch module electrically connected with the control circuit.

Further, when the second power supply circuit includes a constant voltage source, the constant voltage source is connected in series between the output terminal of the first power supply circuit and the second switch circuit, and a voltage value of the constant voltage source is greater than a difference between a voltage of the output terminal of the first power supply circuit and the preset voltage.

Further, when the second power supply circuit includes a constant current source, an output terminal of the constant current source is connected to the second switch circuit and outputs the limit voltage.

Further, the control circuit comprises a comparator, a third power supply circuit, a third switch circuit and a second switch control circuit; the first input end of the comparator is electrically connected with each pixel row in the pixel array circuit through a plurality of third switch modules in the third switch circuit respectively, the output end of the comparator is electrically connected with the second switch control circuit, and the second input end of the comparator is electrically connected with the output end of the third power circuit; the comparator is used for comparing the voltage of the first input end with the voltage of the second input end and outputting a comparison result to the second switch control circuit; and under the condition that any one third switch module is closed, the second switch control circuit controls the on-off state of the second switch module electrically connected with the closed third switch module according to the comparison result.

Further, when the comparison result output by the comparator is that the voltage of the first input end is smaller than the voltage of the second input end, the second switch control circuit turns off the corresponding second switch module; and under the condition that the comparison result output by the comparator is that the voltage of the first input end is greater than the voltage of the second input end, the corresponding second switch in the second switch circuit keeps the current on-off state.

Further, the voltage at the output end of the third power supply circuit is less than or equal to the preset voltage.

According to another aspect of the present invention, there is provided a display panel including: a pixel driving circuit as claimed in any one of the preceding claims.

Furthermore, the display panel is one of a liquid crystal display panel, a micro-light emitting pixel unit display panel, a mini light emitting diode display panel, a quantum dot light emitting diode display panel and an organic light emitting diode display panel.

The pixel driving circuit provided by the utility model can provide the limiting voltage for the pixel row corresponding to the first switch module which is switched from the closed state to the open state at present by arranging the voltage limiting control circuit, reduce the voltage of the input end of the corresponding pixel row, and enable the pixel row not to be driven, so that when the current pixel row is driven by the display panel, the rest un-driven pixel rows stop emitting light in time, namely, the ghost problem generated by the display panel is eliminated, and the display effect of the display panel is improved.

Other features and aspects of the present invention will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features, and aspects of the utility model and, together with the description, serve to explain the principles of the utility model.

Fig. 1 is a circuit diagram of a pixel driving circuit without a voltage limiting control circuit according to the present invention.

Fig. 2 is a circuit diagram of a pixel driving circuit including a voltage limiting control circuit according to the present invention.

Fig. 3 is a circuit diagram of another pixel driving circuit including a voltage limiting control circuit according to the present invention.

Fig. 4 is a circuit diagram of another pixel driving circuit including a voltage limiting control circuit according to the present invention.

Fig. 5 is a partial circuit diagram of a pixel driving circuit including a voltage limiting control circuit according to the present invention.

Fig. 6 is a partial circuit diagram of another pixel driving circuit including a voltage limiting control circuit according to the present invention.

Fig. 7 is a circuit diagram of another pixel driving circuit including a voltage limiting control circuit according to the present invention.

Detailed Description

Various exemplary embodiments, features and aspects of the present invention will be described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers can indicate functionally identical or similar elements. While the various aspects of the embodiments are presented in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.

Furthermore, in the following detailed description, numerous specific details are set forth in order to provide a better understanding of the utility model. It will be understood by those skilled in the art that the present invention may be practiced without some of these specific details. In some instances, methods, procedures, components, and circuits that are well known to those skilled in the art have not been described in detail so as not to obscure the present invention.

Referring to fig. 1, fig. 1 shows a pixel driving circuit without the voltage limiting control circuit 14, which includes: a first power supply circuit 11, a first switch circuit 12, and a pixel array circuit 13.

Illustratively, the pixel array circuit 13 includes a plurality of pixel rows (as shown in X1-X2), each pixel row includes a plurality of pixel cells (i.e., LED beads, as shown in D1-D4, and D5-D8), the pixel cells in the same pixel row are driven at the same time, and are equivalent to a plurality of pixel cells turned on according to the same scan signal output by the gate driving circuit, i.e., D1-D4 in the pixel row X1 are pixel cells located in the same gate scan line. The number of pixel rows and pixel units in the pixel driving array is not limited in the utility model.

Illustratively, the first power circuit 11 is electrically connected to each pixel row in the pixel array circuit 13 through a plurality of first switch modules 121 in the first switch circuit 12. That is, the first power circuit 11 is electrically connected to the pixel column X1 through the first switch module M1, and the first power circuit 11 is electrically connected to the pixel column X2 through the first switch module M2, and so on. The number of the first switch modules 121 in the first switch circuit 12 is equal to the number of the pixel rows in the pixel array circuit 13.

Illustratively, the on/off of each first switch module 121 in the first switch circuit 12 is determined by a gate driving chip in the display panel. For example, initially, each first switch module 121 is in an open state, and when the gate driving chip sends a scan signal to the first switch module M1, the first switch module M1 is switched from the open state to a closed state, and at this time, the first power circuit 11 supplies power to the parasitic capacitor C1 corresponding to the pixel row X1 and the pixel row X1 electrically connected to the first switch module M1, drives the pixel cells in the pixel row X1 to emit light, and charges the parasitic capacitor C1. Illustratively, in a case where the gate driving chip stops sending the scan signal to the first switch module M1, the first switch module M1 is switched from the closed state to the open state, and at this time, the first power supply circuit 11 stops supplying power to the pixel row X1 and the parasitic capacitor C1. Since the first switch module M1 is turned off, the charges in the parasitic capacitor C1 cannot be released, and the charges can only be released through the pixel row X1, so that the voltage value of the input terminal of the pixel row X1 is still greater than or equal to the driving voltage of the pixel row X1 within a certain time, and the driving voltage is the minimum voltage capable of driving each pixel unit in the pixel row X1 to emit light, so that the pixel units in the pixel row X1 can still emit light for a period of time.

However, after the first switch module M1 is turned off, the gate driver chip sends a scan signal to the first switch module M2, and turns on the first switch module M2 to supply power to the pixel row X2 and the parasitic capacitor C2, so as to drive each pixel unit in the pixel row X2 to emit light. That is, when the pixel row X1 does not stop emitting light, the gate driving chip already drives the pixel row X2 to emit light, which may cause the pixel row that should not be driven to still have a phenomenon of flickering, that is, a ghost phenomenon, when the display device displays an image, and the quality of the displayed image of the display panel is seriously affected.

In view of the above problems, the present invention provides a pixel driving circuit for a display panel, the pixel driving circuit including: a first power supply circuit 11, a first switch circuit 12, a voltage limiting control circuit 14, and a pixel array circuit 13.

Referring to fig. 2, the first power circuit 11 is electrically connected to the voltage limiting control circuit 14 and the pixel array circuit 13 through the first switch circuit 12, respectively, and the voltage limiting control circuit 14 is electrically connected to the pixel array circuit 13.

Further, the first power circuit 11 is electrically connected to each pixel row of the pixel array circuit 13 through a plurality of first switch modules 121 of the first switch circuit 12.

For example, the first power circuit 11 is electrically connected to the pixel row X1 through the first switch module M1, the first power circuit 11 is electrically connected to the pixel row X2 through the first switch module M2, and so on. The number of the first switch modules 121 in the first switch circuit 12 is equal to the number of the pixel rows in the pixel array circuit 13.

Alternatively, the on/off of each switch module in the first switch circuit 12 is controlled by a scan signal output by a gate driving chip in the display panel, that is, in a case where the gate driving chip sends the scan signal to the first switch module M1, the first switch module M1 is closed to drive the pixel row X1, and in a case where the gate driving chip sends the scan signal to the first switch module M2, the first switch module M2 is closed to drive the pixel row X2. When the gate driving chip stops transmitting the scan signal to the first switching module M1, the first switching module M1 is turned off to stop driving the pixel row X1, and when the gate driving chip stops transmitting the scan signal to the first switching module M2, the first switching module M2 is turned off to stop driving the pixel row X2.

Further, the voltage limiting control circuit 14 is configured to output a limiting voltage to the target pixel row when the first switch module 121 corresponding to the target pixel row is switched from the closed state to the open state. Wherein the limiting voltage is less than the minimum driving voltage of the target pixel row. The target pixel row is a pixel row corresponding to the first switch module 121 which is currently switched from the closed state to the open state.

Illustratively, in the first time period, the gate driving chip sends a scan signal to the first switch module M1, and closes the first switch module M1, so that the first power circuit 11 supplies power to the pixel row X1 and the parasitic capacitor C1. In a second time period after the first time period, the gate driver chip stops sending the scan signal to the first switch module M1, and starts sending the scan signal to the first switch module M2, so that the first power circuit 11 supplies power to the pixel row X2 and the parasitic capacitor C2. At this time, the pixel row X1 is the target pixel row, i.e., the voltage limiting control circuit 14 outputs the limiting voltage to the pixel row X1 (i.e., the target pixel row).

Referring to fig. 2, when the first switch module M1 is switched from the closed state to the open state, the voltage limiting control circuit 14 provides a limiting voltage to the circuit SW1 (i.e., a circuit including the pixel units D1-D4, the parasitic capacitor C1, and the first switch module M1), that is, the voltage across the circuit SW1 is equal to the voltage at the output terminal of the voltage limiting control circuit 14. Wherein, the voltage value of the output end of the voltage limiting control circuit 14 is the voltage value of the limiting voltage. Since the voltage value at the input terminal of the pixel row X1 and the voltage value at the output terminal of the parasitic capacitor C1 are both the voltage values of the limit voltage, when the first switch module 121 is switched from the closed state to the open state, the voltage at the input terminal of the pixel row X1 is equal to the limit voltage (i.e., is less than the minimum driving voltage of the pixel row) by making the limit voltage smaller than the minimum driving voltage of the pixel row X1. Meanwhile, the voltage at the output terminal of the parasitic capacitor C1 is clamped to the limit voltage, so that each pixel cell inside cannot emit light, and even if the voltage limit control circuit 14 stops providing the limit voltage for the circuit SW1, the voltage at the output terminal of the parasitic capacitor cannot drive the pixel row X1. Similarly, when the first switch module M2 is switched from the closed state to the open state, voltages of the parts in the circuit SW2 (i.e., the circuit including the pixel units D5-D8, the parasitic capacitor C2 and the first switch module M2) are the same as those described above, that is, at this time, the voltage limiting control circuit 14 provides the limiting voltage for the circuit SW2, and the voltage across the circuit SW2 is equal to the voltage at the output terminal of the voltage limiting control circuit 14. Wherein, the voltage value of the output end of the voltage limiting control circuit 14 is the voltage value of the limiting voltage. Since the voltage value at the input terminal of the pixel row X2 and the voltage value at the output terminal of the parasitic capacitor C2 are both the voltage values of the limit voltage, when the first switch module 121 is switched from the closed state to the open state, the voltage at the input terminal of the pixel row X2 is equal to the limit voltage (i.e., is less than the minimum driving voltage of the pixel row) by making the limit voltage smaller than the minimum driving voltage of the pixel row X2. Meanwhile, the voltage at the output terminal of the parasitic capacitor C2 is clamped to the limit voltage, so that each pixel unit inside cannot emit light, and even if the voltage limiting control circuit 14 stops supplying the limit voltage to the circuit SW1, the voltage at the output terminal of the parasitic capacitor cannot drive the pixel row X1.

Further, when the first switch module M2 is switched from the closed state to the open state, and at this time, the pixel row X1 does not belong to the current target pixel row, the voltage-limiting control circuit 14 stops providing the limiting voltage for the pixel row X1, and then provides the limiting voltage for the pixel row X2, which is the same as the above-mentioned process of providing the limiting voltage for the pixel row X1, and therefore, the description is omitted here.

Illustratively, the minimum voltage for driving the pixel row is equal to the sum of the voltage required for driving the pixel cells in the pixel row and the voltage required for turning on the NMOS switch in the circuit L1 (i.e., the circuit including the NMOS switch in fig. 2). In the pixel array circuit 13, two conditions are usually required to be satisfied if the LED lamp beads (i.e., the pixel units) can emit light normally. First, the voltage at the input end of the pixel row where the LED lamp bead is located is connected to a high potential, that is, the first switch module 121 corresponding to the pixel row is closed, so that the input end of the pixel row is connected to the first power circuit 11. Secondly, the pixel column (corresponding to the circuit L1 in fig. 2) where the LED lamp bead is located is pulled to a low potential, that is, the NMOS switch tube in the circuit L1 is turned on, at this time, the voltage at the input end of the circuit L1 is determined according to the turn-on voltage of the NMOS switch tube, and is usually 300mV, that is, the pixel unit in the pixel row emits light, and the voltage at the input end of the pixel unit is usually the sum of the minimum voltage capable of causing the pixel unit to emit light and the turn-on voltage when the MOS switch tube is turned on.

The pixel driving circuit provided by the utility model can provide the limiting voltage for the pixel row corresponding to the first switch module 121 which is switched from the closed state to the open state at present by arranging the voltage limiting control circuit 14, reduce the voltage of the input end of the corresponding pixel row, and enable the pixel row not to be driven, so that when the current pixel row is driven by the display panel, the rest un-driven pixel rows stop emitting light in time, namely, the ghost problem generated by the display panel is eliminated, and the display effect of the display panel is improved.

Referring to fig. 2, in some embodiments of the present invention, in the case that the voltage at the input terminal of the target pixel row is less than the preset voltage, the voltage limiting control circuit 14 stops outputting the limiting voltage to the target pixel row.

For example, the preset voltage is the minimum voltage capable of driving the pixel row, that is, if the voltage capable of making each pixel unit in the pixel row X1 emit light is 6v, the preset voltage is 6v, and in the case that the voltage at the input terminal of the pixel row X1 is less than 6v, the voltage limiting control circuit 14 stops providing the limiting voltage for the pixel row X1.

Illustratively, while the voltage-limiting control circuit 14 provides the limiting voltage for the pixel row X1, the voltage-limiting control circuit 14 may stop providing the limiting voltage for the pixel row X1 by detecting the voltage value in the circuit SW1 in real time, in case the voltage value in the circuit SW1 is smaller than the preset voltage.

The pixel driving circuit provided by the utility model can timely stop providing the limiting voltage for the target pixel row by detecting the voltage value of the input end of the target pixel row in real time, save the electric energy of the voltage limiting control circuit 14, prolong the effective time of the pixel driving circuit and prolong the service life of the pixel driving circuit.

Referring to fig. 3-4, in some embodiments of the present invention, the voltage limiting control circuit 14 includes: a second power supply circuit 142, a second switch circuit 141, and a control circuit 143.

For example, the second power circuit 142 is electrically connected to each pixel row of the pixel array circuit 13 through a plurality of second switch modules 1411 of the second switch circuit 141. That is, the second power circuit 142 is electrically connected to the pixel column X1 through the second switch module S1, the second power circuit 142 is electrically connected to the pixel column X2 through the second switch module S2, the second power circuit 142 is electrically connected to the pixel column X3 through the second switch module S3, and so on. The number of the second switch modules 1411 in the second switch circuit 141 is equal to the number of the pixel rows in the pixel array circuit 13.

Illustratively, the second power circuit 142 may be selected from a constant current source (see fig. 5) or a constant voltage source (see fig. 6).

Illustratively, when the second power supply circuit 142 includes a constant current source, an output terminal of the constant current source is connected to the second switching circuit 141 and outputs a limit voltage.

For example, referring to fig. 5, the voltage value provided by the constant current source (corresponding to the second power source circuit 142) to the circuit SW1 can be set to be smaller than the minimum driving voltage of the pixel row X1 when the first switch module M1 is turned off and the second switch module S1 is turned on, and the voltage value in the circuit SW1 (i.e. the voltage value at the input end of the pixel row X1) is set to be smaller than the minimum driving voltage of the pixel row X1.

Illustratively, when the second power supply circuit 142 includes a constant voltage source, the constant voltage source is connected in series between the output terminal of the first power supply circuit 11 and the second switching circuit 141, and the voltage value of the constant voltage source is greater than the difference between the voltage at the output terminal of the first power supply circuit 11 and the preset voltage.

For example, referring to fig. 6, the voltage value at the point a in the figure may be the difference between the voltage value of the first power circuit 11 and the voltage value of a constant voltage source (corresponding to the second power circuit 142) by connecting the constant voltage source (corresponding to the second power circuit 142) in series with the output terminal of the first power circuit 11. The difference between the voltage value at the output terminal of the first power supply circuit 11 and the voltage value output by the constant voltage source can be made smaller than the minimum driving voltage of the pixel row by setting the voltage level of the constant voltage source (equivalent to the second power supply circuit 142).

Optionally, the preset voltage is equal to a minimum voltage for driving the pixel row. That is, if the minimum voltage for driving the pixel row is 5v, and the voltage at the output terminal of the first power circuit 11 is 10v, the predetermined voltage is 5 v. In the case where the second power supply circuit 142 includes a constant voltage source (i.e., as shown in fig. 6), the voltage drop generated by the second power supply circuit 142 (i.e., the voltage value of the constant voltage source) is greater than 10v-5v, i.e., greater than 5v, i.e., the voltage of the second power supply circuit 142 may be 6v, 7v, etc., and the voltage drop of the second power supply circuit 142 is not greater than the voltage value at the output terminal of the first power supply circuit 11, i.e., not greater than 10 v.

Further, the voltage limiting control circuit 14 controls the on/off state of the second switch module 1411 corresponding to the target pixel row in the second switch circuit 141 according to the voltage at the input terminal of the target pixel row.

For example, in a case where any one of the first switch modules 121 is currently switched from on to off, the control circuit 143 turns on the second switch module 1411 electrically connected to the target pixel row connected to the first switch module 121. When the voltage at the input terminal of the target pixel row is less than the preset voltage, the control circuit 143 disconnects the second switch module 1411 electrically connected thereto.

For example, referring to fig. 3 to 4, in the case that the first switch module M1 is currently switched from the closed state to the open state, the second switch module S1 in the second switch circuit 141 is closed, and at this time, the second power supply circuit 142 supplies the limiting voltage to the input terminal of the pixel row S1. With the preset voltage of 5v, when the control circuit 143 detects that the voltage at the input terminal of the target pixel row is less than 5v (preset voltage), the control circuit 143 turns off the second switch module S1, so as to stop providing the limiting voltage to the pixel row X1.

The pixel driving circuit provided by the utility model can timely stop providing the limiting voltage for the target pixel row by detecting the voltage value of the input end of the target pixel row in real time, save the electric energy of the voltage limiting control circuit 14, prolong the effective time of the pixel driving circuit and prolong the service life of the pixel driving circuit.

Referring to fig. 7, in some embodiments of the utility model, the control circuit 143 includes a comparator 1431, a third power supply circuit 1434, a third switch circuit 1433, and a second switch control circuit 1432. A first input terminal of the comparator 1431 is electrically connected to each pixel column of the pixel array circuit 13 through a plurality of third switch modules 14331 of the third switch circuit 1433, an output terminal of the comparator 1431 is electrically connected to the second switch control circuit 1432, and a second input terminal of the comparator 1431 is electrically connected to an output terminal of the third power circuit 1434.

For example, the first input terminal of the comparator 1431 is electrically connected to the pixel column X1 through the third switch module F1, electrically connected to the pixel column X2 through the third switch module F2, and so on. The second input terminal of the comparator 1431 is electrically connected to the third power supply.

Further, the comparator 1431 is configured to compare the voltage of the first input terminal with the voltage of the second input terminal, and output a comparison result to the second switch control circuit 1432. The second switch control circuit 1432 is configured to control an on/off state of each second switch module 1411 in the second switch circuit 141.

For example, when any one of the third switch modules 14331 is closed, the second switch control circuit 1432 controls the on/off state of the second switch module 1411 electrically connected to the closed third switch module 14331 according to the comparison result.

For example, when the third switching module F1 is closed, the second switching module S1 is closed, and the first switching module M1 is opened, the voltage of the first input terminal of the comparator 1431 is equal to the voltage of the circuit SW1, the voltage of the second input terminal of the comparator 1431 is equal to the voltage of the output terminal of the third power supply circuit 1434, and the comparator 1431 compares the voltages of the two terminals to output the comparison result.

Optionally, referring to fig. 4 and 7, the third power circuit 1434 is a voltage source, and the voltage value of the voltage source may be less than or equal to the preset voltage, that is, the minimum voltage value capable of driving the pixel row.

For example, in the case that the comparison result output by the comparator 1431 is that the voltage of the first input terminal is less than the voltage of the second input terminal, the second switch control circuit 1432 turns off the corresponding second switch module 1411. When the comparison result output by the comparator 1431 is that the voltage of the first input terminal is greater than the voltage of the second input terminal, the corresponding second switch in the second switch circuit 141 maintains the current on-off state.

Illustratively, in a case where the third switch module F1 is closed, the M1 is open, and the S1 is closed, the comparator 1431 compares the voltage values of the first input terminal and the second input terminal, that is, the voltage value in the comparison circuit SW1 and the voltage value at the output terminal of the third power supply circuit 1434. If the output result is that the voltage at the first input terminal is less than the voltage at the second input terminal, it indicates that the voltage at the circuit SW1 is less than the voltage at the output terminal of the third power circuit 1434, that is, the voltage at the input terminal of the pixel row X1 is less than the predetermined voltage (the minimum driving voltage of the pixel row X1), which indicates that each pixel unit in the pixel row X1 cannot emit light at this time. At this time, the second switch module S1 is turned off, and optionally, the third switch module F1 and the second switch module S1 may be turned off at the same time. On the contrary, if the comparison result output by the comparator 1431 is that the voltage at the first input terminal is greater than the voltage at the second input terminal, it indicates that the voltage in the circuit SW1 (which is equivalent to the voltage at the input terminal of the pixel row X1) is greater than the preset voltage, that is, the pixel units in the pixel row X1 are in the light-emitting state, so that the second switch module S1 and the third switch module F1 are kept in the current on-off state, that is, the closed state is kept until the voltage at the input terminal of the pixel row X1 is less than the preset voltage.

The pixel driving circuit provided by the utility model can timely stop providing the limiting voltage for the target pixel row by detecting the voltage value of the input end of the target pixel row in real time, save the electric energy of the voltage limiting control circuit, prolong the effective time of the voltage limiting control circuit and prolong the service life of the voltage limiting control circuit. In addition, the pixel driving circuit provided by the utility model has a simple structure, is easy to manufacture, can save the cost of the pixel driving circuit to a certain extent, and simplifies the internal structure of the pixel driving circuit.

In another aspect of the present invention, the present invention also provides a display panel comprising the pixel driving circuit described above.

Illustratively, the display panel is one of a liquid crystal display panel, a micro-light emitting pixel unit display panel, a mini light emitting diode display panel, a quantum dot light emitting diode display panel, and an organic light emitting diode display panel.

The display panel provided by the utility model can provide the limiting voltage for the pixel row corresponding to the first switch module which is switched from the closed state to the open state within the preset time through arranging the voltage limiting control circuit, reduce the voltage of the input end of the corresponding pixel row, and enable the pixel row not to be driven, so that when the display panel drives the current pixel row, the rest un-driven pixel rows stop emitting light in time, namely, the ghost problem generated by the display panel is eliminated, and the display effect of the display panel is improved. Meanwhile, the display panel provided by the utility model can also stop providing the limiting voltage for the target pixel row in time by detecting the voltage value of the input end of the target pixel row in real time, so that the electric energy of the voltage limiting control circuit is saved, the effective time of the voltage limiting control circuit is prolonged, and the service life of the voltage limiting control circuit is prolonged. In addition, the pixel driving circuit provided by the utility model has a simple structure and is easy to manufacture, so that the cost of the display panel can be saved to a certain extent on the premise of ensuring that the ghost problem in the display panel is eliminated, and the internal structure of the pixel driving circuit is simplified.

Having described embodiments of the present invention, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terms used herein were chosen in order to best explain the principles of the embodiments, the practical application, or technical improvements to the techniques in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

Claims (11)

1. A pixel driving circuit for a display panel, the pixel driving circuit comprising: the pixel array circuit comprises a first power supply circuit, a first switch circuit, a voltage limiting control circuit and a pixel array circuit;

the first power supply circuit is electrically connected with the voltage limiting control circuit and the pixel array circuit through the first switch circuit respectively, and the voltage limiting control circuit is electrically connected with the pixel array circuit;

the first power supply circuit is electrically connected with each pixel row in the pixel array circuit through a plurality of first switch modules in the first switch circuit respectively;

the voltage limiting control circuit is used for outputting limiting voltage to the target pixel row when the first switch module corresponding to the target pixel row is switched from a closed state to an open state;

and the limiting voltage is less than the minimum driving voltage of the target pixel row, and the target pixel row is the pixel row corresponding to the first switch module which is switched from the closed state to the open state at present.

2. The pixel driving circuit according to claim 1, wherein the voltage limiting control circuit stops outputting the limiting voltage to the target pixel row if the voltage at the input terminal of the target pixel row is less than a preset voltage.

3. The pixel driving circuit according to claim 2, wherein the voltage limiting control circuit comprises: the second power supply circuit, the second switch circuit and the control circuit;

the second power supply circuit is electrically connected with each pixel row in the pixel array circuit through a plurality of second switch modules in the second switch circuit respectively;

and the control circuit controls the on-off state of a second switch module corresponding to the target pixel row in the second switch circuit according to the voltage of the input end of the target pixel row.

4. The pixel driving circuit according to claim 3, wherein when any of the first switch modules is currently switched from on to off, the control circuit closes a second switch module electrically connected to a target pixel row connected to the first switch module;

and under the condition that the voltage of the input end of the target pixel row is less than the preset voltage, the control circuit disconnects the second switch module electrically connected with the control circuit.

5. The pixel driving circuit according to claim 3, wherein when the second power supply circuit includes a constant voltage source, the constant voltage source is connected in series between the output terminal of the first power supply circuit and the second switching circuit, and a voltage value of the constant voltage source is greater than a difference between a voltage at the output terminal of the first power supply circuit and the preset voltage.

6. The pixel driving circuit according to claim 3, wherein when the second power supply circuit includes a constant current source, an output terminal of the constant current source is connected to the second switch circuit and outputs the limit voltage.

7. The pixel driving circuit according to claim 2, wherein the control circuit includes a comparator, a third power supply circuit, a third switching circuit, and a second switching control circuit;

the first input end of the comparator is electrically connected with each pixel row in the pixel array circuit through a plurality of third switch modules in the third switch circuit respectively, the output end of the comparator is electrically connected with the second switch control circuit, and the second input end of the comparator is electrically connected with the output end of the third power circuit;

the comparator is used for comparing the voltage of the first input end with the voltage of the second input end and outputting a comparison result to the second switch control circuit;

and under the condition that any one third switch module is closed, the second switch control circuit controls the on-off state of the second switch module electrically connected with the closed third switch module according to the comparison result.

8. The pixel driving circuit according to claim 7, wherein the second switch control circuit turns off the corresponding second switch module when the comparison result output by the comparator is that the voltage of the first input terminal is less than the voltage of the second input terminal;

and under the condition that the comparison result output by the comparator is that the voltage of the first input end is greater than the voltage of the second input end, the corresponding second switch in the second switch control circuit keeps the current on-off state.

9. The pixel driving circuit according to claim 7, wherein the voltage at the output of the third power supply circuit is less than or equal to the predetermined voltage.

10. A display panel, comprising: a pixel driving circuit as claimed in any one of claims 1 to 9.

11. The display panel of claim 10, wherein the display panel is one of a liquid crystal display panel, a micro-emissive pixel unit display panel, a mini-led display panel, a qd-led display panel, and an oled display panel.

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