CN216870807U - Frequency-selecting anti-interference reversing radar circuit and reversing radar device - Google Patents
Frequency-selecting anti-interference reversing radar circuit and reversing radar device Download PDFInfo
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Abstract
The utility model relates to the technical field of ultrasonic ranging, in particular to a frequency-selecting anti-interference reversing radar circuit and a reversing radar device, which comprise a frequency-selecting amplifying circuit, wherein the input end of the frequency-selecting amplifying circuit is used for receiving an echo signal of an ultrasonic radar probe; the input end of the signal processing circuit is coupled with the output end of the frequency-selecting amplifying circuit and is used for amplifying and carrying out anti-interference processing on the signal; the output end of the signal processing circuit is respectively coupled with the pulse integrating circuit and the pulse shaping circuit, the pulse integrating circuit is used for integrating the signal and outputting the signal to the MCU for integral signal width detection, and the pulse shaping circuit is used for shaping the signal and outputting the signal to the MCU for pulse frequency and pulse number detection. The circuit provided by the utility model pre-amplifies and frequency selects the ultrasonic radar echo signal, and then filters out other interference signals, thereby avoiding false detection caused by interference of other signals. The pulse shaping circuit can confirm whether the received radar echo signal has the same frequency with the transmitting signal again, so that the driving safety of the vehicle is guaranteed.
Description
Technical Field
The utility model relates to the technical field of ultrasonic ranging, in particular to a frequency-selecting anti-interference reversing radar circuit and a reversing radar device.
Background
The radar for back running is widely installed in various automobiles as a safety type automobile electronic product to form an automobile standard product, which is also called as a parking auxiliary system, adopts the ultrasonic ranging principle, and under the control of a back running radar host, a radar probe transmits an ultrasonic signal, when encountering an obstacle, a reflected echo signal is generated, and the radar probe receives the reflected echo signal and then carries out data processing through the back running radar host, so that the position of the obstacle is judged, and a warning signal is sent out. The device and the method have the advantages that troubles caused by front, back, left and right visual angles when a driver parks and starts a vehicle are eliminated, the defects of visual dead angles and blurred vision of the driver are overcome, and the driving safety is improved.
However, in the prior art, many reversing radar products have poor anti-interference performance, and unnecessary false alarm occurs, so that the judgment of a driver on a normal obstacle is influenced. If the reversing radar works normally under the condition of calmness and no interference, false alarm occurs under the conditions of pressing a horn, turning on an air conditioner, stepping on an accelerator, accelerating a new energy automobile and the like of the automobile, and the reversing radar cannot work normally.
SUMMERY OF THE UTILITY MODEL
In order to solve the defect of false alarm of the reversing radar in the prior art, the utility model provides a frequency-selecting anti-interference reversing radar circuit, which comprises a frequency-selecting amplifying circuit, a signal processing circuit, a pulse integrating circuit and a pulse shaping circuit, wherein:
the input end of the frequency-selecting amplifying circuit receives an echo signal of the ultrasonic radar probe, and the output end of the frequency-selecting amplifying circuit is coupled with the input end of the signal processing circuit and used for amplifying and carrying out anti-interference processing on the signal; the output end of the signal processing circuit is respectively coupled with the pulse integrating circuit and the pulse shaping circuit, the pulse integrating circuit is used for integrating signals and outputting the signals to the MCU for integral signal width detection, and the pulse shaping circuit is used for shaping the signals and outputting the signals to the MCU for pulse frequency and pulse number detection.
In one embodiment, the frequency-selective amplifying circuit comprises a coupling capacitor C18, a transistor Q2, a middle period T1, a resonant capacitor C13, a load resistor R13, a bias resistor R8, a bias resistor R10, a bias resistor R12, a decoupling capacitor C23, a decoupling capacitor C24, a limiting diode D3, a bias circuit, and a decoupling filter circuit;
after the load resistor R13, the decoupling capacitor C23 and the decoupling capacitor C24 are connected in parallel, one end of the load resistor R is grounded, and the other end of the load resistor R is connected with an emitting electrode of the triode Q2; the base electrode of the triode Q2 is connected with the input ends of the coupling capacitor C18 and the frequency-selecting amplifying circuit through a biasing resistor R10, and is also connected with the decoupling filter circuit through a biasing resistor R8 and is grounded through a biasing resistor R12; the input end of the frequency-selecting amplifying circuit is also grounded through a limiting diode D3 which is connected in parallel in a bidirectional mode; the collector of the triode Q2 is connected with the sixth pin of the middle period T1; one end of a fourth pin of the middle period T1 is connected with a sixth pin through a resonant capacitor C13, and is also connected with a decoupling filter circuit, and the decoupling filter circuit is connected with a first power supply end; the first pin of the middle period T1 is grounded, and the second pin is connected with the signal processing circuit.
In one embodiment, the decoupling filter circuit comprises a capacitor C14, a resistor R4, a capacitor C8; one end of the capacitor C14 is connected with the fourth pin of the middle period T1, and the other end is grounded; one end of the capacitor C8 is connected with the fourth pin of the middle period T1 through a resistor R4, and the other end is grounded.
In one embodiment, the signal processing circuit comprises an operational amplifier U3A, an operational amplifier U3B, an amplification factor adjusting circuit, a coupling capacitor C16, a first voltage division biasing circuit, a second voltage division biasing circuit and a filter circuit;
the sixth pin of the operational amplifier U3B is connected to the output terminal of the operational amplifier U3B and the coupling capacitor C16 through an amplification factor adjusting circuit, and the coupling capacitor C16 is connected to the output terminal of the frequency-selective amplifying circuit; a fifth pin of the operational amplifier U3B is connected with a first voltage division bias circuit; the seventh pin of the operational amplifier U3B is connected with the second pin of the operational amplifier U3A;
a third pin of the operational amplifier U3A is connected with a second pin thereof through a second voltage division bias circuit; an eighth pin of the operational amplifier U3A is connected with the first voltage division biasing circuit and is also connected with a first power supply end through a filter circuit; the fourth pin of the operational amplifier U3A is grounded, and the first pin is respectively connected with the pulse integrating circuit and the pulse shaping circuit.
In one embodiment, the amplification factor adjusting circuit comprises an adjustable resistor VR1, a resistor R5, a resistor R7 and a vibration-damping capacitor C12;
after the adjustable resistor VR1 is connected in parallel with the resistor R7, one end of the adjustable resistor VR1 is connected with the coupling capacitor C16, and the other end of the adjustable resistor VR 3878 is connected with the seventh pin of the operational amplifier U3B through the resistor R5 and the vibration-damping capacitor C12 which are connected in parallel.
In one embodiment, the first voltage-dividing bias circuit includes a bias resistor R15, a voltage-dividing resistor R17, a voltage-dividing resistor R19, and a decoupling capacitor C30; one end of the bias resistor R15 is connected with the fifth pin of the operational amplifier U3B; the other end of the voltage divider is grounded through a voltage dividing resistor R19 and a decoupling capacitor C30 which are connected in parallel, and is connected with the filter circuit through a voltage dividing resistor R17.
In one embodiment, the second voltage-dividing bias circuit comprises a bias resistor R14, a voltage-dividing resistor R18, and a decoupling capacitor C28; one end of the bias resistor R14 is connected with the second pin of the operational amplifier U3A; the other end of the voltage divider is grounded through a voltage divider resistor R18 and a decoupling capacitor C28 which are connected in parallel, and is also connected with a third pin of the operational amplifier U3B.
In one embodiment, the pulse integration circuit comprises a triode Q3, an integrating capacitor C21, a current limiting resistor R11, a protection diode D2, a protection resistor R16, a capacitor C22, and a resistor R6;
after being connected in parallel, the protective diode D2 and the protective resistor R16 are connected with one end of the protective diode D2 and the base electrode of the triode Q3, and the other end of the protective diode D8932 is grounded and is also connected with the emitting electrode of the triode Q3;
the base electrode of the triode Q3 is connected with the signal processing circuit through a current-limiting resistor R11 and a capacitor C22; the emitter of the transistor Q3 is connected with the collector of the transistor Q3 through an integrating capacitor C21; the collector of the transistor Q3 is connected to the second power supply terminal via a resistor R6 and also to the MCU.
In one embodiment, the pulse shaping circuit includes a transistor Q5, a resistor R22, a current limiting resistor R23, a protection diode D4, and a protection resistor R25;
after being connected in parallel, the protective diode D4 and the protective resistor R25 are connected with one end of the protective diode D4 and the base electrode of the triode Q5, and the other end of the protective diode D8932 is grounded and is also connected with the ground emitter of the triode Q5;
the base electrode of the triode Q5 is also connected with the signal processing circuit through a current-limiting resistor R23, and the collector electrode of the triode Q5 is also connected with the MCU while being connected with a second power supply end through a resistor R22.
The utility model also provides a reversing radar device which adopts the frequency-selecting anti-interference reversing radar circuit.
Based on the above, compared with the prior art, the frequency-selecting anti-interference reversing radar circuit provided by the utility model can pre-amplify and frequency-select ultrasonic reflection signals through the frequency-selecting amplifying circuit and the signal processing circuit, and then filter out other interference signals, so as to avoid false detection caused by interference of other signals. In addition, whether the received radar echo signal has the same frequency as the transmitting signal or not is confirmed again through the arranged pulse shaping circuit, so that the driving safety of the vehicle is guaranteed.
Additional features and advantages of the utility model will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the utility model. The objectives and other advantages of the utility model will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts; in the following description, the drawings are illustrated in a schematic view, and the drawings are not intended to limit the present invention.
FIG. 1 is a circuit block diagram of a frequency-selective anti-interference reverse sensor circuit provided by the utility model;
FIG. 2 is a circuit diagram of a frequency-selective anti-interference reversing radar circuit provided by the utility model;
FIG. 3 is a circuit diagram of a frequency selective amplifier circuit;
FIG. 4 is a circuit diagram of a signal processing circuit;
FIG. 5 is a circuit diagram of a pulse integration circuit;
fig. 6 is a circuit diagram of a pulse shaping circuit.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments; the technical features designed in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other; all other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be noted that all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present invention belongs, and are not to be construed as limiting the present invention; it will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
In the reversing radar device, because the ultrasonic reflection signal received by the radar probe is extremely weak, only dozens of millivolts, the ultrasonic reflection signal must be amplified by high power, filtered and shaped, and interference and noise with small intensity are filtered, but the shape and intensity of some interference signals are similar to those of normal ultrasonic radar reflection signals, such as interference, metal impact, electromagnetic interference and the like of other reversing radars, so that the detection result of the device is influenced.
Therefore, in order to solve the above problems, the present invention provides a frequency-selective anti-interference reverse radar circuit, which includes a frequency-selective amplifying circuit, a signal processing circuit, a pulse integrating circuit, and a pulse shaping circuit, wherein: the input end of the frequency-selective amplifying circuit receives an echo signal of the ultrasonic radar probe, and the output end of the frequency-selective amplifying circuit is coupled with the input end of the signal processing circuit and is used for amplifying and carrying out anti-interference processing on the signal; the output end of the signal processing circuit is respectively coupled with the pulse integrating circuit and the pulse shaping circuit, the pulse integrating circuit is used for integrating signals and outputting the signals to the MCU for integral signal width detection, and the pulse shaping circuit is used for shaping the signals and outputting the signals to the MCU for pulse frequency and pulse number detection.
In specific implementation, as shown in fig. 1 and 2, the working principle is as follows: the frequency-selecting amplifying circuit can pre-amplify received ultrasonic radar echo signals and select signals consistent with the working frequency of the radar probe through the frequency-selecting amplifying circuit, so that other interference signals are effectively filtered. And inputting the frequency-selected and preprocessed signals into a signal processing circuit, amplifying the signals at high power and processing noise. And finally, inputting the processed signals to a pulse integrating circuit and a pulse shaping circuit respectively, wherein the pulse integrating circuit can integrate the pulse signals and transmit the integrated pulse signals to an MCU (microprogrammed control unit) for width detection so as to judge whether an obstacle exists or not and calculate the distance between the obstacles. The pulse shaping circuit can shape the pulse, then output a pulse with the same frequency as the echo signal of the ultrasonic radar, and the pulse is output to the MCU to detect the pulse frequency and the number of the pulses, thereby confirming whether the signal is the correct detection generated by the barrier or the false detection generated by the interference again.
Preferably, the frequency-selective amplifying circuit comprises a coupling capacitor C18, a triode Q2, a middle period T1, a resonant capacitor C13, a load resistor R13, a bias resistor R8, a bias resistor R10, a bias resistor R12, a decoupling capacitor C23, a decoupling capacitor C24, a limiting diode D3, a bias circuit and a decoupling filter circuit;
after the load resistor R13, the decoupling capacitor C23 and the decoupling capacitor C24 are connected in parallel, one end of the load resistor R is grounded, and the other end of the load resistor R is connected with an emitting electrode of the triode Q2; the base electrode of the triode Q2 is connected with the input ends of the coupling capacitor C18 and the frequency-selecting amplifying circuit through a biasing resistor R10, and is also connected with the decoupling filter circuit through a biasing resistor R8 and is grounded through a biasing resistor R12; the input end of the frequency-selecting amplifying circuit is also grounded through a limiting diode D3 which is connected in parallel in a bidirectional mode; the collector of the triode Q2 is connected with the sixth pin of the middle period T1; one end of a fourth pin of the middle period T1 is connected with a sixth pin through a resonant capacitor C13, and is also connected with a decoupling filter circuit, and the decoupling filter circuit is connected with a first power supply end; the first pin of the middle period T1 is grounded, and the second pin is connected with the signal processing circuit.
Preferably, the decoupling filter circuit comprises a capacitor C14, a resistor R4, and a capacitor C8; one end of the capacitor C14 is connected with the fourth pin of the middle period T1, and the other end is grounded; one end of the capacitor C8 is connected with the fourth pin of the middle period T1 through a resistor R4, and the other end is grounded.
In specific implementation, as shown in fig. 3, an ultrasonic radar echo signal is input by a coupling capacitor C18, and is pre-amplified by a bias circuit such that a transistor Q2 is in an amplification state. And then the resonant frequency of the LC loop is at the central point of the working frequency of the ultrasonic radar through the resonant capacitor C13 and the middle-period T1 magnetic core is finely adjusted so as to select a signal consistent with the working frequency of the radar probe. For example, if the working frequency of the radar probe is 48KHz, the resonant frequency of the LC is adjusted to be 48 KHz; and if the working frequency of the radar probe is 58KHz, the resonant frequency of the LC is adjusted to be 58 KHz. And finally, outputting the signals to a signal processing circuit.
Preferably, the power supply voltage of the first power supply terminal is 8V.
Preferably, the signal processing circuit comprises an operational amplifier U3A, an operational amplifier U3B, an amplification factor adjusting circuit, a coupling capacitor C16, a first voltage division biasing circuit, a second voltage division biasing circuit and a filter circuit;
the sixth pin of the operational amplifier U3B is connected to the output terminal of the operational amplifier U3B and the coupling capacitor C16 through an amplification factor adjusting circuit, and the coupling capacitor C16 is connected to the output terminal of the frequency-selective amplifying circuit; a fifth pin of the operational amplifier U3B is connected with a first voltage division bias circuit; the seventh pin of the operational amplifier U3B is connected with the second pin of the operational amplifier U3A;
a third pin of the operational amplifier U3A is connected with a second pin thereof through a second voltage division bias circuit; an eighth pin of the operational amplifier U3A is connected with the first voltage division biasing circuit and is also connected with a first power supply end through a filter circuit; the fourth pin of the operational amplifier U3A is grounded, and the first pin is respectively connected with the pulse integrating circuit and the pulse shaping circuit.
Preferably, the amplification factor adjusting circuit comprises an adjustable resistor VR1, a resistor R5, a resistor R7 and a vibration eliminating capacitor C12; after the adjustable resistor VR1 is connected in parallel with the resistor R7, one end of the adjustable resistor VR1 is connected with the coupling capacitor C16, and the other end of the adjustable resistor VR 3878 is connected with the seventh pin of the operational amplifier U3B through the resistor R5 and the vibration-damping capacitor C12 which are connected in parallel.
Preferably, the first voltage division biasing circuit comprises a biasing resistor R15, a voltage division resistor R17, a voltage division resistor R19 and a decoupling capacitor C30; one end of the bias resistor R15 is connected with the fifth pin of the operational amplifier U3B; the other end of the voltage divider is grounded through a voltage dividing resistor R19 and a decoupling capacitor C30 which are connected in parallel, and is connected with the filter circuit through a voltage dividing resistor R17.
Preferably, the second voltage-dividing bias circuit comprises a bias resistor R14, a voltage-dividing resistor R18 and a decoupling capacitor C28; one end of the bias resistor R14 is connected with the second pin of the operational amplifier U3A; the other end of the voltage divider is grounded through a voltage divider resistor R18 and a decoupling capacitor C28 which are connected in parallel, and is also connected with a third pin of the operational amplifier U3B.
In specific implementation, as shown in fig. 4, a signal is input by the coupling capacitor C16, is secondarily amplified by the operational amplifier U3B and the operational amplifier U3A, and is output to the pulse integrating circuit and the pulse shaping circuit after the voltage division and filtering actions of the first voltage division biasing circuit, the second voltage division biasing circuit and the filter circuit. The adjustable resistor VR1 can adjust the amplification factor of the operational amplifier U3B.
Preferably, the filter circuit is formed by connecting a capacitor C31 and a capacitor C32 in parallel.
Preferably, the pulse integration circuit comprises a triode Q3, an integration capacitor C21, a current-limiting resistor R11, a protection diode D2, a protection resistor R16, a capacitor C22 and a resistor R6;
after being connected in parallel, the protective diode D2 and the protective resistor R16 are connected with one end of the protective diode D2 and the base electrode of the triode Q3, and the other end of the protective diode D8932 is grounded and is also connected with the emitting electrode of the triode Q3;
the base electrode of the triode Q3 is connected with the signal processing circuit through a current-limiting resistor R11 and a capacitor C22; the emitter of the transistor Q3 is connected with the collector of the transistor Q3 through an integrating capacitor C21; the collector of the transistor Q3 is connected to the second power supply terminal via a resistor R6 and also to the MCU.
In specific implementation, as shown in fig. 5, the amplified and anti-interference processed signal is input by a capacitor C22, pulse-shaped by a triode Q3, and integrated by a resistor R6 and an integrating capacitor C21 to generate a time-width high-low level, so as to output to the MCU for integrated signal width detection.
Preferably, the power supply voltage of the second power supply terminal is 5V.
Preferably, the pulse shaping circuit comprises a triode Q5, a resistor R22, a current-limiting resistor R23, a protection diode D4 and a protection resistor R25;
after being connected in parallel, the protective diode D4 and the protective resistor R25 are connected with one end of the protective diode D4 and the base electrode of the triode Q5, and the other end of the protective diode D8932 is grounded and is also connected with the ground emitter of the triode Q5;
the base electrode of the triode Q5 is also connected with the signal processing circuit through a current-limiting resistor R23, and the collector electrode of the triode Q5 is also connected with the MCU while being connected with a second power supply end through a resistor R22.
In specific implementation, as shown in fig. 6, a signal is input into the pulse shaping circuit through the capacitor C22, and after pulse shaping is performed by the transistor Q5, a pulse with the same frequency as the ultrasonic radar echo signal is output, and the pulse frequency and the number of pulses are detected by the MCU.
In summary, the frequency-selecting anti-interference reverse radar circuit provided by the utility model pre-amplifies and frequency-selects the ultrasonic radar echo signal through the frequency-selecting amplifying circuit and the signal processing circuit, and then filters out other interference signals, so as to avoid false detection caused by interference of other signals. In addition, whether the received radar echo signal has the same frequency as the transmitting signal or not is confirmed again through the arranged pulse shaping circuit, so that the driving safety of the vehicle is guaranteed.
The utility model also provides a reversing radar device which adopts the frequency-selecting anti-interference reversing radar circuit.
The reversing radar device adopting the circuit can improve the anti-interference performance of the radar, avoids the problem of false alarm, is suitable for various vehicle types, and has wide application range.
In addition, it will be appreciated by those skilled in the art that, although there may be many problems with the prior art, each embodiment or aspect of the present invention may be improved only in one or several respects, without necessarily simultaneously solving all the technical problems listed in the prior art or in the background. It will be understood by those skilled in the art that nothing in a claim should be taken as a limitation on that claim.
Although terms such as frequency selective amplification circuitry, signal processing circuitry, pulse integration circuitry, pulse shaping circuitry, etc. are used more often herein, the possibility of using other terms is not excluded. These terms are used merely to more conveniently describe and explain the nature of the present invention; they are to be construed as being without limitation to any additional limitations that may be imposed by the spirit of the present invention; the terms "first," "second," and the like in the description and in the claims, and in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the utility model has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. The utility model provides a frequency-selecting anti-interference reversing radar circuit which characterized in that: the pulse shaping circuit comprises a frequency-selecting amplifying circuit, a signal processing circuit, a pulse integrating circuit and a pulse shaping circuit, wherein:
the input end of the frequency-selective amplifying circuit receives an echo signal of the ultrasonic radar probe, and the output end of the frequency-selective amplifying circuit is coupled with the input end of the signal processing circuit and is used for amplifying and carrying out anti-interference processing on the signal; the output end of the signal processing circuit is respectively coupled with the pulse integrating circuit and the pulse shaping circuit, the pulse integrating circuit is used for integrating signals and outputting the signals to the MCU for integral signal width detection, and the pulse shaping circuit is used for shaping the signals and outputting the signals to the MCU for pulse frequency and pulse number detection.
2. The frequency-selective anti-jamming reversing radar circuit of claim 1, characterized in that: the frequency-selecting amplifying circuit comprises a coupling capacitor C18, a triode Q2, a middle period T1, a resonant capacitor C13, a load resistor R13, a biasing resistor R8, a biasing resistor R10, a biasing resistor R12, a decoupling capacitor C23, a decoupling capacitor C24, a limiting diode D3, a biasing circuit and a decoupling filter circuit;
after the load resistor R13, the decoupling capacitor C23 and the decoupling capacitor C24 are connected in parallel, one end of the load resistor R is grounded, and the other end of the load resistor R is connected with an emitting electrode of the triode Q2; the base electrode of the triode Q2 is connected with the input ends of the coupling capacitor C18 and the frequency-selecting amplifying circuit through a biasing resistor R10, and is also connected with the decoupling filter circuit through a biasing resistor R8 and is grounded through a biasing resistor R12; the input end of the frequency-selecting amplifying circuit is also grounded through a limiting diode D3 which is connected in parallel in two directions; the collector of the triode Q2 is connected with the sixth pin of the middle period T1; one end of a fourth pin of the middle period T1 is connected with a sixth pin through a resonant capacitor C13, and is also connected with a decoupling filter circuit, and the decoupling filter circuit is connected with a first power supply end; the first pin of the middle period T1 is grounded, and the second pin is connected with the signal processing circuit.
3. The frequency-selective anti-jamming reversing radar circuit of claim 2, wherein: the decoupling filter circuit comprises a capacitor C14, a resistor R4 and a capacitor C8; one end of the capacitor C14 is connected with the fourth pin of the middle period T1, and the other end is grounded; one end of the capacitor C8 is connected to the fourth pin of the middle T1 through the resistor R4, and the other end is grounded.
4. The frequency-selective anti-jamming reversing radar circuit of claim 1, characterized in that: the signal processing circuit comprises an operational amplifier U3A, an operational amplifier U3B, an amplification factor adjusting circuit, a coupling capacitor C16, a first voltage division biasing circuit, a second voltage division biasing circuit and a filter circuit;
the sixth pin of the operational amplifier U3B is connected to the output terminal of the operational amplifier U3B and the coupling capacitor C16 through an amplification factor adjusting circuit, and the coupling capacitor C16 is connected to the output terminal of the frequency-selective amplifying circuit; a fifth pin of the operational amplifier U3B is connected with a first voltage division bias circuit; the seventh pin of the operational amplifier U3B is connected with the second pin of the operational amplifier U3A;
a third pin of the operational amplifier U3A is connected with a second pin thereof through a second voltage division bias circuit; an eighth pin of the operational amplifier U3A is connected with the first voltage division biasing circuit and is also connected with a first power supply end through a filter circuit; the fourth pin of the operational amplifier U3A is grounded, and the first pin is respectively connected with the pulse integrating circuit and the pulse shaping circuit.
5. The frequency-selective anti-jamming reversing radar circuit of claim 4, wherein: the amplification factor adjusting circuit comprises an adjustable resistor VR1, a resistor R5, a resistor R7 and a vibration eliminating capacitor C12;
after the adjustable resistor VR1 is connected in parallel with the resistor R7, one end of the adjustable resistor VR1 is connected with the coupling capacitor C16, and the other end of the adjustable resistor VR 3878 is connected with the seventh pin of the operational amplifier U3B through the resistor R5 and the vibration-damping capacitor C12 which are connected in parallel.
6. The frequency-selective anti-jamming reversing radar circuit of claim 4, wherein: the first voltage division biasing circuit comprises a biasing resistor R15, a voltage division resistor R17, a voltage division resistor R19 and a decoupling capacitor C30; one end of the bias resistor R15 is connected with the fifth pin of the operational amplifier U3B; the other end of the voltage divider is grounded through a voltage dividing resistor R19 and a decoupling capacitor C30 which are connected in parallel, and is connected with the filter circuit through a voltage dividing resistor R17.
7. The frequency-selective anti-jamming reversing radar circuit of claim 4, wherein: the second voltage division biasing circuit comprises a biasing resistor R14, a voltage division resistor R18 and a decoupling capacitor C28; one end of the bias resistor R14 is connected with the second pin of the operational amplifier U3A; the other end of the voltage divider is grounded through a voltage divider resistor R18 and a decoupling capacitor C28 which are connected in parallel, and is also connected with a third pin of the operational amplifier U3B.
8. The frequency-selective anti-jamming reversing radar circuit of claim 1, wherein: the pulse integration circuit comprises a triode Q3, an integration capacitor C21, a current-limiting resistor R11, a protection diode D2, a protection resistor R16, a capacitor C22 and a resistor R6;
after being connected in parallel, the protective diode D2 and the protective resistor R16 are connected with one end of the protective diode D2 and the base electrode of the triode Q3, and the other end of the protective diode D8932 is grounded and is also connected with the emitting electrode of the triode Q3;
the base electrode of the triode Q3 is connected with the signal processing circuit through a current-limiting resistor R11 and a capacitor C22; the emitter of the transistor Q3 is connected with the collector of the transistor Q3 through an integrating capacitor C21; the collector of the transistor Q3 is connected to the second power supply terminal via a resistor R6 and also to the MCU.
9. The frequency-selective anti-jamming reversing radar circuit of claim 1, wherein: the pulse shaping circuit comprises a triode Q5, a resistor R22, a current-limiting resistor R23, a protection diode D4 and a protection resistor R25;
after being connected in parallel, the protective diode D4 and the protective resistor R25 are connected with one end of the protective diode D4 and the base electrode of the triode Q5, and the other end of the protective diode D8932 is grounded and is also connected with the ground emitter of the triode Q5;
the base electrode of the triode Q5 is also connected with the signal processing circuit through a current-limiting resistor R23, and the collector electrode of the triode Q5 is also connected with the MCU while being connected with a second power supply end through a resistor R22.
10. A reversing radar device is characterized in that: a frequency-selective anti-jamming reversing radar circuit according to any one of claims 1 to 9.
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| CN202122964076.4U CN216870807U (en) | 2021-11-29 | 2021-11-29 | Frequency-selecting anti-interference reversing radar circuit and reversing radar device |
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| CN202122964076.4U CN216870807U (en) | 2021-11-29 | 2021-11-29 | Frequency-selecting anti-interference reversing radar circuit and reversing radar device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN118311517A (en) * | 2024-06-11 | 2024-07-09 | 长城汽车股份有限公司 | Alarm state determining method, device, vehicle and storage medium |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN118311517A (en) * | 2024-06-11 | 2024-07-09 | 长城汽车股份有限公司 | Alarm state determining method, device, vehicle and storage medium |
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