CN216849847U

CN216849847U - Wafer scanning system

Info

Publication number: CN216849847U
Application number: CN202220325022.5U
Authority: CN
Inventors: 缪燕; 丁欣
Original assignee: Shanghai Aiyan Semiconductor Co ltd
Current assignee: Shanghai Aiyan Semiconductor Co ltd
Priority date: 2022-02-17
Filing date: 2022-02-17
Publication date: 2022-06-28
Anticipated expiration: 2032-02-17

Abstract

The utility model relates to a semiconductor manufacturing technical field generally, provides a wafer scanning system. The system comprises: a wafer cassette for loading wafers; a load lock housing the wafer cassette, the load lock having a load lock opening; and first and second scanning devices disposed above and below the load lock opening, the first and second scanning devices scanning and probing the wafers in the cassette.

Description

Wafer scanning system

Technical Field

The utility model relates to a semiconductor manufacturing technology field generally. Particularly, the utility model relates to a wafer scanning system.

Background

In semiconductor manufacturing, wafers are typically loaded and transported using a cassette. On a semiconductor processing machine, a wafer cassette loaded with wafers is transferred to a Load lock (Load lock).

The wafers are purged with gas in the loadlock, and multiple cycles of blowing and venting are typically performed during the purging to ensure wafer cleanliness, reduce wafer surface graininess, and inhibit wafer surface natural oxidation.

The wafer scanning device scans (wafer mapping) the wafer to determine the number and the position of the wafers in the wafer box while the wafer is being purged. During scanning of wafers, the cassette typically needs to move up and down within the load lock. The stroke of the cassette during scanning, i.e. the distance between the lowest position to which the bottom of the cassette moves and the highest position to which the top of the cassette moves during scanning, determines the height of the cavity of the load lock that needs to be configured. However, in the prior art, due to the arrangement of the wafer scanning device, etc., the travel of the wafer cassette during the scanning process is long, which increases the required volume of the load lock.

SUMMERY OF THE UTILITY MODEL

For at least partially solving the above-mentioned problem in the prior art, the utility model provides a wafer scanning system, include:

a wafer cassette which loads wafers;

a load lock to receive the wafer cassette, the load lock having a load lock opening; and

first and second scanning devices disposed above and below the load lock opening, the first and second scanning devices scanning and probing wafers in the cassette.

It is provided in an embodiment of the present invention that the wafer scanning system includes:

a transfer chamber connected with the load lock.

and the mechanical arm is arranged in the conveying cavity and extends into the loading lock through the loading lock opening to take and place the wafer.

In an embodiment of the present invention, it is provided that the wafer scanning system further includes:

and the data analysis and processing system is connected with the scanning device and the mechanical arm, the scanning device scans and detects the position information of the wafer and sends the position information to the data analysis and processing system, and the data analysis and processing system controls the mechanical arm to take and place the wafer according to the position information.

and the display interface is connected with the data analysis and processing system and displays the position of the wafer according to the position information.

a purge device coupled to the load lock, the purge device generating a purge gas;

a gas inlet and a gas outlet disposed on the load lock, the purge gas entering the load lock through the gas inlet and exiting through the gas outlet to purge the wafer.

a load table disposed in the load lock, the load table carrying the wafer cassette for movement within the load lock.

In one embodiment of the invention, it is provided that the first and second scanning device are arranged outside the load lock.

In one embodiment of the present invention, it is provided that the first scanning device is disposed at a position spaced apart from SD1 at the lower portion of the load lock opening, and the second scanning device is disposed at a position spaced apart from SD2 at the upper portion of the load lock opening, and all wafers in the wafer cassette are detected by the first scanning device and the second scanning device.

In one embodiment of the present invention, it is provided that the first scanning device is used for detecting a plurality of wafers from a first bottommost wafer to a wafer at a middle position in the wafer box, and the second scanning device is used for detecting a plurality of wafers from a first topmost wafer to a wafer at a middle position in the wafer box. The utility model discloses following beneficial effect has at least: compared with the prior art, the volume of the loading lock can be obviously reduced, and the reduction of the volume of the loading lock can reduce the gas usage amount of the wafer box purging each time, thereby saving the cost; on the other hand, the speed of the purge gas can be reduced, so that the granularity of the surface of the wafer can be reduced, and the natural oxidation of the surface of the wafer can be inhibited.

Drawings

To further clarify the advantages and features that are present in various embodiments of the present invention, a more particular description of various embodiments of the invention will be rendered by reference to the appended drawings. It is appreciated that these drawings depict only typical embodiments of the invention and are therefore not to be considered limiting of its scope. In the drawings, the same or corresponding parts will be denoted by the same or similar reference numerals for clarity.

Fig. 1 shows a schematic diagram of a wafer scanning system.

Fig. 2 shows a schematic diagram of a wafer cassette in an embodiment of the present invention.

Fig. 3 shows a schematic view of a scanning process of a wafer scanning system.

Fig. 4 is a schematic diagram of a wafer scanning system according to an embodiment of the present invention.

Fig. 5 is a schematic diagram illustrating a scanning process of the wafer scanning system according to an embodiment of the present invention.

Fig. 6 is a schematic diagram of a wafer scanning control system according to an embodiment of the present invention.

Detailed Description

It should be noted that the components in the figures may be exaggerated and not necessarily to scale for illustrative purposes. In the figures, identical or functionally identical components are provided with the same reference symbols.

In the present invention, unless otherwise specified, "disposed on …", "disposed over …" and "disposed over …" do not exclude the presence of an intermediate therebetween. Further, "disposed on or above …" merely indicates the relative positional relationship between two components, and may also be converted to "disposed below or below …" and vice versa in certain cases, such as after reversing the product direction.

In the present invention, the embodiments are only intended to illustrate the aspects of the present invention, and should not be construed as limiting.

In the present application, the terms "a" and "an" do not exclude the presence of a plurality of elements, unless otherwise indicated.

It is further noted herein that in embodiments of the present invention, only a portion of the components or assemblies may be shown for clarity and simplicity, but those skilled in the art will appreciate that the components or assemblies may be added as needed for specific scenarios, given the teachings of the present invention. Furthermore, features in different embodiments of the invention may be combined with each other, unless otherwise specified. For example, a feature of the second embodiment may be substituted for a corresponding or functionally equivalent or similar feature of the first embodiment, and the resulting embodiments are likewise within the scope of the disclosure or recitation of the present application.

It is also to be noted that, within the scope of the present invention, the expressions "identical", "equal", etc., do not mean that the two values are absolutely equal, but allow a certain reasonable error, that is, the expressions also cover "substantially identical", "substantially equal". By analogy, in the present disclosure, the terms "perpendicular to", "parallel to", and the like in the table direction also cover the meaning of "substantially perpendicular to", "substantially parallel to".

In addition, the numbering of the steps of the methods of the present invention does not limit the order of execution of the steps of the methods. Unless specifically stated, the method steps may be performed in a different order.

The invention will be further elucidated with reference to the drawings in conjunction with the detailed description.

The pods are typically stored in a Standard Mechanical Interface (SMIF) or a Front Opening Unified Pod (FOUP). In a semiconductor processing machine, a wafer cassette loaded with wafers is transferred to a Load lock (Load lock).

Fig. 1 shows a schematic diagram of a wafer scanning system. As shown in fig. 1, the system may include a load lock 101, a cassette 102, a scanning device 103, a robot arm 104, a gas inlet 105, a gas outlet 106, a load station 107, and a transfer chamber 108.

Fig. 2 shows a schematic view of a wafer cassette in an embodiment of the invention. As shown in fig. 2, the cassette 102 may be disposed on the loading table 107 within the load lock 101. The loading table 107 carries the wafer cassette 102. A plurality of wafers 201 may be loaded in the cassette 102. For example, the wafer capacity in the wafer cassette 102 may be 25, that is, in this embodiment, a maximum of 25 wafers 201 may be loaded in the wafer cassette 102.

The system further comprises a purge device connected to the load lock 101, the purge device generating a purge gas. The wafers 201 within the cassette 102 may be purged in the load lock 101 with a purge gas, which enters through the inlet port 105 and exits through the outlet port 106. Multiple cycles of blowing and evacuating are typically performed during purging to ensure cleanliness of the wafer 201, to reduce the particle size of the wafer 201 surface, and to prevent natural oxidation of the wafer 201 surface.

The wafer 201 is also scanned (wafer mapping) by the scanning device 103 while the wafer 201 is being purged to determine the number and position of the wafers 201 in the cassette 102. During the scanning of the wafer 201, the wafer cassette 102 is carried by the loading table 107 and moved up and down in the load lock 101.

The load lock 101 is provided with a load lock opening 1011, and after the wafer 201 is scanned, the robot 104 in the transfer chamber 108 takes and places the wafer from the wafer cassette 102 through the load lock opening 1011. The load lock 101 and the transfer chamber 108 each have a vacuum level.

The scanning device 103 may be arranged outside the load lock 101. The scanning device 103 is arranged at a different height than the load lock opening 1011. As the cassette 102 moves up and down in the load lock 101, the scanner 103 detects the wafer 201 in a horizontal direction.

During the construction of the load lock 101, the height of the load lock 101 needs to be greater than the stroke of the cassette 102 during scanning. Here, the term "stroke" refers to a distance between a lowermost position to which the bottom of the cassette 102 moves and an uppermost position to which the top of the cassette 102 moves during scanning.

Fig. 3 is a schematic diagram of a scanning process of a wafer scanning system, wherein the wafer scanning system shown in fig. 1 is taken as an example to illustrate the travel of the wafer cassette 102 during the scanning process. For example, assuming that 25 wafers 201 can be loaded in the cassette 102, the 25 positions for placing the wafers 201 are denoted as s1 to s25 from bottom to top in the cassette 102. It should be understood by those skilled in the art that other embodiments of the present invention may load other numbers of wafers into the pod 102.

As shown in fig. 3, when the bottom of the cassette 102 moves to the lowest position, the cassette 102 is at the first position 301, and the scanning device 103 can detect the s25 position, i.e., the wafer 201 at the top of the cassette 102.

The cassette 102 moves with the susceptor 107 to a second position 302, where the robot 104 may access the wafer 201 at the position s25 at the second position 302.

The cassette 102 is moved with the susceptor 107 to a third position 303, where the scanning device 103 can detect the wafer 201 at the s1 position, i.e., at the bottom of the cassette 102, at the third position 303.

The cassette 102 moves with the susceptor 107 to a fourth position 304, where the robot 104 may pick and place the wafer 201 at position s1, with the top of the cassette 102 moving to the uppermost position at the fourth position 304.

As shown in fig. 3, during the scanning process of the wafer scanning system, the stroke L of the wafer cassette 102 can be expressed as follows:

L＝H1-h12+SD1+H2+H1-h11＝2H1+H2+SD1-(h11+h12)

where H1 represents the height of the pod 102, H11 represents the distance between the wafer 201 at the s1 position and the bottom of the pod 102, H12 represents the distance between the wafer 201 at the s25 position and the top of the pod 102, H2 represents the height difference between the robot 104 when picking and placing the wafer 201 and the lower portion of the load lock opening 1011, and SD1 represents the height difference between the scanning device 103 and the lower portion of the load lock opening 1011. Since (H11+ H12) is much smaller than H1, the stroke L of the wafer pod 102 is expressed as follows, ignoring the length of H11+ H12:

L＝2H1+H2+SD1

thus, in constructing the load lock 101, the height of the load lock 101 needs to be greater than 2H1+ H2+ SD 1.

Fig. 4 is a schematic diagram of a wafer scanning system according to an embodiment of the present invention. As shown in fig. 4, the system may include a load lock 401, a cassette 402, a first scanning apparatus 4031, a second scanning apparatus 4032, a robot arm 404, a gas inlet 405, a gas outlet 406, a load station 407, and a transfer chamber 408. In contrast to the wafer scanning system of fig. 3, the first scanning device 4031 and the second scanning device 4032 are provided in this embodiment to scan a wafer.

The load lock 401 is provided with a load lock opening 4011, and the first and

second scanning apparatuses

4031 and 4032 may be disposed outside the load lock and may be respectively disposed below and above the load lock opening 4011 so as to be staggered from the height of the load lock opening 4011. For example, the first scanning device 4031 is disposed below the load lock opening 4011 a distance SD 1. The second scanning device 4032 is positioned above the load lock opening 4011 a distance SD 2. It is necessary to probe all wafers in the wafer cassette by the first scanning apparatus 4031 and the second scanning apparatus 4032, so the first scanning apparatus 4031 is used to probe the nth wafer from the first wafer at the bottommost position to the middle position, and the second scanning apparatus 4032 is used to probe the (N + 1) th wafer from the middle position to the topmost wafer. Alternatively, the detection ranges of the first scanning device 4031 and the second scanning device 4032 may partially overlap, and a plurality of wafers at a certain middle position may be detected by the first scanning device or the second scanning device. Still taking the example of 25 wafers 201 loaded in the wafer cassette 402, the wafers 201 at the positions s1 to s13 can be detected by the first scanning apparatus 4031, and the wafers 201 at the positions s14 to s25 can be detected by the second scanning apparatus 4032.

Fig. 5 is a schematic diagram illustrating a scanning process of the wafer scanning system according to an embodiment of the present invention, wherein the wafer scanning system shown in fig. 4 is taken as an example to illustrate the stroke of the wafer box 402 during the scanning process.

As shown in fig. 5, when the bottom of the wafer box 402 moves to the lowest position, the wafer box 402 is located at a first position 501. The first scanning apparatus 4031 may be configured to detect a wafer 201 at an intermediate location in the wafer cassette 402. For example, in this embodiment, the first scanning device 4031 probes the wafer 201 at the 813 position. In other embodiments, the first scanning apparatus 4031 may probe the wafer 201 at any other location. In the first position 501, the tallest wafer in the cassette 402 should be no higher than the height of the robot 404.

The wafer pod 402 is in the second position 502. At this point, the robot arm 404 may pick and place the wafer 201 at the uppermost position, such as the wafer 201 at the s25 position. The second position 502 is higher than the first position 501 in this embodiment. In other embodiments, the second position 502 may coincide with the first position 501.

The pod 402 moves with the stage 407 to a third position 503. in the third position 503, the first scanning apparatus 4031 may detect the wafer 201 at the bottom s1 of the pod.

The cassette 402 moves with the stage 407 to a fourth position 504, where the second scanning apparatus 4032 may detect the wafer 201 at the topmost (e.g., s25) position of the cassette in the fourth position 504.

The cassette 402 moves with the stage 407 to a fifth position 505. in the fifth position 505, the second scanning apparatus 4032 can detect the wafer 201 at the position s 14.

The cassette 402 moves with the susceptor 407 to a sixth position 506, where the robot 404 may pick and place the wafer 201 at the bottom s1 of the cassette at the sixth position 506, where the top of the cassette 402 moves to the highest position.

As shown in fig. 5, during the scanning process of the wafer scanning system in this embodiment, the stroke L of the wafer cassette 402 can be expressed as follows:

L＝H1-h11+H2+SD1+H11

where H1 represents the height of the cassette 402, H2 represents the height difference between the robot arm 404 when it is picking and placing the wafer 201 and the lower portion of the load lock opening 4011, SD1 represents the height difference between the scanner 4031 and the lower portion of the load lock opening 4011, and H11 represents the distance between the wafer 201 at the s1 position and the bottom of the cassette 402. Similarly, H11 is negligible since it is much smaller than H1. H11 is the distance from the first scanning device to the bottom of the wafer cassette at the lowest position, and corresponds to half of the total height H1. The stroke L of the wafer cassette 402 can be expressed as follows:

L＝1.5H1+H2+SD1

in constructing the load lock 401, the height of the load lock 401 needs to be greater than 1.5H1+ H2+ SD 1. It can be seen that compared to the wafer scanning system shown in fig. 1, the wafer scanning system in this embodiment can shorten the stroke of the cassette by 0.5H1 during the process of scanning and picking up and placing the wafer, which enables the height of the cassette to be shortened by half, typically by about 100mm, during the process of constructing the load lock, and the volume of the corresponding load lock is also reduced by about 1/3.

The relative positions of the cassette 402, the first scanning apparatus 4031, the second scanning apparatus 4032 and the load lock opening are described above in connection with the embodiments of fig. 4 and 5. Those skilled in the art will appreciate that the specific data described above are merely illustrative and not limiting. One skilled in the art can set or adjust the positions of the first and

second scanning apparatuses

4031 and 4032 according to the actual number of wafer cassettes to be loaded.

Compared with the prior art, the volume of the load lock of the wafer scanning system in the embodiment can be obviously reduced, and on one hand, the reduction of the volume of the load lock can reduce the gas usage amount of the wafer box purging every time, thereby saving the cost; on the other hand, the speed of the purge gas can be reduced, so that the granularity of the surface of the wafer can be reduced, and the natural oxidation of the surface of the wafer can be inhibited.

Fig. 6 shows a schematic diagram of a wafer scanning control system according to an embodiment of the present invention, as shown in fig. 6, the wafer scanning control system may include a scanning device 601, a data analysis and processing system 602, a robot 603, and a display interface 604. Wherein the data analysis and processing system 602 is coupled to the scanning device 601, the robotic arm 603, and the display interface 604. The scanning device 601 scans and sends information obtained by scanning to the data analysis and processing system 602, the data analysis and processing system 602 may determine whether there is a wafer at the scanned position according to the information, and display the position of the wafer through the display interface 604, and in addition, the data analysis and processing system 602 may also send an instruction to the robot 603 to pick and place the wafer.

While various embodiments of the present invention have been described above, it should be understood that they have been presented by way of example only, and not limitation. It will be apparent to persons skilled in the relevant art that various combinations, modifications, and changes can be made thereto without departing from the spirit and scope of the invention. Thus, the breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

1. A wafer scanning system, comprising:

a wafer cassette which loads wafers;

first and second scanning devices disposed above and below the load lock opening, the first and second scanning devices scanning wafers in the cassette.

2. The wafer scanning system of claim 1, comprising:

a transfer chamber connected with the load lock.

3. The wafer scanning system of claim 2, comprising:

4. The wafer scanning system of claim 3, further comprising:

the data analysis and processing system is connected with the scanning device and the mechanical arm, the scanning device scans and detects the position information of the wafer and sends the position information to the data analysis and processing system, and the data analysis and processing system controls the mechanical arm to take and place the wafer according to the position information.

5. The wafer scanning system of claim 4, further comprising:

6. The wafer scanning system of claim 1, comprising:

a purge device connected to the load lock, the purge device generating a purge gas;

7. The wafer scanning system of claim 1, comprising:

8. The wafer scanning system of claim 1, wherein the first and second scanning devices are disposed outside of the load lock.

9. The wafer scanning system of claim 1, wherein the first scanning device is positioned a distance SD1 below the load lock opening and the second scanning device is positioned a distance SD2 above the load lock opening, and all wafers in the cassette are probed by the first and second scanning devices.

10. The wafer scanning system of claim 9, wherein the first scanning device is configured to detect a plurality of wafers in the cassette from a first bottom-most wafer to a wafer at a middle position, and the second scanning device is configured to detect a plurality of wafers in the cassette from a top-most wafer to a wafer at a middle position.