CN216817398U

CN216817398U - Communication conversion circuit and communication debugging line

Info

Publication number: CN216817398U
Application number: CN202220620390.2U
Authority: CN
Inventors: 张旭俊; 陈广哲; 胡浪涛; 高平; 王兴利; 潘礼云
Original assignee: Zhejiang Tengen Electric Co Ltd
Current assignee: Zhejiang Tengen Electric Co Ltd
Priority date: 2022-03-21
Filing date: 2022-03-21
Publication date: 2022-06-24
Anticipated expiration: 2032-03-21

Abstract

The utility model provides a communication conversion circuit and a communication debugging line, and relates to the technical field of communication. The communication conversion circuit comprises a first conversion circuit, a second conversion circuit and a booster circuit; a first interface of the first conversion circuit is used for connecting the first terminal, a second interface of the first conversion circuit is electrically connected with a third interface of the second conversion circuit, and a fourth interface of the second conversion circuit is used for connecting the second terminal; the first interface is an OTG interface, the second interface and the third interface are USB interfaces, and the fourth interface is a serial port communication interface; one end of the booster circuit is electrically connected with the first conversion circuit, and the other end of the booster circuit is electrically connected with the second conversion circuit. Through the arrangement of the two-stage conversion circuit and the booster circuit, the circuit breaker equipment can be connected with any terminal equipment for function debugging through the communication conversion circuit, and therefore the debugging efficiency of the circuit breaker equipment is improved.

Description

Communication conversion circuit and communication debugging line

Technical Field

The utility model relates to the technical field of communication, in particular to a communication conversion circuit and a communication debugging line.

Background

The existing basic electronic molded case circuit breaker product does not have a display screen, and the state information of the normal operation of the product can only be simply indicated by an indicator light, so that inconvenience is caused in use, and data debugging is required to be carried out on the circuit breaker product by debugging equipment; some manufacturers design special handheld devices for local debugging of electronic molded case circuit breaker products, but the special devices are often complex, and have different interfaces aiming at terminal devices with different interfaces, so that the interfaces cannot be unified and fused.

SUMMERY OF THE UTILITY MODEL

In order to solve the above technical problems, an object of the present invention is to provide a communication conversion circuit and a communication debug line, and the specific scheme is as follows:

in a first aspect, an embodiment of the present application provides a communication conversion circuit, where the communication conversion circuit is configured to implement communication conversion between a first terminal and a second terminal, and the communication conversion circuit includes a first conversion circuit, a second conversion circuit, and a voltage boost circuit;

a first interface of the first conversion circuit is used for connecting the first terminal, a second interface of the first conversion circuit is electrically connected with a third interface of the second conversion circuit, and a fourth interface of the second conversion circuit is used for connecting the second terminal;

the first interface is an OTG interface, the second interface and the third interface are USB interfaces, and the fourth interface is a serial port communication interface;

one end of the booster circuit is electrically connected with the first conversion circuit, and the other end of the booster circuit is electrically connected with the second conversion circuit.

According to a specific implementation manner of the embodiment of the present application, the first conversion circuit includes the OTG interface, a first USB interface, a power switch unit, and an isolation optocoupler;

the OTG interface is used for connecting the first terminal, and the first USB interface is electrically connected with a third interface of the second conversion circuit;

the OTG interface is electrically connected with the first USB interface through the isolation optocoupler;

the voltage signal input end of the power switch unit and the second voltage input end of the isolation optocoupler are both used for being connected with the power voltage of the first terminal, and the voltage signal output end of the power switch unit is electrically connected with the first voltage input end of the isolation optocoupler.

According to a specific implementation manner of the embodiment of the present application, the power switch unit includes a power chip, a first filtering branch and a second filtering branch;

the voltage signal input end of the power supply chip is used for accessing the power supply voltage of the first terminal, and the first filtering branch circuit is electrically connected with the voltage signal input end of the power supply chip;

the voltage signal output end of the power supply chip is electrically connected with the first voltage input end of the isolation couple, and the first filtering branch is electrically connected with the voltage signal output end of the power supply chip.

According to a specific implementation manner of the embodiment of the present application, the second conversion circuit includes a second USB interface, a conversion chip, and the serial communication interface;

the second USB interface is electrically connected with the second interface of the first conversion circuit, and the second USB interface is electrically connected with the USB signal end of the conversion chip;

the serial port communication interface is electrically connected with a serial port signal end of the conversion chip.

According to a specific implementation manner of the embodiment of the present application, the model of the conversion chip is CH 340.

According to a specific implementation manner of the embodiment of the application, the boost circuit comprises a DC-DC conversion chip, a field effect transistor, a switch, a first resistor, a second resistor and a voltage signal interface;

the signal receiving end of the DC-DC conversion chip is used for accessing power supply voltage;

a first output pin of the DC-DC conversion chip is electrically connected with a grid electrode of the field effect tube, a second output pin of the DC-DC conversion chip is electrically connected with a source electrode of the field effect tube, and a third output pin of the DC-DC conversion chip is electrically connected with one end of the switch;

the other end of the switch is used for being electrically connected with the voltage signal interface through the first resistor or the second resistor;

the voltage signal interface is used for receiving the boosted voltage output by the DC-DC conversion chip.

According to a specific implementation manner of the embodiment of the present application, when the other end of the switch is electrically connected to the voltage signal interface through the first resistor, the voltage signal interface receives a first voltage output by the DC-DC conversion chip;

the other end of the switch is used for receiving a second voltage output by the DC-DC conversion chip when the voltage signal interface is electrically connected with the second resistor through the second resistor, wherein the first voltage is larger than the second voltage.

According to a specific implementation manner of the embodiment of the present application, the drain of the field effect transistor is electrically connected to the voltage signal interface through a diode, wherein an anode of the diode is electrically connected to the drain of the field effect transistor, and a cathode of the diode is electrically connected to the voltage signal interface.

According to a specific implementation manner of the embodiment of the present application, the boost circuit further includes a filter circuit, and the filter circuit includes a first capacitor and a second capacitor connected in parallel, where a capacitance value of the first capacitor is greater than a capacitance value of the second capacitor;

one end of the filter circuit is electrically connected with the voltage signal interface, and the other end of the filter circuit is grounded.

In a second aspect, an embodiment of the present application provides a communication debug line, where the communication debug line includes the communication conversion circuit described in any implementation manner of the first aspect and the first aspect.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.

Fig. 1 is a schematic circuit block diagram of a communication conversion circuit according to an embodiment of the present invention;

fig. 2 is a schematic circuit structure diagram of a first conversion circuit of a communication conversion circuit according to an embodiment of the present invention;

fig. 3 is a schematic circuit structure diagram of a second conversion circuit of the communication conversion circuit according to an embodiment of the present invention;

fig. 4 is a schematic circuit structure diagram of a boost circuit of a communication conversion circuit according to an embodiment of the present invention.

Icon: communication conversion circuit-100; a first conversion circuit-110; a second conversion circuit-120; a boost circuit-130;

a first terminal-200; a second terminal-300.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the utility model, as claimed, but is merely representative of selected embodiments of the utility model. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.

In the description of the present invention, it is to be understood that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like, indicate orientations or positional relationships that are based on the orientations or positional relationships shown in the drawings, or the orientations or positional relationships that the products of the present invention conventionally put into use, or the orientations or positional relationships that are conventionally understood by those skilled in the art, and are used merely for convenience of describing the present invention and simplifying the description, but do not indicate or imply that the equipment or elements referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.

Furthermore, the terms "first," "second," "third," and the like are used solely to distinguish one from another and are not to be construed as indicating or implying relative importance.

In the description of the present invention, it should also be noted that, unless otherwise explicitly specified or limited, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly and may, for example, be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.

Referring to fig. 1, the present embodiment provides a communication conversion circuit 100, where the communication conversion circuit 100 is used to implement communication conversion between a first terminal 200 and a second terminal 300, as shown in fig. 1, the communication conversion circuit 100 includes a first conversion circuit 110, a second conversion circuit 120, and a voltage boost circuit 130;

a first interface of the first converting circuit 110 is configured to be connected to the first terminal 200, a second interface of the first converting circuit 110 is electrically connected to a third interface of the second converting circuit 120, and a fourth interface of the second converting circuit 120 is configured to be connected to the second terminal 300;

one end of the voltage boosting circuit 130 is electrically connected to the first conversion circuit 110, and the other end of the voltage boosting circuit 130 is electrically connected to the second conversion circuit 120.

In a specific implementation, the first terminal 200 may be a mobile terminal, a computer, or other terminal equipment capable of running a circuit breaker control program.

The second terminal 300 is an electronic molded case circuit breaker device.

The communication switching circuit 100 is a signal control circuit disposed in a communication debugging line for connecting the first terminal 200 and the second terminal 300, and the communication switching circuit 100 is configured to implement signal switching between the first terminal 200 and the second terminal 300, so that the function of the second terminal 300 can be controlled and debugged through the first terminal 200.

Specifically, the first interface of the first conversion circuit 110 is an OTG interface, and the OTG interface may be any one of OTG interfaces such as USB2.0 OTG, Micro 5PIN OTG, Micro USB3.0 OTG, Type C OTG, or Lightning OTG.

Through the first interface, the first conversion circuit 110 may be configured to connect to a mobile terminal and receive an OTG signal sent from a mobile terminal APP.

The second interface of the first conversion circuit 110 and the third interface of the second conversion circuit 120 are both USB interfaces, and after the OTG signal is converted into a USB signal by the first conversion circuit 110, the USB signal is sent to the second conversion circuit 120 through the second interface and the third interface which are connected to each other.

The second conversion circuit 120 is configured to convert the USB signal into a serial communication signal. The fourth interface of the second conversion circuit 120 is a serial communication interface, and the fourth interface is used for connecting the control end of the circuit breaker device to send a serial signal to the circuit breaker device.

In a specific embodiment, the serial port signal of the circuit breaker device may also be converted into an OTG signal through the second conversion circuit 120 and the first conversion circuit 110, and the control data in the circuit breaker device is sent to a mobile terminal or a computer device.

In one embodiment, when the communication debug line is used to connect a computer device, the computer device may be connected only through a USB interface, so as to realize the conversion between USB signals and serial communication signals through the second conversion circuit 120. Therefore, debugging and control of the circuit breaker equipment can be realized through a computer software program.

The communication conversion circuit 100 further includes a boost circuit 130, wherein the boost circuit 130 is configured to boost a dc voltage of a USB interface of a mobile terminal or a computer device, so as to obtain a preset dc voltage that can be provided to a circuit breaker product to implement a trip function, and the trip function of the product is more convenient to test under the condition that the circuit breaker product does not increase current.

Specifically, the preset dc voltage may be 12V, or may be adaptively replaced according to an actual application scenario, which is not limited herein.

According to a specific implementation manner of the embodiment of the present application, the first conversion circuit 110 includes the OTG interface, a first USB interface, a power switch unit, and an isolation optocoupler;

the OTG interface is used for connecting the first terminal 200, and the first USB interface is electrically connected to the third interface of the second conversion circuit 120;

the voltage signal input end of the power switch unit and the second voltage input end of the isolation optocoupler are both used for being connected with the power voltage of the first terminal 200, and the voltage signal output end of the power switch unit is electrically connected with the first voltage input end of the isolation optocoupler.

In a specific implementation process, as shown in fig. 2, the first conversion circuit 110 includes an OTG interface JP1, a first USB interface JP2, a power switch unit U1, and an isolation optocoupler U2.

Specifically, the isolating optocoupler U2 may be of type IL 821.

The isolation optocoupler U2 is used for isolating a voltage signal of an OTG signal at the OTG interface and a voltage signal of a USB signal at the first USB interface.

After the first terminal 200 is connected through the first USB interface JP1, the power voltage signal sent by the first terminal 200 may be received through the first pin of the first USB interface JP1, and the power voltage signal is respectively input to the voltage signal input terminal of the power switch unit and the second voltage input terminal VDD2 of the isolation optocoupler U2.

The voltage signal output end of the power switch unit is configured to output a preset power voltage, where the preset power voltage may be 5V, and the voltage of the preset power voltage may be determined according to the voltage of the power voltage signal of the first terminal 200 in an actual application scenario, which is not limited herein.

The voltage signal output end of the power switch unit is electrically connected with the first pin of the first USB interface JP2 to provide a voltage signal for the USB interface. The power supply signal output end of the power supply switch is also electrically connected with a first voltage input end VDD1 of the isolation optocoupler U2, and provides preset power supply voltage for the first voltage input end VDD 1.

Specifically, the isolation optocoupler U2 includes a USB portion and an OTG portion, where, as shown in fig. 1, the USB portion includes a first pin, a second pin, a third pin, and a fourth pin, where the first pin is a first voltage input terminal VDD1, the second pin is a USB signal output terminal, the third pin is a USB signal receiving terminal, and the fourth pin is grounded. The OTG part comprises a fifth pin, a sixth pin, a seventh pin and an eighth pin, wherein the fifth pin is grounded, the sixth pin is an OTG signal output end, the seventh pin is an OTG signal input end, and the eighth pin is a second voltage input end VDD 2.

the voltage signal input end of the power supply chip is used for accessing the power supply voltage of the first terminal 200, and the first filtering branch is electrically connected with the voltage signal input end of the power supply chip;

In a specific implementation process, the model of the power chip U1 may be S05S 05-1W.

Specifically, the first filtering branch includes a capacitor C1 and a capacitor C2 connected in parallel, where a capacitance value of the capacitor C1 is greater than a capacitance value of the capacitor C2, a capacitance value of the capacitor C1 is 10 μ F, and a capacitance value of the capacitor C2 is 0.1 μ F.

The second filtering branch comprises a capacitor C3 and a capacitor C4 which are connected in parallel, wherein the capacitance value of the capacitor C3 is greater than that of the capacitor C4, the capacitance value of the capacitor C3 is 100 muF, and the capacitance value of the capacitor C4 is 0.1 muF.

It should be noted that the capacitance values of the capacitor C1, the capacitor C2, the capacitor C3 and the capacitor C4 may be adaptively changed according to the actual application scenario, and are not limited in particular.

The small capacitor and the large capacitor are connected in parallel, so that the first filtering branch circuit and the second filtering branch circuit can well inhibit low-frequency to high-frequency power supply interference signals.

According to a specific implementation manner of the embodiment of the present application, the second conversion circuit 120 includes a second USB interface, a conversion chip, and the serial communication interface;

the second USB interface is electrically connected to the second interface of the first conversion circuit 110, and the second USB interface is electrically connected to the USB signal terminal of the conversion chip;

In a specific implementation, as shown in fig. 3, the second conversion circuit 120 includes a second USB interface JP3, a conversion chip U4 and a serial communication interface JP 4.

The second USB interface JP3 includes 4 pins, wherein one pin is used for receiving a preset power voltage output by the voltage signal output terminal of the power switch unit, one pin is used for outputting a USB signal, one pin is used for receiving a USB signal, and one pin is used for grounding. The pin for outputting the USB signal is a UD + pin, and the pin for receiving the USB signal is a UD-pin.

The serial communication interface JP4 includes 4 pins, wherein one pin is used for accessing a boost voltage of the DC-DC conversion chip or a preset power voltage output by a voltage signal output terminal of the power switch unit, one pin is used for receiving a serial signal, one pin is used for sending the serial signal, and one pin is used for grounding. The pin for receiving the serial port signal is an RXD pin, and the pin for sending the serial port signal is an TXD pin.

The conversion chip is used for receiving the USB signal sent by the second USB interface and converting the USB signal into a serial communication signal corresponding to the circuit breaker equipment.

In the specific implementation process, the CH340 is a switching chip of a USB bus, and realizes the function of converting USB signals into serial signals.

Specifically, interfaces such as RS232, RS485, and RS422 can be provided by adding a level conversion device to the CH 340. The conversion chip can convert the USB signal into an asynchronous serial port UART signal, an RS232 signal or an RS485 signal.

Specifically, the CH340 is externally connected with various other circuits to realize a specific implementation process of converting the USB signal into a different serial port signal, and reference may be made to any circuit connection structure for signal conversion by using the CH340 in the prior art, which is not described herein in detail.

Specifically, a power supply end of the conversion chip is connected to a preset power supply voltage output by a voltage output end of the power switch unit.

According to a specific implementation manner of the embodiment of the present application, the boost circuit 130 includes a DC-DC conversion chip, a field effect transistor, a switch, a first resistor, a second resistor, and a voltage signal interface;

In a specific implementation process, as shown in fig. 4, the power supply voltage is a preset power supply voltage output by the voltage output terminal of the power switch unit.

The model of the DC-DC conversion chip is RT9266, and specifically, the model of the DC-DC conversion chip may also be replaced by an equivalent circuit or an equivalent chip capable of performing boosting processing.

And a first output pin EXT of the DC-DC conversion chip is an output pin for driving an NMOS field effect transistor. And a second output pin LX of the DC-DC conversion chip is a switch pin. And a third output pin FB of the DC-DC conversion chip is a feedback input pin.

When the first output pin EXT outputs a high level signal, the NMOS is turned on. When the first output pin EXT outputs a low level signal, the NMOS is turned off.

When the NMOS is conducted, if the second output pin LX outputs a preset power supply voltage, the voltage signal interface receives the preset power supply voltage. When the NMOS is turned off or when the NMOS is turned on, if the second output pin LX outputs a low level signal, the voltage signal interface JP5 receives the boosted voltage sent through the switch section branch.

The switch part branch circuit comprises a third output pin FB, a switch, a first resistor and a second resistor.

After the voltage signal interface JP5 receives the boosted voltage output by the DC-DC conversion chip, the voltage signal interface is connected to the serial communication interface JP4, and is used for outputting the boosted voltage to the serial communication interface JP 4. The circuit breaker device may perform a trip function of the corresponding first terminal 200 according to the boosted voltage.

In a specific implementation process, when the other end of the control switch is connected to the first resistor R2, a current output by the third output pin FB flows to the voltage signal interface JP5 through the first resistor R2, the voltage signal interface JP5 receives the first voltage sent by the DC-DC conversion chip U3, specifically, a resistance value of the first resistor R2 may be 860K Ω, and a voltage value of the first voltage may be 12V.

When the other end of the control switch is connected to the second resistor R3, the current output by the third output pin FB flows to the voltage signal interface JP5 through the second resistor R3, the voltage signal interface JP5 receives the second voltage sent by the DC-DC conversion chip U3, specifically, the resistance value of the second resistor R3 may be 620K Ω, and the voltage value of the second voltage may be 9V.

It should be noted that the resistance values of the first resistor and the second resistor and the voltage values of the first voltage and the second voltage may be adaptively replaced according to an actual application scenario, and it is noted that the voltage value of the first voltage is greater than the voltage value of the second voltage.

In a specific embodiment, the power input terminal VDD and the chip enable terminal CE of the DC-DC conversion chip U3 are both connected to a predetermined power voltage through a resistor R1. When the power input end VDD and the chip enable end CE of the DC-DC conversion chip U3 are connected to a preset power voltage, the DC-DC conversion chip U3 is started.

Specifically, the power input end VDD and the chip enable end CE of the DC-DC conversion chip U3 are both connected in parallel with two capacitors connected in series, namely a capacitor C5 and a capacitor C6, for providing power protection.

The signal output end of the power switch unit is also electrically connected with the drain electrode of the NMOS through an inductor L1.

In a specific implementation, the fet is an N-type fet, a drain of the fet is electrically connected to the voltage signal interface JP5 through a diode D1, an anode of a diode D1 is electrically connected to a drain of the NMOS, and a cathode of a diode D1 is electrically connected to the voltage signal interface JP 5.

The diode D1 effectively prevents the current at the voltage signal interface JP5 from flowing backwards to the NMOS transistor. When the NMOS is turned on and the second output pin LX outputs a voltage signal, the voltage signal will first flow to the voltage signal interface JP5 through the diode D1.

According to a specific implementation manner of the embodiment of the present application, the boost circuit 130 further includes a filter circuit, where the filter circuit includes a first capacitor and a second capacitor connected in parallel, where a capacitance value of the first capacitor is greater than a capacitance value of the second capacitor;

In a specific implementation process, the voltage boost circuit 130 further includes a filter circuit, and the filter circuit includes a first capacitor C12 and a second capacitor C13, wherein a capacitance value of the first capacitor C12 is 100 μ F, and a capacitance value of the second capacitor C13 is 0.1 μ F.

Through the filter circuit formed by two capacitors with one large capacitor and one small capacitor, voltage signals from low frequency to high frequency can be effectively filtered, and the voltage signal interface JP5 is guaranteed to receive stable boosted voltage.

In addition, an embodiment of the present application provides a communication debug line, which includes the communication conversion circuit 100 described in the foregoing embodiment.

In summary, the present invention provides a communication conversion circuit and a communication debug line, which implement signal isolation between an OTG interface and a USB interface in a first conversion circuit by an isolation optocoupler, and implement switching between an OTG electrical signal and a USB electrical signal. The conversion of the USB electrical signal and the serial communication signal in the second conversion circuit is realized through the conversion chip CH340, so that the circuit breaker device is connected to any mobile terminal or computer device through the communication conversion circuit. Through the setting of the booster circuit, the circuit breaker equipment can provide different boost voltages according to different conditions when being connected with a mobile terminal or computer equipment, so that the circuit breaker equipment can be convenient to realize connection tripping in various scenes. In addition, for a specific implementation process of the communication debugging line provided in this embodiment, reference may be made to the specific implementation process in the above circuit embodiment, which is not described in detail herein.

The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A communication conversion circuit is characterized by being used for realizing communication conversion between a first terminal and a second terminal and comprising a first conversion circuit, a second conversion circuit and a voltage boosting circuit;

2. The communication conversion circuit of claim 1, wherein the first conversion circuit comprises the OTG interface, a first USB interface, a power switch unit, and an isolation optocoupler;

the OTG interface is used for connecting the first terminal, and the first USB interface is electrically connected with the third interface of the second conversion circuit;

3. The communication conversion circuit according to claim 2, wherein the power switch unit comprises a power chip, a first filtering branch and a second filtering branch;

the voltage signal output end of the power supply chip is electrically connected with the first voltage input end of the isolation optocoupler, and the first filtering branch is electrically connected with the voltage signal output end of the power supply chip.

4. The communication conversion circuit according to claim 1, wherein the second conversion circuit comprises a second USB interface, a conversion chip, and the serial communication interface;

5. The communication conversion circuit according to claim 4, wherein the conversion chip has a model of CH 340.

6. The communication conversion circuit according to claim 1, wherein the boost circuit comprises a DC-DC conversion chip, a field effect transistor, a switch, a first resistor, a second resistor, and a voltage signal interface;

7. The communication conversion circuit according to claim 6, wherein the other end of the switch is configured to receive a first voltage output by the DC-DC conversion chip when the other end of the switch is electrically connected to the voltage signal interface through the first resistor;

8. The communication conversion circuit of claim 6, wherein the drain of the field effect transistor is electrically connected to the voltage signal interface through a diode, wherein an anode of the diode is electrically connected to the drain of the field effect transistor and a cathode of the diode is electrically connected to the voltage signal interface.

9. The communication conversion circuit of claim 6, wherein the boost circuit further comprises a filter circuit comprising a first capacitor and a second capacitor connected in parallel, wherein the capacitance value of the first capacitor is greater than the capacitance value of the second capacitor;

10. A communication debug line, characterized in that it comprises a communication conversion circuit according to any of the preceding claims 1-9.