CN216624315U - LED epitaxial structure - Google Patents

Abstract

The present application shows an LED epitaxial structure comprising: a negative electrode conductive layer and a light emitting layer epitaxially grown on the negative electrode conductive layer; the light-emitting layer comprises a first side edge, the first side edge is provided with an inverted inclined slope, an included angle smaller than 90 degrees is formed between the first side edge and the first surface of the negative electrode conducting layer, and the first surface is a non-contact area between the upper surface of the negative electrode conducting layer and the lower surface of the light-emitting layer; a reflective layer is disposed on the first surface. The technical scheme that this application shows can form the trapezoidal slope of falling at the MESA MESA, promotes the luminous efficacy of side direction light simultaneously, increases LED's luminous efficacy.

Description

LED epitaxial structure

Technical Field

The present disclosure relates to the field of semiconductor technologies, and in particular, to a Light-Emitting Diode (LED) epitaxial structure and a method for fabricating the same.

Background

With the gradual application of the LED in the illumination field, the requirement of a user on the light emitting efficiency of the LED is higher and higher, and the LED chip with the vertical linear structure adopted in the current market has the advantages of single-sided light emitting, good heat dissipation capability, capability of bearing the injection of large current and low cost, and becomes the first choice in the high-power LED market. However, the LED chip with the vertical linear structure has the disadvantage that when a large current is injected, the current crowding effect near the N-type electrode is significant, which affects the light emitting efficiency.

After etching, the MESA step in the existing LED epitaxial structure presents a positive slope, and emitted light forms total reflection through an interface, so that the emitted light is limited and cannot be emitted, and the LED epitaxial structure cannot achieve the optimal light-emitting efficiency.

SUMMERY OF THE UTILITY MODEL

The application provides a LED epitaxial structure can form the trapezoidal slope of falling at the MESA MESA, promotes the luminous efficacy of side direction light simultaneously, increases LED's luminous efficacy.

The present application shows an LED epitaxial structure comprising: a negative electrode conductive layer and a light emitting layer epitaxially grown on the negative electrode conductive layer; the light-emitting layer comprises a first side edge, the first side edge is provided with an inverted inclined slope, an included angle smaller than 90 degrees is formed between the first side edge and the first surface of the negative electrode conducting layer, and the first surface is a non-contact area between the upper surface of the negative electrode conducting layer and the lower surface of the light-emitting layer; a reflective layer is disposed on the first surface. By adopting the embodiment, the problem that the lateral light emitting efficiency of the LED epitaxial structure is influenced because the existing MESA step only has the forward slope can be solved.

In some embodiments, a substrate layer and a positive conductive layer are also included; the substrate layer is tightly attached to the lower surface of the negative electrode conducting layer; the positive electrode conducting layer is epitaxially grown on the upper surface of the light emitting layer; the positive conductive layer includes a second side edge, the second side edge being in conformity with the inverted sloping slope of the first side edge. By adopting the embodiment, the four-layer LED epitaxial structure is shown, the anode conducting layer and the light-emitting layer are etched to form an inverted inclined slope, so that emergent light is reflected on the first surface to improve the light-emitting efficiency.

In some embodiments, the first side forms an angle of 60 ° to 70 ° with the first surface of the negative electrode conductive layer. By adopting the embodiment, a proper etching angle can be formed so as to facilitate the emergent light to be emitted.

In some embodiments, the reflective layer is prepared according to a vacuum coating technique. With the present embodiment, the reflective layer can be plated to the first surface using a vacuum plating technique.

In some embodiments, the reflective layer is at least one of a distributed bragg mirror or a silver mirror. With this embodiment, reflective layers of various materials can be selected.

In some embodiments, an included angle formed between the first side edge and the first surface of the negative electrode conductive layer is prepared by a dry etching method. With this embodiment mode, the substrate material can be removed using plasma or an etching gas.

In some embodiments, an included angle formed between the first side edge and the first surface of the negative electrode conductive layer is prepared by a wet etching method. With this embodiment mode, the substrate material can be removed by a liquid chemical or an etchant.

In some embodiments, the substrate layer comprises: at least one of a silicon substrate, a sapphire substrate, a strontium lanthanum tantalate aluminate substrate, and a lithium gallate substrate. With this embodiment, a variety of substrate layers can be selected.

In some embodiments, the negative conductive layer is an N-GaN layer; the positive electrode conducting layer is a P-GaN layer.

In some embodiments, the cross-sections of the light emitting layer and the positive conductive layer form a right-angled trapezoid structure.

The technical scheme shown above includes: a negative electrode conductive layer and a light emitting layer epitaxially grown on the negative electrode conductive layer; the light-emitting layer comprises a first side edge, the first side edge is provided with an inverted inclined slope, an included angle smaller than 90 degrees is formed between the first side edge and the first surface of the negative electrode conducting layer, and the first surface is a non-contact area between the upper surface of the negative electrode conducting layer and the lower surface of the light-emitting layer; a reflective layer is arranged on the first surface; the inverted trapezoidal slope can be formed on the MESA table top, the light emitting efficiency of lateral light is improved, and the light emitting efficiency of the LED is increased.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

FIG. 1 is a schematic structural diagram of an LED epitaxial structure before an LED chip process;

FIG. 2 is a schematic structural diagram of an LED epitaxial structure in a conventional process;

FIG. 3 illustrates a partial structural schematic of an LED epitaxial structure according to some embodiments of the present application;

fig. 4 illustrates a schematic structural diagram of an LED epitaxial structure according to some embodiments of the present application.

Detailed Description

To make the purpose and embodiments of the present application clearer, the following will clearly and completely describe the exemplary embodiments of the present application with reference to the attached drawings in the exemplary embodiments of the present application, and it is obvious that the described exemplary embodiments are only a part of the embodiments of the present application, and not all of the embodiments.

It should be noted that the brief descriptions of the terms in the present application are only for the convenience of understanding the embodiments described below, and are not intended to limit the embodiments of the present application. These terms should be understood in their ordinary and customary meaning unless otherwise indicated.

The terms "first," "second," "third," and the like in the description and claims of this application and in the above-described drawings are used for distinguishing between similar or analogous objects or entities and not necessarily for describing a particular sequential or chronological order, unless otherwise indicated. It is to be understood that the terms so used are interchangeable under appropriate circumstances.

The LED epitaxial structure is formed by growing a specific single crystal film on a substrate heated to a proper temperature and controllably conveying gaseous InGaAIP to the surface of the substrate. In the growth process of the LED epitaxial structure, multiple factors need to be considered, such as structural matching of the substrate and the epitaxial film, and the same or similar crystal structures, small mismatch of lattice constants, good crystallization performance and low defect density of the epitaxial material and the substrate material need to be considered; for example, the thermal expansion coefficients of the substrate and the epitaxial film are matched, the matching of the thermal expansion coefficients is very important, and the difference between the thermal expansion coefficients of the epitaxial film and the substrate material is too large, so that the quality of the epitaxial film is possibly reduced, and the device is damaged due to heat generation in the working process of the device; the chemical stability of the substrate and the epitaxial film is matched, and the difficulty and the cost of material preparation are reduced.

On the basis of considering the structural matching of the substrate and the epitaxial film, the influence of the shape of the epitaxial structure on the LED luminous efficiency needs to be considered, and in specific structural design, an appropriate LED epitaxial structure needs to be designed so as to achieve the optimum luminous efficiency.

Fig. 1 shows a schematic structural diagram of an LED epitaxial structure before an LED chip process, where the LED epitaxial structure includes: the light-emitting diode comprises a substrate layer, a negative electrode conducting layer formed on the substrate layer, a light-emitting layer formed on the negative electrode conducting layer and a positive electrode conducting layer formed on the light-emitting layer. In some embodiments, the substrate layer is provided as a sapphire substrate; the negative electrode conducting layer is an N-GaN conducting layer; the light emitting layer is a multi-quantum well layer; the positive conductive layer is a P-GaN layer. Wherein the sapphire substrate is represented by PSS in fig. 1, the negative electrode conductive layer is represented by N-GaN, the light-emitting layer is represented by QW, and the positive electrode conductive layer is represented by P-GaN.

The existing light emitting layer structure mainly includes two types:

1) double Heterojunction (DH): the P region and the N region of the heterojunction LED have semiconductor compositions having different band gaps, compared to the homojunction LED. In the heterojunction, the wide band gap material is called a barrier layer, and the narrow band gap material is called a potential well layer. The junction of only one barrier layer and the well layer is a Single Heterojunction (SH), and the junction of two barrier layers and one active layer (i.e., the carrier recombination light-emitting layer) is called a double heterojunction. Two barrier layers of the double heterojunction play a role in limiting the injected carriers, namely, the carriers entering the active layer through the surface diffusion of the first heterojunction can be blocked in the active layer by the interface of the second heterojunction, so that the conventional HBLED energy band structure usually adopts the double heterojunction.

2) A quantum well structure: thinning of the active layer can effectively improve radiation recombination efficiency and can reduce re-absorption. However, when the thickness of the active layer is comparable to the de broglie wave of electrons in the crystal, carriers undergo a change in energy spectrum due to quantum confinement. This particular structure is known as a Quantum Well (QW). The carrier bands in the potential wells are no longer continuous but take on a series of discrete values. The active layer can be either a single layer, i.e., a Single Quantum Well (SQW); it may also be a multilayer, i.e. multi-quantum well (MQW) structure. The active layer adopting the quantum well structure can be thinner, so that the further confinement of carriers is caused, and the efficiency is improved more favorably. It has been found that the A1InGap double heterojunction LED with the light-emitting wavelength of 565nm has the highest light efficiency when the thickness of the active layer is in the range of 0.15-0.75 nm; when the light efficiency is beyond the range, the light efficiency is sharply reduced, because the active layer is too thin, the carrier tunnel is easy to penetrate out of the active layer; if the active layer is too thick, the carrier recombination efficiency may be reduced. The quantum well structure is one of the energy band structures widely adopted by the current HBLED.

Fig. 2 is a schematic structural diagram of an LED epitaxial structure in a conventional process, in which a substrate layer is a sapphire substrate; the negative electrode conducting layer is an N-GaN conducting layer; the light emitting layer is a multi-quantum well layer; the positive electrode conducting layer is a P-GaN layer; the positive conductive layer and the light-emitting layer form an MESA step after etching, the step is a positive slope, and the light-emitting efficiency is limited and cannot be emitted. The exit direction of the light rays is shown in fig. 2.

In order to solve the problem that the forward gradient of a forward MESA step in the existing LED epitaxial structure influences the emission efficiency of LED lateral light, the application shows the LED epitaxial structure, which can utilize photoresist to be prepared through exposure and chip etching, so that emergent light is reflected at N-GaN, and the light extraction efficiency is improved.

Fig. 3 illustrates a schematic partial structure diagram of an LED epitaxial structure according to some embodiments of the present application, the partial structure of the LED epitaxial structure including: a negative electrode conductive layer 1 and a light emitting layer 2 epitaxially grown on the negative electrode conductive layer 1; the light emitting layer 2 comprises a first side 21, the first side 21 has an inverted slope, the first side 21 forms an included angle smaller than 90 degrees with the first surface 11 of the negative electrode conductive layer 1, and the first surface 11 is a non-contact area between the upper surface of the negative electrode conductive layer 1 and the lower surface of the light emitting layer 2; a reflecting layer 3 is arranged on the first surface 11;

epitaxial growth refers to growing a single crystal layer with a certain requirement and the same crystal orientation as the substrate on a single crystal substrate (substrate) as if the original crystal extended outward by a section. The epitaxial growth technology is developed in the late 50 s and early 60 s, in order to manufacture a high-frequency high-power device, the series resistance of a collector needs to be reduced, and materials are required to resist high voltage and large current, so that a thin high-resistance epitaxial layer needs to be grown on a low-resistance substrate. The new single crystal layer grown by epitaxy can be different from the substrate in the aspects of conductivity type, resistivity and the like, and can also be used for growing multiple layers of single crystals with different thicknesses and different requirements, so that the flexibility of device design and the performance of the device are greatly improved. Epitaxial processes are also widely used in PN junction isolation techniques in integrated circuits (see isolation techniques) and in improving material quality aspects in large scale integrated circuits.

In this embodiment, the included angle formed between the first side 21 and the first surface 11 of the negative electrode conductive layer 1 is prepared by a dry etching method or a wet etching method; the dry etching method can realize anisotropic etching by utilizing the reaction of plasma and a surface film so as to ensure the fidelity of an image after detail conversion; the wet etching method has strong adaptability, uniform surface and small damage to the silicon wafer, and is almost suitable for all materials such as metal, glass, plastic and the like; the first side 21 and the first surface 11 of the negative electrode conductive layer 1 form an included angle smaller than 90 degrees; if the first side 21 and the first surface 11 of the negative conductive layer 1 form an included angle larger than 90 degrees, that is, the positive conductive layer and the light-emitting layer in the epitaxial structure shown in fig. 2 form a MESA step with a forward slope after being etched, light emitted at this time forms total reflection through an interface, and the light-emitting efficiency is limited and cannot be emitted; when the included angle is smaller than 90 degrees, the emergent direction of the light rays points to the negative electrode conducting layer, so that the emergent light is reflected on the negative electrode conducting layer, and the light-emitting efficiency is improved; the reflecting layer 3 is prepared according to a vacuum coating technology; the reflecting layer 3 is a distributed Bragg reflector or a silver mirror; the distributed Bragg reflector can reflect light vertically emitted to the substrate back to a light emitting area or a window by utilizing the Bragg reflection principle, can partially improve the light emitting characteristics of a device, can enhance the reflection of light with different wavelengths, can realize the efficient reflection of incident light with multiple wavelengths, can directly utilize MOCVD equipment for growth, does not need to be processed again, and saves the cost; the silver mirror has fresh imaging, high reflectivity, high brightness, good color restoration, good durability and long service life; it should be noted that the angle of the included angle formed by the first side 21 and the first surface 11 of the negative conductive layer 1, the preparation method, and the reflective layer are not specifically limited herein, and are selected according to specific situations;

dry etching is a technique of performing thin film etching using plasma. When the gas is present in the form of a plasma, it has two characteristics: on one hand, the chemical activity of the gases in the plasma is much stronger than that of the gases in a normal state, and the gases can react with the materials more quickly by selecting proper gases according to the difference of the etched materials, so that the aim of etching removal is fulfilled; on the other hand, the electric field can be used for guiding and accelerating the plasma, so that the plasma has certain energy, and when the plasma bombards the surface of the etched object, atoms of the etched object material can be knocked out, thereby achieving the purpose of etching by utilizing physical energy transfer. Thus, dry etching is a result of a balance of both physical and chemical processes on the wafer surface. Dry etching is further classified into physical etching, chemical etching, and physical-chemical etching. Wherein physical etching is also called sputter etching.

Wet etching is an etching method, and is a technology for soaking an etching material in an etching solution to carry out etching; the suede is mainly engraved on a relatively flat film surface, so that the optical path is increased, the reflection of light is reduced, and diluted hydrochloric acid can be used for etching; all semiconductor wet etching has isotropy, so that the width of transverse etching is close to the depth of vertical etching no matter whether the oxide layer or the metal layer is etched; therefore, the pattern of the upper layer photoresist and the etched pattern on the lower layer material have certain deviation, and the work of pattern transfer and copying cannot be finished with high quality, so that the pattern is basically not used in the pattern transfer process along with the reduction of the characteristic dimension; at present, wet etching is generally used for wafer preparation, cleaning and other links which do not relate to patterns in the front of the process flow.

The Bragg reflector adopts a Bragg reflecting reflector structure with a periodic structure; the Bragg reflector is also called as a distributed Bragg reflector, is a reflector structure, is a periodic multilayer film system formed by alternately arranging two different dielectric materials, and the performance of the Bragg reflector is mainly characterized by the peak reflectivity, the width of a reflection band and the position of the reflection band. The most common is a quarter-mirror, where each layer has a thickness corresponding to a quarter of a wavelength, providing maximum reflectivity for a given number of layers; the latter condition applies to the case of normal incidence, if the mirror is used for larger angles of incidence, the relative required layer thickness is greater.

Fig. 4 shows a schematic structural diagram of an LED epitaxial structure according to some embodiments of the present application, which, as shown in fig. 4, in addition to the structure 1 shown in fig. 3, further includes: a substrate layer 4 and a positive electrode conductive layer 5; the substrate layer 4 is tightly attached to the lower surface of the negative electrode conductor 1; the positive electrode conductive layer 5 is epitaxially grown on the upper surface of the light emitting layer 2; the positive conductive layer 5 comprises a second side 51, the second side 51 corresponding to the inverted sloping slope of the first side 21.

The substrate layer is also called a substrate and is also called a support substrate; the substrate is a substrate for growing the epitaxial layer, plays a role in supporting and fixing in the production and manufacturing process, has strict requirements on the characteristic matching of the substrate and the epitaxial layer, and otherwise can influence the growth of the epitaxial layer or the quality of a chip; in the selection of the substrate material, the matching of the substrate material with the epitaxial film lattice, the thermal expansion coefficient and the chemical stability is very important, and a silicon substrate, a sapphire substrate, a silicon carbide substrate, a gallium nitride substrate, a zinc oxide substrate, a strontium lanthanum tantalate substrate, a lithium gallate substrate and the like can be selected; compared with the prior art, the silicon substrate has the advantages of good electric and heat conduction characteristics, large size, low cost and easy processing; the sapphire substrate has good chemical stability, does not absorb visible light, has moderate price and relatively mature manufacturing technology; the silicon carbide substrate is an electric conductor, and has small lattice constant difference and large heat conductivity coefficient; the gallium nitride substrate is the same as the epitaxial material, has no problems of lattice constant and thermal expansion mismatch, has lower dislocation density and high thermal conductivity, and is the most ideal material for manufacturing the GaN light-emitting diode; the zinc oxide substrate has the same crystal structure as GaN, very small lattice constant difference and excellent quality;

in this embodiment, the included angle formed by the first side 21 and the first surface 11 of the negative electrode conductive layer 1 is 60 ° to 70 °; the reflecting layer 3 is prepared according to a vacuum coating technology; the reflecting layer is at least one of a distributed Bragg reflector or a silver mirror; the distributed Bragg reflector can also reduce the absorption of the substrate layer 4 to light and reflect part of the light emitted to the substrate layer 4 back, so that the light extraction efficiency is increased; the included angle formed by the first side 21 and the first surface 1 of the negative electrode conducting layer 1 is prepared by a dry etching method or a wet etching method; the substrate layer 4 can be at least one of a silicon substrate, a sapphire substrate, a strontium lanthanum tantalate aluminate substrate and a lithium gallate substrate; the negative electrode conducting layer 1 is an N-GaN layer; the positive electrode conducting layer 5 is a P-GaN layer; the sections of the light emitting layer 2 and the anode conducting layer 5 form a right-angled trapezoid structure; it should be noted that the angle formed by the first side 21 and the first surface 11 of the negative conductive layer 1, the preparation method, the reflective layer 3, and the substrate layer 4 are not specifically limited herein, and are selected according to the specific situation.

The main doping agent in the N-GaN is Si which is a good N-type doping agent in the GaN, and the doping technology is simple and easy to control; the typical growth environment for P-GaN is at H₂Under the condition, Mg is used as an acceptor dopant, and the GaN film obtained after Mg doping has higher resistivity, mainly because Mg is combined with H molecules permeated from the film to form an inactive (Mg-H) complex, namely, Mg is inactivated through the passivation effect of H.

Example 1

An LED epitaxial structure comprises a negative electrode conducting layer, wherein the negative electrode conducting layer is an N-GaN layer and is provided with a light emitting layer which is epitaxially grown on the negative electrode conducting layer; the light emitting layer comprises a first side edge, the first side edge is provided with an inverted inclined slope, a 65-degree included angle is formed between the first side edge and the first surface of the N-GaN layer, and the included angle is prepared by a dry etching method; the first surface is a non-contact area of the upper surface of the N-GaN layer and the lower surface of the light emitting layer; the first surface is provided with a distributed Bragg reflector as a reflecting layer, and the reflecting layer adopts a vacuum coating technology;

in addition, the LED epitaxial structure also comprises a substrate layer and a positive electrode conducting layer; the substrate layer is a silicon substrate and is tightly attached to the lower surface of the N-GaN layer; the positive electrode conducting layer is a P-GaN layer and epitaxially grows on the upper surface of the light emitting layer; the P-GaN layer comprises a second side edge, and the inverted inclined slope of the second side edge is consistent with that of the first side edge; the sections of the light emitting layer and the P-GaN layer form a right-angled trapezoid structure.

Finally, it should be noted that: the above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present application.

The foregoing description, for purposes of explanation, has been presented in conjunction with specific embodiments. However, the illustrative discussions above are not intended to be exhaustive or to limit the embodiments to the precise forms disclosed above. Many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles and the practical application, to thereby enable others skilled in the art to best utilize the embodiments and various embodiments with various modifications as are suited to the particular use contemplated.

Claims (10)

1. An LED epitaxial structure, comprising: a negative electrode conductive layer (1) and a light-emitting layer (2) epitaxially grown on the negative electrode conductive layer (1); the light-emitting layer (2) comprises a first side edge (21), the first side edge (21) has an inverted slope, the first side edge (21) forms an included angle smaller than 90 degrees with a first surface (11) of the negative electrode conductive layer (1), and the first surface (11) is a non-contact area between the upper surface of the negative electrode conductive layer (1) and the lower surface of the light-emitting layer (2);

a reflective layer (3) is arranged on the first surface (11).

2. LED epitaxial structure according to claim 1, characterized in that it further comprises a substrate layer (4) and a positive conductive layer (5);

the substrate layer (4) is tightly attached to the lower surface of the negative electrode conducting layer (1);

the positive electrode conducting layer (5) is epitaxially grown on the upper surface of the light-emitting layer (2);

the positive electrode conductive layer (5) comprises a second side edge (51), and the second side edge (51) is consistent with the inverted inclined slope of the first side edge (21).

3. LED epitaxy structure according to claim 1, characterised in that the first side (21) forms an angle of 60 ° -70 ° with the first surface (11) of the negative conductive layer (1).

4. LED epitaxy structure according to claim 1, characterised in that said reflecting layer (3) is prepared according to vacuum coating techniques.

5. The LED epitaxial structure of claim 4, wherein the reflective layer is at least one of a Distributed Bragg Reflector (DBR) mirror or a silver mirror.

6. LED epitaxy structure according to claim 1, characterised in that the first side (21) forms an angle with the first surface (11) of the negative conductive layer (1) prepared by dry etching.

7. LED epitaxy structure according to claim 1, characterised in that the first side (21) forms an angle with the first surface (11) of the negative conductive layer (1) prepared by wet etching.

8. LED epitaxial structure according to claim 2, characterized in that the substrate layer (4) comprises: at least one of a silicon substrate, a sapphire substrate, a strontium lanthanum tantalate aluminate substrate, and a lithium gallate substrate.

9. LED epitaxy structure according to claim 2, characterised in that the negative conductive layer (1) is an N-GaN layer; the positive electrode conducting layer (5) is a P-GaN layer.

10. LED epitaxy structure according to claim 2, characterised in that the cross-sections of the light-emitting layer (2) and the positive conductive layer (5) form a right-angled trapezium structure.

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