CN216598995U - Digital filtering interface of high-voltage generator - Google Patents

Digital filtering interface of high-voltage generator Download PDF

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Publication number
CN216598995U
CN216598995U CN202121024681.7U CN202121024681U CN216598995U CN 216598995 U CN216598995 U CN 216598995U CN 202121024681 U CN202121024681 U CN 202121024681U CN 216598995 U CN216598995 U CN 216598995U
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loop
voltage
optical coupling
main control
control chip
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CN202121024681.7U
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朱炯
方泽莉
周彬奇
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Minfound Medical Systems Co Ltd
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Minfound Medical Systems Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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Abstract

The utility model relates to a digital filtering interface of a high-voltage generator, which comprises a TVS loop, an optical coupling loop, a phase inverter, a window filtering logic circuit and a shift register, wherein: the TVS loop is electrically connected between the high-voltage generator and the optical coupling loop and is used for absorbing voltage exceeding the bearing range of the optical coupling loop; the window filter logic circuit and the shift register are arranged in the main control chip and used for filtering interference signals input into the main control chip; has the advantages that: the front-end surge filtering is adopted to filter higher voltage generated during power-on, and the voltage of the back-end circuit is clamped in a normal voltage range to protect a loop from being damaged; the input signal is firstly input into the shift register, and the window filtering logic is adopted, so that the interference signal can be filtered, and the high-voltage state can be ensured to be normally input into the control end.

Description

Digital filtering interface of high-voltage generator
Technical Field
The utility model relates to the technical field of CT (computed tomography), in particular to a digital filtering interface of a high-voltage generator.
Background
The high voltage generator needs to feed back the working state of the high voltage generator to a main control system in real time during working, the main control system carries out exposure control through judgment of the alignment state, at present, level jitter of an I/O port occurs in the high voltage generator during operation, and a large impact current can be generated by some jitter, so that the I/O port can be abnormal in working or the I/O port of the main control system can be burnt.
Based on this, the present disclosure is thus directed.
SUMMERY OF THE UTILITY MODEL
In order to solve the above problems, an object of the present invention is to provide a digital filtering interface for a high voltage generator, which ensures that a signal can be normally input to a control terminal in a high voltage state.
In order to achieve the purpose, the technical scheme of the utility model is as follows:
a digital filtering interface of a high-voltage generator comprises a TVS loop, an optical coupling loop, a phase inverter, a window filtering logic circuit and a shift register, wherein:
the TVS loop is electrically connected between the high-voltage generator and the optical coupling loop and is used for absorbing voltage exceeding the bearing range of the optical coupling loop;
the optical coupling loop is electrically connected between the TVS loop and the phase inverter and is used for isolating a large current input at high voltage from the side of the main control chip;
the phase inverter is electrically connected between the optical coupling loop and the main control chip and is used for aligning the signal logic input to the main control chip with the signal logic input at high voltage;
the window filter logic circuit and the shift register are arranged in the main control chip and are used for filtering interference signals input into the main control chip.
Furthermore, the size of the window filter logic circuit is 16 bits, and the size of the shift register is 16 bits.
The utility model has the advantages that: the front-end surge filtering is adopted to filter higher voltage generated during power-on, and the voltage of the back-end circuit is clamped in a normal voltage range to protect a loop from being damaged; the input signal is firstly input into a shift register, an 8nS clock is adopted for sampling, and a 16-bit window filtering logic is adopted, so that the interference signal in 64nS can be filtered, and the high-voltage state can be normally input into a control end.
Drawings
FIG. 1 is a schematic view of a mechanism portion of an integrated control panel in an embodiment;
fig. 2 is a schematic diagram of filtering inside the main control chip in the embodiment, where a is a filtering schematic diagram of a high-voltage state being normally turned on and off, b is a filtering schematic diagram of a high-voltage state logic 1, and c is a filtering schematic diagram of a high-voltage state logic 0.
Detailed Description
The present invention will be described in further detail with reference to examples.
The present embodiment provides a digital filtering interface of a high voltage generator, as shown in fig. 1, including a TVS loop, an optical coupler loop, a phase inverter, a window filter logic circuit, and a shift register, where: the TVS loop is electrically connected between the high-voltage generator and the optical coupling loop and is used for absorbing voltage exceeding the bearing range of the optical coupling loop; the optical coupling loop is electrically connected between the TVS loop and the phase inverter and is used for isolating a large current input at high voltage from the side of the main control chip; the phase inverter is electrically connected between the optical coupling loop and the main control chip and is used for aligning the signal logic input to the main control chip with the signal logic input at high voltage; the window filter logic circuit and the shift register are arranged in the main control chip, the size of the window filter logic circuit is 16 bits, and the size of the shift register is 16 bits, so that interference signals input into the main control chip are filtered.
The working principle of the interface is as follows:
s1, supplying power to the system, and starting to send a state signal to the master control system by the high-voltage generator;
s2, the state signal can generate a larger surge voltage in the power-on process, the surge voltage far exceeds the bearing range of the optical coupling loop, the TVS loop absorbs the voltage exceeding the bearing range of the optical coupling loop in the power-on process, and the voltage borne by the optical coupling loop is clamped under normal voltage;
s3, isolating a large current signal input at high voltage from the side of the main control chip by the optical coupling loop to protect the main control chip from working normally;
s4, aligning the signal logic input to the main control chip with the signal logic input by high voltage through the inverter because the signal output by the optical coupling loop is the reverse signal of the high voltage input signal;
s5, the signal input by the inverter enters the main control chip, the input signal is firstly input into the 16-bit shift register, the system carries out sampling analysis on the 16-bit data, and the system adopts 8nS clock for sampling. As shown in fig. 2, when the current 8bit is 0 and the latter 8bit is 1, the high voltage is considered to be input to logic 1; when the current 8bit is 1 and the later 8bit is 0, the high voltage is considered as logic 0; any other states are considered as signal jitter, window filtering is carried out through a 16-bit window filtering logic circuit, the window filtering logic circuit can filter interference signals within 64ns to the maximum extent, and the high-voltage state can be input to a control end normally.
The above-mentioned embodiments are merely illustrative of the inventive concept and are not intended to limit the scope of the utility model, which is defined by the claims and the insubstantial modifications of the inventive concept can be made without departing from the scope of the utility model.

Claims (2)

1. The digital filtering interface of the high-voltage generator is characterized by comprising a TVS loop, an optical coupling loop, a phase inverter, a window filtering logic circuit and a shift register, wherein:
the TVS loop is electrically connected between the high-voltage generator and the optical coupling loop and is used for absorbing voltage exceeding the bearing range of the optical coupling loop;
the optical coupling loop is electrically connected between the TVS loop and the phase inverter and is used for isolating a large current input at high voltage from the side of the main control chip;
the phase inverter is electrically connected between the optical coupling loop and the main control chip and is used for aligning the signal logic input to the main control chip with the signal logic input at high voltage;
the window filter logic circuit and the shift register are arranged in the main control chip and are used for filtering interference signals input into the main control chip.
2. A high voltage generator digital filter interface as claimed in claim 1, wherein: the size of the window filter logic circuit is 16 bits, and the size of the shift register is 16 bits.
CN202121024681.7U 2021-05-13 2021-05-13 Digital filtering interface of high-voltage generator Active CN216598995U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202121024681.7U CN216598995U (en) 2021-05-13 2021-05-13 Digital filtering interface of high-voltage generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202121024681.7U CN216598995U (en) 2021-05-13 2021-05-13 Digital filtering interface of high-voltage generator

Publications (1)

Publication Number Publication Date
CN216598995U true CN216598995U (en) 2022-05-24

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202121024681.7U Active CN216598995U (en) 2021-05-13 2021-05-13 Digital filtering interface of high-voltage generator

Country Status (1)

Country Link
CN (1) CN216598995U (en)

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