CN216595952U - Chip-driven field effect tube system - Google Patents
Chip-driven field effect tube system Download PDFInfo
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- CN216595952U CN216595952U CN202122727486.7U CN202122727486U CN216595952U CN 216595952 U CN216595952 U CN 216595952U CN 202122727486 U CN202122727486 U CN 202122727486U CN 216595952 U CN216595952 U CN 216595952U
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Abstract
The embodiment of the utility model provides a chip-driven field effect tube system, which comprises: the device comprises a power supply module, a control module and an output module; the power supply module is electrically connected with the control module, and the control module is also electrically connected with the output module; the power supply module is used for providing a voltage signal to the control module; the control module is used for generating a pulse signal according to the voltage signal and controlling the output module to perform intermittent charging and discharging according to the pulse signal. According to the field effect tube system driven by the chip, provided by the embodiment of the utility model, the power supply module provides the working voltage, and the control module generates the pulse signal to control the output module to output stably, so that the effect of improving the working stability of the field effect tube system is realized.
Description
Technical Field
The utility model relates to a battery power supply circuit technology, in particular to a field effect tube system driven by a chip.
Background
For the current field effect transistor driving technology, the field effect transistor driving with low power consumption is very expensive; or the supply voltage range is too narrow, so that the battery system with slightly higher voltage is not suitable; or the static maintaining power consumption is too large, the comprehensive type selection basically fails to meet the use requirement, and particularly the field effect transistor drive of the vehicle gauge grade is realized. The current power supply range generated by the pulse is too narrow, the battery can only be powered by the highest string of battery cells, the output voltage of the battery is large in fluctuation under the working conditions of various environmental temperatures and different powers, and the pulse waveform generated current is unstable in working when the voltage of the battery fluctuates in a wide range.
SUMMERY OF THE UTILITY MODEL
The field effect tube system driven by the chip solves the problem that the field effect tube system in a low-voltage system of an electric automobile in the prior art is unstable in work.
The embodiment of the utility model provides a chip-driven field effect tube system, which comprises: the device comprises a power supply module, a control module and an output module;
the power supply module is electrically connected with the control module, and the control module is also electrically connected with the output module;
the power supply module is used for providing a voltage signal to the control module;
the control module is used for generating a pulse signal according to the voltage signal and controlling the output module to perform intermittent charging and discharging according to the pulse signal.
Optionally, the power module includes a battery pack, the battery pack includes a plurality of batteries connected in series, the battery pack includes a first positive output end and a negative output end, the first positive output end is electrically connected to the first port of the control module, and the negative output end is electrically connected to the second port of the control module.
Optionally, the battery pack further includes a second positive output end;
and the second positive output end and the negative output end are used for providing a power interface for external equipment.
Optionally, the control module includes a battery management system BMS and a control chip;
a first input end of the BMS is electrically connected with a first port of the power supply module, a second input end of the BMS is electrically connected with a second port of the power supply module, and an output end of the BMS is electrically connected with a first input end of the control chip;
the second input end of the control chip is electrically connected with the power supply module, and the output end of the control chip is electrically connected with the output module.
Optionally, the control chip includes a first field effect transistor and a second field effect transistor;
the first end of the first field effect transistor is electrically connected with the power supply module, and the second end of the first field effect transistor is electrically connected with the first end of the second field effect transistor;
and the second end of the second field effect transistor is grounded.
Optionally, the control module further includes: the circuit comprises a first capacitor, a second capacitor, a first inductor and a fourth capacitor;
the first end of the first capacitor is electrically connected with the first output end of the control chip, and the second end of the first capacitor is electrically connected with the first end of the second capacitor;
the second end of the second capacitor is electrically connected with the output module;
the first end of the first inductor is electrically connected with the second output end of the control chip, and the second end of the first inductor is electrically connected with the first end of the fourth capacitor;
and the first end of the fourth capacitor is electrically connected with the third output end of the control chip, and the second end of the fourth capacitor is grounded.
Optionally, the output module includes a first diode, a second diode, a third capacitor, and a third field effect transistor;
a first end of the first diode is electrically connected with the power supply module, and a second end of the first diode is electrically connected with a first end of the second diode;
a second end of the second diode is electrically connected with a first end of the third capacitor;
the second end of the third capacitor is electrically connected with the first end of the third field effect transistor;
the second end of the third field effect transistor is electrically connected with the first end of the third capacitor, and the third end of the third field effect transistor is electrically connected with the power supply module.
Optionally, the pulse signal is a high level signal or a low level signal.
Optionally, the control module is configured to control the output module to perform intermittent charging when the pulse signal is a high-level signal, and control the output module to perform intermittent discharging when the pulse signal is a low-level signal.
Optionally, the low level signal is used to control the second capacitor to discharge and charge the third capacitor.
The embodiment of the utility model provides a chip-driven field effect tube system, which comprises: the device comprises a power supply module, a control module and an output module; the power supply module is electrically connected with the control module, and the control module is also electrically connected with the output module; the power supply module is used for providing a voltage signal to the control module; the control module is used for generating a pulse signal according to the voltage signal and controlling the output module to perform intermittent charging and discharging according to the pulse signal. According to the field effect tube system driven by the chip, provided by the embodiment of the utility model, the power supply module provides the working voltage, and the control module generates the pulse signal to control the output module to output stably, so that the effect of improving the working stability of the field effect tube system is realized.
Drawings
FIG. 1 is a block diagram of a chip-driven FET system according to an embodiment of the present invention;
fig. 2 is a circuit diagram of a chip-driven fet system according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments that can be derived by one of ordinary skill in the art from the embodiments given herein are intended to be within the scope of the present disclosure.
The terms first, second and the like in the description and in the claims of the present application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that embodiments of the application may be practiced in sequences other than those illustrated or described herein, and that the terms "first," "second," and the like are generally used herein in a generic sense and do not limit the number of terms, e.g., the first term can be one or more than one. In addition, "and/or" in the specification and claims means at least one of connected objects, a character "/" generally means that a preceding and succeeding related objects are in an "or" relationship.
Fig. 1 is a block diagram of a chip-driven fet system according to an embodiment of the present invention, where the chip-driven fet system according to the embodiment includes: the device comprises a power module 1, a control module 2 and an output module 3;
the power module 1 is electrically connected with the control module 2, and the control module 2 is also electrically connected with the output module 3;
the power supply module 1 is used for providing a voltage signal to the control module 2;
the control module 2 is used for generating a pulse signal according to the voltage signal and controlling the output module 3 to perform intermittent charging and discharging according to the pulse signal.
In the embodiment, a MOSFET (field effect transistor) is generally used for control in a low-voltage system of an electric vehicle, and the power module 1 is configured to generate a power voltage and provide a converted voltage signal to the control module 2, wherein the control module 2 generates a pulse signal according to the voltage signal, the pulse signal is a discrete signal with various shapes, and compared with a common analog signal (such as a sine wave), the waveform is discontinuous on the Y axis (there is a distinct interval between waveforms) but has a certain periodicity. The control module 2 controls the output module 3 through the pulse signal, and controls the output module 3 to perform intermittent charging and discharging.
According to the chip-driven field effect tube system provided by the embodiment, the power module provides the working voltage, the control module generates the pulse signal to control the output module to output stably, and the effect of improving the working stability of the field effect tube system is achieved.
Optionally, the power module 1 includes a battery pack, the battery pack includes a plurality of batteries connected in series, the battery pack includes a first positive output end and a negative output end, the first positive output end is electrically connected to the first port of the control module 2, and the negative output end is electrically connected to the second port of the control module 2.
Referring to fig. 2, fig. 2 is a circuit diagram of a chip-driven fet system provided in this embodiment, a battery pack includes a plurality of lithium batteries CELL1-CELLn connected in series, and specifically, the number of lithium batteries is not limited in this embodiment. The lithium batteries are connected in series and comprise a plurality of positive electrode output ends, wherein the first positive electrode output end is a positive electrode of the whole power supply voltage output after the lithium batteries CELL1-CELLn-1 are connected in series, and other power supply output positive electrodes can be output positive electrodes comprising partial lithium batteries or output positive electrodes of all the lithium batteries, can be adaptively adjusted according to actual conditions, and can be exemplarily a positive electrode output end formed by connecting two lithium batteries in series or a positive electrode output end formed by connecting three lithium batteries in series.
Optionally, the battery pack further includes a second positive output end;
and the second positive output end and the negative output end are used for providing a power interface for external equipment.
In this embodiment, the second positive output terminal is an output positive electrode of all the lithium batteries, the negative output terminal is an output negative electrode of all the lithium batteries, and the output voltage is connected to an external device connected to the fet driving system and supplies power to the external device. Illustratively, the external device may be a plurality of components of an electric vehicle, such as a dashboard or the like.
Optionally, the control module 2 includes a battery management system BMS and a control chip;
a first input end of the BMS is electrically connected with a first port of the power module 1, a second input end of the BMS is electrically connected with a second port of the power module 1, and an output end of the BMS is electrically connected with a first input end of the control chip;
the second input end of the control chip is electrically connected with the power module 1, and the output end of the control chip is electrically connected with the output module 3.
In this embodiment, the battery management system is mainly used for intelligently managing and maintaining each battery unit, preventing the battery from being overcharged and overdischarged, prolonging the service life of the battery, and monitoring the state of the battery. Generally, a battery management system comprises a main control terminal, a Server terminal, a mobile client terminal and a plurality of BMS battery management system units, wherein the main control terminal and the mobile client terminal are both connected with the Server terminal; BMS battery management system unit includes BMS battery management system, control module group, display module assembly, wireless communication module, electrical equipment, group battery and gathers the module, can realize the real-time remote monitoring to BMS battery management system, need not the scene and detects, has alleviateed the maintenance degree of difficulty of group battery, has fully saved manpower resources, time and manufacturing cost, but the wide application is in the control field of group battery. The first input terminal and the second input terminal of the BMS are respectively connected to the first port and the second port of the power module 1, wherein the first port is the second positive output terminal of the power module 1 in the above-mentioned embodiment, and the second short circuit is the negative output terminal in the above-mentioned embodiment. The control chip U1 is a BUCK topology synchronous rectification DC/DC control chip, the control U1 comprises a plurality of input and output interfaces, and the control of the output module 3 is realized through the control chip U1.
Optionally, the control chip includes a first field effect transistor and a second field effect transistor;
the first end of the first field effect transistor is electrically connected with the power supply module 1, and the second end of the first field effect transistor is electrically connected with the first end of the second field effect transistor;
and the second end of the second field effect transistor is grounded.
In this embodiment, the control chip U1 includes a MOS transistor Q1 and a MOS transistor Q2, a first end of the MOS transistor Q1 is electrically connected to the power module 1, a second end of the MOS transistor Q1 is electrically connected to a first end of the MOS transistor Q2, and a second end of the MOS transistor Q2 is grounded.
Optionally, the control module 2 further includes: the circuit comprises a first capacitor, a second capacitor, a first inductor and a fourth capacitor;
the first end of the first capacitor is electrically connected with the first output end of the control chip, and the second end of the first capacitor is electrically connected with the first end of the second capacitor;
the second end of the second capacitor is electrically connected with the output module 3;
the first end of the first inductor is electrically connected with the second output end of the control chip, and the second end of the first inductor is electrically connected with the first end of the fourth capacitor;
and the first end of the fourth capacitor is electrically connected with the third output end of the control chip, and the second end of the fourth capacitor is grounded.
In this embodiment, the control module 2 further includes: the circuit comprises a capacitor C1, a capacitor C2, an inductor L1 and an inductor L4, wherein a first end of the capacitor C1 is connected with a BOOT pin of a control chip U1, a second end of the capacitor C1 is connected with a first end of the capacitor C2, and a second end of the capacitor C2 is electrically connected with the output module 3. The first end of the inductor L1 is connected with the SW pin of the control chip U1, the second end of the inductor L1 is connected with the first end of the capacitor C4, the first end of the capacitor C4 is connected with the FB pin of the control chip U1, and the second end of the capacitor C4 is grounded.
Optionally, the output module 3 includes a first diode, a second diode, a third capacitor, and a third field effect transistor;
a first end of the first diode is electrically connected with the power supply module 1, and a second end of the first diode is electrically connected with a first end of the second diode;
a second end of the second diode is electrically connected with a first end of the third capacitor;
the second end of the third capacitor is electrically connected with the first end of the third field effect transistor;
the second end of the third field effect transistor is electrically connected with the first end of the third capacitor, and the third end of the third field effect transistor is electrically connected with the power module 1.
In this embodiment, the output module 3 includes a diode D1, a diode D2, a capacitor C3, and a MOS transistor Q3, wherein a first end of the diode D1 is electrically connected to the power module 1, a second end of the diode D1 is electrically connected to the first end of the diode D2, and a second end of the diode D2 is electrically connected to the first end of the capacitor C3. The second end of the capacitor C3 is electrically connected to the first end of the MOS transistor Q3, the second end of the MOS transistor Q3 is connected to the first end of the capacitor C3, and the third end of the MOS transistor Q3 is electrically connected to the power module 1.
Specifically, the MOS transistor Q1 and the MOS transistor Q2 are MOS transistors inside a control chip U1, Vin is a power supply input of the control chip U1, Boot is an internal bootstrap voltage input of the control chip U1, SW is a switch output pin of the control chip U1, FB is a feedback input pin of the control chip U1, Vout is an output voltage controlled by the control chip U1, an inductor L1 is a DC/DC freewheeling inductor, a capacitor C4 is an output filter capacitor, the MOS transistor Q3 is a main loop MOS transistor, anti-reverse diodes D1 and D2, a capacitor C1 is a boost holding capacitor inside a control chip U1, a conversion capacitor C2, a holding capacitor C3, and a BMS. The BMS is a battery management system, and the BMS achieves the state that a main loop MOS tube Q3 is closed or opened by controlling BUCK synchronous rectification DC/DC chip to enable.
Optionally, the pulse signal is a high level signal or a low level signal.
Optionally, the control module 2 is configured to control the output module 3 to perform intermittent charging when the pulse signal is a high-level signal, and control the output module 3 to perform intermittent discharging when the pulse signal is a low-level signal.
Optionally, the low level signal is used to control the second capacitor to discharge and charge the third capacitor.
In this embodiment, the pulse signal is a discrete signal with various shapes, and compared with a common analog signal (such as a sine wave), the pulse signal is characterized in that the waveforms are discontinuous on the Y axis (the waveforms have obvious intervals) and have certain periodicity. The control module 2 controls the output module 3 through the pulse signal, and controls the output module 3 to perform intermittent charging and discharging.
Specifically, the control chip U1 is connected between B + and B-of the battery system, and the control chip U1 and the ultra-low power consumption driving circuit composed of a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, an inductor L1, a diode D1, a diode D2, and a MOS transistor Q3, wherein the control chip U1 is a wide-range input controller to adapt to conditions of different input voltages. The battery management system BMS enables the control chip U1 according to whether the battery state, when the system enables the control chip U1; when the control chip U1 starts to work, and the control chip U1 needs to maintain the voltage output on the capacitor C4, the control chip U1 must be always in the working mode, that is, the MOS transistors Q1 and Q2 are always turned on in turn, and the period of the turning on mode is automatically adjusted by the FB feedback pin, wherein the capacitor C1 is a peripheral bootstrap capacitor that the chip can work, and the SW pin outputs a PWM waveform. When the SW pin outputs the PWM level to be low, the capacitor C2 is charged through the diode D1 until the voltage is VC2＝VB-VD1. When the SW output PWM level is high, the capacitor C2 charges the capacitor C3 through the diode D2, the charge of the capacitor C2 is transferred to the storage capacitor C3, and the highest charging voltage of the capacitor C3 to Vc3 is Vc2-Vd 2. Repeating the third step and the fifth step, the voltage of the holding capacitor C3 can be maintained at a high stable value V under the high-frequency switching modeC3＝VB-VD1-VD2Thereby achieving the purpose of keeping the high-side MOS tube Q3 closed. Since the charging voltage of the capacitor C3 is higher than the series of battery voltages VB, the capacitor C3 can maintain a higher voltage to reliably drive the MOSFET, and generally, the battery voltage is about 2.5-4.2V, and the reliable driving MOSFET voltage needs 8-20V, so that the MOSFET can be more reliably driven by using more than 3 series of batteries.
According to the chip-driven field effect tube system provided by the embodiment, the power module provides the working voltage, the control module generates the pulse signal to control the output module to output stably, and the effect of improving the working stability of the field effect tube system is achieved.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will appreciate that the present invention is not limited to the particular embodiments described herein, and that various obvious changes, rearrangements and substitutions will now be apparent to those skilled in the art without departing from the scope of the utility model. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A chip driven field effect transistor system, comprising: the device comprises a power supply module, a control module and an output module;
the power supply module is electrically connected with the control module, and the control module is also electrically connected with the output module;
the power supply module is used for providing a voltage signal to the control module;
the control module is used for generating a pulse signal according to the voltage signal and controlling the output module to perform intermittent charging and discharging according to the pulse signal.
2. The system of claim 1, wherein the power module comprises a battery pack comprising a plurality of batteries connected in series, the battery pack comprising a first positive output electrically connected to the first port of the control module and a negative output electrically connected to the second port of the control module.
3. The system of claim 2, wherein the battery pack further comprises a second positive output;
and the second positive output end and the negative output end are used for providing a power interface for external equipment.
4. The system of claim 1, wherein the control module comprises a Battery Management System (BMS) and a control chip;
a first input end of the BMS is electrically connected with a first port of the power supply module, a second input end of the BMS is electrically connected with a second port of the power supply module, and an output end of the BMS is electrically connected with a first input end of the control chip;
the second input end of the control chip is electrically connected with the power supply module, and the output end of the control chip is electrically connected with the output module.
5. The system of claim 4, wherein the control chip comprises a first fet and a second fet;
the first end of the first field effect transistor is electrically connected with the power supply module, and the second end of the first field effect transistor is electrically connected with the first end of the second field effect transistor;
and the second end of the second field effect transistor is grounded.
6. The system of claim 5, wherein the control module further comprises: the circuit comprises a first capacitor, a second capacitor, a first inductor and a fourth capacitor;
the first end of the first capacitor is electrically connected with the first output end of the control chip, and the second end of the first capacitor is electrically connected with the first end of the second capacitor;
the second end of the second capacitor is electrically connected with the output module;
the first end of the first inductor is electrically connected with the second output end of the control chip, and the second end of the first inductor is electrically connected with the first end of the fourth capacitor;
and the first end of the fourth capacitor is electrically connected with the third output end of the control chip, and the second end of the fourth capacitor is grounded.
7. The system of claim 6, wherein the output module comprises a first diode, a second diode, a third capacitor, and a third field effect transistor;
a first end of the first diode is electrically connected with the power supply module, and a second end of the first diode is electrically connected with a first end of the second diode;
a second end of the second diode is electrically connected with a first end of the third capacitor;
the second end of the third capacitor is electrically connected with the first end of the third field effect transistor;
the second end of the third field effect transistor is electrically connected with the first end of the third capacitor, and the third end of the third field effect transistor is electrically connected with the power supply module.
8. The system of claim 7, wherein the pulse signal is a high level signal or a low level signal.
9. The system of claim 8, wherein the control module is configured to control the output module to perform intermittent charging if the pulse signal is a high-level signal and to perform intermittent discharging if the pulse signal is a low-level signal.
10. The system of claim 9, wherein the low signal is used to control the second capacitor to discharge and charge the third capacitor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122727486.7U CN216595952U (en) | 2021-11-09 | 2021-11-09 | Chip-driven field effect tube system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122727486.7U CN216595952U (en) | 2021-11-09 | 2021-11-09 | Chip-driven field effect tube system |
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| Publication Number | Publication Date |
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| CN216595952U true CN216595952U (en) | 2022-05-24 |
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| CN202122727486.7U Active CN216595952U (en) | 2021-11-09 | 2021-11-09 | Chip-driven field effect tube system |
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