CN216564490U

CN216564490U - Anti-surge circuit

Info

Publication number: CN216564490U
Application number: CN202023338944.XU
Authority: CN
Inventors: 田雷
Original assignee: Shanghai Simcom Wireless Solutions Co Ltd
Current assignee: Shanghai Simcom Wireless Solutions Co Ltd
Priority date: 2020-12-31
Filing date: 2020-12-31
Publication date: 2022-05-17
Anticipated expiration: 2030-12-31

Abstract

The utility model discloses an anti-surge circuit, which is arranged between an external power insertion end and a rear end protected working circuit of electronic equipment, and comprises: a capacitor, a depletion type PMOS tube and a resistor; the external electric insertion end of the electronic device is respectively connected with one end of the capacitor and the drain electrode of the depletion type PMOS tube, the other end of the capacitor is respectively connected with the grid electrode of the depletion type PMOS tube and the resistor, the other end of the resistor is grounded, and the source electrode of the depletion type PMOS tube is connected with the rear-end protected working circuit. Through this anti-surge circuit, can keep apart the outage under the scene of the sudden circular telegram after the electrified insertion of interface, or insert, can play better surge protection effect.

Description

Anti-surge circuit

Technical Field

The utility model relates to the field of electricity, in particular to an anti-surge circuit.

Background

Surges are transient voltages or currents that are too high and, if they exceed the endurance of the electronic device, can cause damage to the circuit. The interface is an important scene for surge generation, and data communication between electronic equipment is realized through interface connection. For example, in consumer electronic devices such as computers, vehicles, mobile phones and the like, data are charged and transmitted through a USB interface, in our daily life, ordinary consumers lack knowledge of damage to surges, and a large number of behaviors of interface live insertion exist, so that the generated surges bring hidden troubles to the service life of the electronic devices.

In the prior art, a transient suppression diode (TVS tube), a voltage dependent resistor, etc. are usually designed to release surge energy to prevent surge damage, as shown in fig. 1.

However, in practical applications, the TVS clamping voltage is limited by factors such as insufficient voltage, which may easily cause failure of protection, and chip damage sometimes occurs.

SUMMERY OF THE UTILITY MODEL

The utility model aims to provide an anti-surge circuit which can isolate power failure in the scene of current surge of an interface of electronic equipment and can play a better surge protection effect.

In order to solve the above-mentioned technical problem, an embodiment of the present invention provides an anti-surge circuit, disposed between an external power insertion end and a rear end protected operating circuit of an electronic device, including: a capacitor, a depletion type PMOS tube and a resistor;

the external electric insertion end of the electronic device is respectively connected with one end of the capacitor and the drain electrode of the depletion type PMOS tube, the other end of the capacitor is respectively connected with the grid electrode of the depletion type PMOS tube and the resistor, the other end of the resistor is grounded, and the source electrode of the depletion type PMOS tube is connected with the rear-end protected working circuit.

Compared with the prior art, the method and the device can isolate power failure in the scene that the interface is inserted in an electrified way or is suddenly electrified after being inserted, and can achieve a better surge protection effect.

As a further improvement, the pinch-off voltage of the depletion type PMOS tube is larger than the normal input voltage of the external electric insertion end of the electronic device.

As a further improvement, the pinch-off voltage of the depletion type PMOS tube is less than 20% of the normal input voltage of the external electric insertion end of the electronic device.

As a further improvement, the resistor is a current-limiting voltage-dividing pull-down resistor.

As a further improvement, in a default state, the depletion type PMOS transistor is in a conducting state, and the current voltage of the external electrical insertion end is normally output to the back-end protected normal circuit.

As a further improvement, when surge current appears at the external power insertion end, the capacitor enters a charging state, the gate voltage of the depletion type PMOS transistor is increased, and when the gate voltage of the depletion type PMOS transistor is greater than the pinch-off voltage thereof, the depletion type PMOS transistor enters a cut-off state, and the current voltage output to the rear-end protected working circuit disappears.

As a further improvement, when surge current appears at the external power insertion end, the surge current is guided to the underground through the capacitor and the resistor.

As a further improvement, when surge current appears at the external power insertion end for a period of time, the charging amount of the capacitor is gradually reduced until the end, the gate voltage of the depletion type PMOS transistor is reduced, when the gate voltage of the depletion type PMOS transistor is smaller than the pinch-off voltage of the depletion type PMOS transistor, the depletion type PMOS transistor recovers the conducting state, and the current voltage at the external power insertion end is normally output to a normal circuit with the rear end protected.

As a further improvement, the anti-surge circuit is adapted to at least one of: the system comprises an Internet of things wireless communication module, a mobile communication terminal and vehicle-mounted electronic equipment.

Drawings

FIG. 1 is a schematic diagram of a prior art anti-surge circuit;

fig. 2 is a diagram of an anti-surge circuit according to a first embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, it will be appreciated by those of ordinary skill in the art that numerous technical details are set forth in order to provide a better understanding of the present application in various embodiments of the present invention. However, the technical solutions claimed in the claims of the present application can be implemented without these technical details and with various changes and modifications based on the following embodiments.

The first embodiment of the present invention relates to an anti-surge circuit, as shown in fig. 2, including a capacitor 10, a depletion PMOS transistor 20, and a resistor 30, where the resistor 30 is a current-limiting voltage-dividing pull-down resistor.

External electric insertion end V of electronic equipment_inOne end of the capacitor 10 and the drain D of the depletion type PMOS tube 20 are respectively connected (in parallel), the other end of the capacitor 10 is respectively connected (in parallel) with the grid G of the depletion type PMOS tube 20 and the resistor 30, the other end of the resistor 30 is grounded, and the source S of the depletion type PMOS tube 20 is connected with the rear-end protected working circuit V_out。

In default state, the depletion type PMOS transistor 20 is in conduction state, i.e. the drain and source of the depletion type PMOS transistor are conducted, and the external electrical insertion end V is connected_inThe current and voltage of the power supply are normally output to a normal circuit V with the rear end protected_outAnd the rear-end protected circuit is normally powered.

When the external power is inserted into the end V_inWhen the capacitor 10 is charged and inserted with electricity or suddenly powered on after being inserted without electricity, the grid G of the depletion type PMOS tube 20 is at a high level, and when V is_GS>V_GS(P)When the current is interrupted, the depletion type PMOS transistor 20 is turned off, the current and voltage output to the rear-end protected working circuit are lost, the rear-end working circuit is protected, and the surge energy is synchronously released at this stage by being introduced into the ground through the capacitor 10 and the resistor 30. Wherein, V_GS(P)The pinch-off voltage of the depletion type PMOS transistor 20 is determined according to the V of the circuit_inValue selection, typically requiring V_in<V_GS(P)<V_inX 120% to realize the switch-off protection function of depletion type PMOS tube in the circuit.

When surge current appears at the external power insertion end for a period of time (T), the capacitor 10 gradually transits to the end of charging, when V_GS<V_GS(P)When the current flows through the depletion type PMOS tube 20, the depletion type PMOS tube is in a conduction state, namely the drain electrode and the source electrode of the depletion type PMOS tube are conducted again, and the external electric insertion end V is connected with the external electric terminal_inThe current and voltage of the power supply are normally output to a normal circuit V with the rear end protected_outAnd the rear-end protected circuit is powered on and enters a normal working state.

The embodiment can isolate power failure in the scene of live insertion of the interface, and can play a good surge protection effect.

The anti-surge circuit of the embodiment can be applied to TE/EVB Internet of things wireless communication modules, mobile terminals such as mobile phones and ipads, vehicle-mounted electronic equipment and the like.

A second embodiment of the present invention relates to a wireless communication module including the surge protection circuit of the first embodiment between an external interface and an internal operating circuit of the module.

It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples for carrying out the utility model, and that various changes in form and details may be made therein without departing from the spirit and scope of the utility model in practice.

Claims

1. An anti-surge circuit, which is provided between an external power insertion end of an electronic device and a rear end protected operating circuit, comprising: a capacitor, a depletion type PMOS tube and a resistor;

2. The anti-surge circuit according to claim 1, wherein a pinch-off voltage of the depletion type PMOS transistor is greater than a normal input voltage of an external power insertion end of the electronic device.

3. The anti-surge circuit according to claim 1, wherein the pinch-off voltage of the depletion type PMOS transistor is less than 20% of the normal input voltage of the external power insertion end of the electronic device.

4. The anti-surge circuit according to claim 1, wherein the resistor is a current-limiting voltage-dividing pull-down resistor.

5. An anti-surge circuit according to any of claims 1-4, wherein the anti-surge circuit is adapted to at least one of: the system comprises an Internet of things wireless communication module, a mobile communication terminal and vehicle-mounted electronic equipment.