CN216437214U - Intelligent gateway circuit of multichannel transmission - Google Patents

Intelligent gateway circuit of multichannel transmission Download PDF

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CN216437214U
CN216437214U CN202123034563.7U CN202123034563U CN216437214U CN 216437214 U CN216437214 U CN 216437214U CN 202123034563 U CN202123034563 U CN 202123034563U CN 216437214 U CN216437214 U CN 216437214U
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resistor
pin
power supply
conversion chip
processing unit
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朱鹏辉
姚薇薇
杨俊�
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Chengdu Hualida Information Technology Co ltd
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Chengdu Hualida Information Technology Co ltd
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Abstract

The utility model discloses an intelligent gateway circuit of multichannel transmission, including at least two way 485 acquisition units that are used for gathering front end 485 equipment information, at least all the way be used for gathering front end on-off state information's DIDO acquisition unit, with the core processing unit that all 485 acquisition units and DIDO acquisition unit all are connected to and near-end communication unit, middle-end communication unit and the distal end communication unit be connected with the core processing unit respectively. The utility model discloses a multichannel 485 acquisition unit acquires the same front end equipment information that has a 485 interface of organizing to adopt multichannel DIDO acquisition unit to acquire the same front end switchgear information of organizing, realized the unified management and control of equipment of organizing, reduced front end terminal equipment's communication device cost, and configuration near-end, middle-end, three kinds of communication transmission mode of distal end have improved the convenience of different demand data information exchanges.

Description

Intelligent gateway circuit of multichannel transmission
Technical Field
The utility model relates to a communication module circuit design, specifically say, relate to an intelligent gateway circuit of multichannel transmission.
Background
With the development of technology, the operation of various equipment devices cannot be separated from the use of electric power. The collection and monitoring of the electricity consumption information are important components of the operation and management of the power grid. At present, the information acquisition equipment which is relatively independent is usually carried out on the corresponding different terminals in the front-end electricity utilization information acquisition, the corresponding transmission modules are correspondingly configured, however, in places where some front-end electricity utilization equipment is relatively dense, the existing electricity utilization information acquisition and transmission equipment configuration modes can lead to too many equipment modules, the cost is relatively high, and the management and control of the equipment in the same group are not facilitated. Thus, improvements are needed.
SUMMERY OF THE UTILITY MODEL
To the problem among the above-mentioned prior art, the utility model provides an intelligent gateway circuit of multichannel transmission matches the information transmission at multiunit front end acquisition terminal through configuration multichannel information acquisition passageway to in unified management and control of same group's equipment and reduction equipment cost, and three kinds of communication methods that have configured near-end, middle-end, distal end make the information of gathering can transmit corresponding equipment as required.
In order to realize the purpose, the utility model discloses a technical scheme as follows:
the utility model provides an intelligent gateway circuit of multichannel transmission, includes that at least two way are used for gathering the 485 acquisition unit of front end 485 equipment information, at least one way is used for gathering the DIDO acquisition unit of front end on-off state information, the core processing unit who all is connected with all 485 acquisition units and DIDO acquisition unit to and near-end communication unit, middle-end communication unit and the far-end communication unit who is connected with core processing unit respectively.
Specifically, the 485 acquisition unit comprises a conversion chip IC1, a resistor R1 with one end connected with a TX transmission of the core processing unit and the other end connected with a DI pin of the conversion chip IC1, a resistor R2 with one end connected with the DI pin of the conversion chip IC1, a triode Q1 with a base connected with the other end of the resistor R2, a collector connected with RE and DE pins of the conversion chip IC1 and an emitter connected with a GND pin of the conversion chip IC1, a resistor R3 with one end connected with a 5V power supply and the other end connected with RE and DE pins of the conversion chip IC1, a resistor R4 with one end connected with a 5V power supply and the other end connected with an RO pin of the conversion chip IC1, a resistor R5 with one end connected with an RX reception of the core processing unit and the other end connected with an RO pin of the conversion chip IC1, a resistor R6959 with one end connected with ground, a resistor R7 with an A pin of the conversion chip IC1 with one end connected with the other end connected with a resistor R7 and a transient resistor R8 and a TVS 867 connected with another power supply after being connected in parallel, one end is connected with the other end of the resistor R7 and the other end is used as a variable resistor R9 of one path of differential signal 485A interface, one end is connected with the resistor R10 of the B pin of the conversion chip IC1, one end is connected with the resistor R10 and the other end is connected with the ground, the resistor R11 and the transient diode TVS2 are connected in parallel, one end is connected with the other end of the resistor R10 and the other end is used as a variable resistor R12 of the other path of differential signal 485B interface, and the transient diode TVS3 is connected between the two paths of differential signal interfaces, wherein the Vcc pin of the conversion chip IC1 is connected with 5V power supply and is connected with the ground through a capacitor C1, and the two paths of differential signal interfaces 485A and 485B are used for connecting with front-end 485 acquisition equipment.
Specifically, the DIDO acquisition unit includes a power supply chip U1 with a 5VIN pin connected to a 5V power supply, a resistor R15 with one end connected to a 5VOUT pin of the power supply chip U1, an optocoupler N1 with an anode of an emitting end connected to the other end of the resistor R15, a transient diode TVS4 with one end connected to a cathode of an emitting end of an optocoupler N1 and a ground end of the other end, a resistor R13 with one end connected to the 5V power supply and the other end connected to a C pole of a receiving end of an optocoupler N1, and a switch control circuit connected between the COM pin of the power supply chip U1 and the cathode of the emitting end of the optocoupler N1, wherein the C pole of the receiving end of the optocoupler N1 transmits a front-end switch state quantity signal DI to the core processing unit, the E pole of the receiving end of the optocoupler N1 is grounded, and the switch control circuit receives a control signal DO of the core processing unit.
Specifically, the switch control circuit comprises a resistor R14, a resistor R16, a capacitor C2, a triode Q2, a diode D1 and a relay JK1, one end of the resistor R16 receives a control signal DO of the core processing unit, the other end of the resistor R16 is connected with a base electrode of the triode Q2, one end of the capacitor C2 is connected with the base electrode of the triode Q2, the other end of the capacitor C2 is connected with the ground, an emitter electrode of the triode Q2 is connected with the ground, a collector electrode of the triode Q2 is connected with one end of a resistor R14, the other end of the resistor R14 is connected with a pin 1 of the relay JK1, an anode of the diode D1 is connected with a pin 1 of the relay JK1, a cathode of the diode D1 is connected with a pin 2 of the relay JK1 and a 5V for power supply, the relay JK1 serves as a switch component, primary coil is arranged in the pin 1 and drives a secondary coil in the pin 3 and a pin 4 to be switched on and is connected with a cathode of an optical coupler N1 and a COM of the power supply chip U1 respectively.
Specifically, the core processing unit adopts an embedded module with the model number of FETMX6 ULL-S.
Specifically, the near-end communication unit adopts a Bluetooth module with the model number HY-40R204 CC.
Specifically, the middle-end communication unit adopts a LoRa wireless communication module with the model of LORA _ M-HL 10.
Specifically, the remote communication unit adopts an ethernet module of IEEE802.3 standard.
Compared with the prior art, the utility model discloses following beneficial effect has:
the utility model discloses a multichannel 485 acquisition unit acquires the same front end equipment information that has a 485 interface of organizing to adopt multichannel DIDO acquisition unit to acquire the same front end switchgear information of organizing, realized the unified management and control of equipment of organizing, reduced front end terminal equipment's communication device cost, and configuration near-end, middle-end, three kinds of communication transmission mode of distal end have improved the convenience of different demand data information exchanges. The utility model relates to an ingenious, simple structure, convenient to use, low cost is suitable for and uses in intelligent gateway module design.
Drawings
Fig. 1 is a schematic block diagram of an embodiment of the present invention.
Fig. 2 is a schematic circuit diagram of a 485 acquisition unit in an embodiment of the present invention.
Fig. 3 is a schematic circuit diagram of the DIDO acquisition unit according to an embodiment of the present invention.
Detailed Description
The present invention will be further described with reference to the following drawings and examples, and embodiments of the present invention include, but are not limited to, the following examples.
Examples
As shown in fig. 1 to fig. 3, the multichannel transmission intelligent gateway circuit includes four 485 acquisition units for acquiring information of the front-end 485 device, two DIDO acquisition units for acquiring information of the front-end switch state, a core processing unit connected to all the 485 acquisition units and the DIDO acquisition units, and a near-end communication unit, a middle-end communication unit, and a far-end communication unit respectively connected to the core processing unit.
Specifically, the four-way 485 acquisition unit has the same structure, and comprises a conversion chip IC1 with model number ISL3155E, a resistor R1 with one end connected with the TX transmission of the core processing unit and the other end connected with the DI pin of the conversion chip IC1, a resistor R2 with one end connected with the DI pin of the conversion chip IC1, a resistor R59627 with the base connected with the other end of the resistor R2, the collector connected with the RE and DE pins of the conversion chip IC1, and the emitter connected with the GND pin of the conversion chip IC1, a resistor R3 with one end connected with 5V power supply and the other end connected with the RE and DE pins of the conversion chip IC1, a resistor R4 with one end connected with 5V power supply and the RO pin of the conversion chip IC1, a resistor R5 with one end connected with the RX reception of the core processing unit and the other end connected with the RO pin of the conversion chip IC1, a resistor R57327 with one end connected with the resistor R5 and the other end connected with the ground, and a resistor R7 with the A pin of the conversion chip IC1, the device comprises a resistor R8 and a transient diode TVS1 which are connected with one end of a resistor R7 and the other end of which is connected with a 5V power supply after being connected in parallel, a variable resistor R9 which is connected with the other end of a resistor R7 and the other end of which is used as a path of differential signal 485A interface, a resistor R10 of which one end is connected with a B pin of a conversion chip IC1, a resistor R11 and a transient diode TVS2 which are connected with the other end of a resistor R10 and the other end of which is grounded, a variable resistor R12 which is connected with the other end of a resistor R10 and the other end of which is used as a path of differential signal 485B interface, and a transient diode TVS3 which is connected between two paths of differential signal interfaces, wherein the Vcc pin of the conversion chip IC1 is connected with the 5V power supply and grounded through a capacitor C1, and the two paths of differential signal interfaces 485A and 485B are used for connecting front-end 485 acquisition equipment, such as various electric meters, other acquisition terminals and centralized terminal equipment.
The working process is as follows: the ISL3155E level conversion chip IC1 is adopted, and the data transmission rate of the chip is 1Mbps, which is improved by nearly 10 times compared with the original chip. Data TX sent by a core processing unit is sent to pins RE and DE of an IC1 through R1200, R21K, Q19014 and R310K, the data is used as the data transmission direction of a control chip IC1, the data passes through R51K and then directly enters a pin DI of an IC1 chip, the data is sent to the inside of the chip as data information, the data is sent to the IC1 conversion chip through an external 485 differential signal line, the data information received by the IC1 is output through the pin 1 after internal level conversion, and the data information is sent to a core board module after voltage leveling through R51K and R61.5K. The 485 circuit belongs to a differential transmission mode, an IC 1A, B is a differential two-port, signals are limited by R710 and R1010, and are driven to be pulled up and down by R81K and R111K, then pass through a protection circuit consisting of transient suppression diodes TVS1, TVS2, TVS3 SMB6.5CA, variable thermistors R9 and R12 MZ21-P560RM, and are sent out.
Specifically, the DIDO acquisition unit includes a power supply chip U1 with a 5VIN pin connected to a 5V power supply, a resistor R15 with one end connected to a 5VOUT pin of the power supply chip U1, an optocoupler N1 with an anode of an emitting end connected to the other end of the resistor R15, a transient diode TVS4 with one end connected to a cathode of an emitting end of an optocoupler N1 and a ground end of the other end, a resistor R13 with one end connected to the 5V power supply and the other end connected to a C pole of a receiving end of an optocoupler N1, and a switch control circuit connected between the COM pin of the power supply chip U1 and the cathode of the emitting end of the optocoupler N1, wherein the C pole of the receiving end of the optocoupler N1 transmits a front-end switch state quantity signal DI to the core processing unit, the E pole of the receiving end of the optocoupler N1 is grounded, and the switch control circuit receives a control signal DO of the core processing unit.
The unit mainly collects the current state quantity of other equipment, such as the on/off state of a switch or a relay, and is a passive port, so an external power supply needs to be provided, the design adopts a low-power DC-DC F0505S-1W2 device as a power supply chip U1, the power voltage output to an interface end is 5V, the power voltage is transmitted to an input end of an optical coupler through R151K and then transmitted to an external terminal through an output end of the optical coupler to be arranged at an interface, the interface is connected with a transient suppression diode TVS4 for protection from being damaged by external strong electricity, the interface and a COM ground end of the DC-DC are respectively transmitted to two contacts of the switch or the relay as outputs, when the switch is switched on, the internal DC-DC5V and the switched-on outside form a loop, so that the optical coupler is switched on, the other end of the optical coupler is switched on an N1 NEC 2501C, E level, and the external circuit 5V is switched on one end of the optical coupler through a resistor R135.1K to be connected with an N1 NEC 2501C, a N2501C, a DC voltage and a DC voltage is switched-DC voltage source, The level of the pole N1C from stage E to ground represents the amount of external switch state that is added to the core board, and the other path DI is the same as the circuit. In order to protect the core board from being influenced by external strong electricity, a DC-DC chip U1, an optical coupler N1 and a transient suppression diode are adopted, so that signals can be correctly sent to the core board and are not influenced by external strong electricity.
Specifically, the switch control circuit comprises a resistor R14, a resistor R16, a capacitor C2, a triode Q2, a diode D1 and a relay JK1, one end of the resistor R16 receives a control signal DO of the core processing unit, the other end of the resistor R16 is connected with a base electrode of the triode Q2, one end of the capacitor C2 is connected with the base electrode of the triode Q2, the other end of the capacitor C2 is connected with the ground, an emitter electrode of the triode Q2 is connected with the ground, a collector electrode of the triode Q2 is connected with one end of a resistor R14, the other end of the resistor R14 is connected with a pin 1 of the relay JK1, an anode of the diode D1 is connected with a pin 1 of the relay JK1, a cathode of the diode D1 is connected with a pin 2 of the relay JK1 and a 5V for power supply, the relay JK1 serves as a switch component, primary coil is arranged in the pin 1 and drives a secondary coil in the pin 3 and a pin 4 to be switched on and is connected with a cathode of an optical coupler N1 and a COM of the power supply chip U1 respectively.
The circuit is the control of an external switch by a core processing unit, namely, a control level is output through a certain pin of a core board, then the control level is controlled through a resistor R161K and a capacitor C20.1uF, the control is generally controlled in a pulse mode, the direct-current voltage of a pin 2 of a relay JK1 HF49FD (005-1H11) is 5V, an inductance coil is arranged between the pin 1 and the pin 2 in the relay, when the control pulse width is high level, the triode Q2 is conducted, the power voltage 5V passes through the internal coil of the relay to the triode Q2 and then forms a loop, the coil of the relay 1-2 can generate induction current and voltage so as to drive a secondary coil (in the relay) to obtain induction voltage to close the internal switch, the two contacts of the corresponding switch are the pins 3 and 4 of the relay, which are the control end to generate a pulse again, and the relay can be disconnected again, the pin 1, the pin, the 2 pin is externally connected with a diode D1 LL4148, and the function of the diode is mainly that under the condition that the triode switch is disconnected, the energy stored on the coil of the diode can be released through an external diode D1, and the voltage point discharge of the coil is avoided. The 2 DO circuits are identical. In order to ensure the influence of external static electricity, HF49FD with electrostatic contact discharge of up to 8000V is adopted in the relay.
Specifically, the core processing unit adopts an embedded module with the model number of FETMX6ULL-S, and belongs to Freescale i.MX6ULL and an i.MX6 series is expanded. The processor is a processor subsystem with high performance, ultra-high efficiency and low cost, adopts an advanced ARM Cortex-A7 inner core, and has the operation speed as high as 800 MHz. The i.MX6ULL application processor comprises an integrated power management module, thereby reducing the complexity of an external power supply and simplifying the power-on sequence. Each model of the i.mx6ull sub-series provides a variety of memory interfaces including 16-bit LPDDR2, DDR3, DDR3L, ordinary NAND flash and NAND flash with built-in management unit, NOR flash, eMMC, Quad SPI, etc. interfaces, and peripheral interfaces for connecting to devices such as WLAN, Bluetooth, GPS, displays and camera sensors. The i.mx6ull sub-series is supported by a discrete device power supply circuit. The 73 th and 72 th pins UART2_ TX/RX, the 78 th and 77 th pins UART3_ TX/RX, the 82 th and 83 th pins UART4_ TX/RX and the 84 th and 85 th pins UART5_ TX/RX are respectively connected with four paths of 485 acquisition units. Pins 145 and 146 of the device are connected to a common DI, and pins 141 and 142 are connected to a common DO.
Specifically, the near-end communication unit adopts a Bluetooth module with the model number HY-40R204 CC. The low level reset of the pin 80 of the reset core processing unit is realized by connecting the asynchronous serial port RX with the extension serial port TX01 of the core processing unit and connecting the asynchronous serial port TX with the extension serial port RX01 of the core processing unit. Can communicate with intelligent gateway through the mobile phone Bluetooth, such as: and carrying out unlocking function requirements of the terminal equipment through the mobile phone. The model number HY-40R204CC is adopted, and the HY-40R204 Bluetooth low-power consumption single-mode module is used for a low-power sensor and nearby single-mode equipment. Providing bluetooth low energy characteristics: radio, bluetooth protocol stack, configuration files and required space for client applications. The module also provides a flexible hardware interface for connecting sensors. HY-40R204 can be powered directly using a standard 3V button battery or a pair of AAA batteries, it consumes only 0.15uA in the lowest power off mode, and wakes up in a few microseconds. The HY-40R204 transmission distance can reach 100 meters. The Bluetooth module is in a low power consumption mode, has a short transmission distance and accords with a short-distance wireless communication mode.
Specifically, the middle-end communication unit adopts a LoRa wireless communication module with the model of LORA _ M-HL 10. The expansion serial port TX2 is connected with the core processing unit WK2124 through the asynchronous serial port LORA _ RX, and the expansion serial port RX2 is connected with the core processing unit WK2124 through the asynchronous serial port LORA _ TX. The connection networking mechanism of the main node and the multiple nodes can be realized, the network structure of the zone is realized, and the coverage range is large. LORA _ M-HL10 is a remote low-power LoRa Internet of things module product developed by Rejeee based on Semtech SX1268/62 radio frequency front end, a Cortex M0+ ultra-low power consumption microcontroller is adopted as a main control, an ultra-small surface mount packaging process is adopted, and the LORA _ M-HL10 is widely applied to the fields of intelligent instruments, logistics storage, intelligent buildings, smart cities, asset tracking, city street lamps, medical health care products, agriculture, parking lot sensors and the like through the debugging of professional radio frequency instruments. LORA module HL10 maximum transmitting power 22dBm, the dormancy current is as low as 2uA, support long-range wireless awakening under the dormancy mode, support collision detection automatic frequency hopping, data transparent transmission realizes quick network deployment, supports AES128 encryption transmission, and the loRa parameter supports AT to modify, deals with various environments in a flexible way.
Specifically, the remote communication unit adopts an ethernet module of IEEE802.3 standard. Ethernet is the most widely used local area network, and includes standard Ethernet (10Mbit/s), fast Ethernet (100Mbit/s) and 10G (10Gbit/s) Ethernet, and adopts CSMA/CD access control method, which all conform to IEEE802.3 standard. IEEE802.3 specifies the contents of the wiring, electrical signals, and medium access layer protocols, including the physical layer. Ethernet is currently the most commonly used local area network technology, largely replacing other local area network standards. Such as token ring, FDDIARCNET. After the rapid development of 100M ethernet at the end of the last century, gigabit ethernet and even 10G ethernet are continuously expanding the application range under the impetus of international organization and leading enterprise. The core board supports two hundred million network ports, and is connected with the PHY chip by using an RMII interface form, an Ethernet MAC chip LAN8720A is adopted, the LAN8720A is a low-power-consumption 10/100M Ethernet PHY layer chip, the voltage of an I/O pin conforms to the IEEE802.3-2005 standard, the communication with the Ethernet MAC layer through the RMII interface is supported, a 10-BASE-T/100BASE-TX full-duplex transmission module is arranged in the core board, and the 10Mbps and 10Mbps are supported.
Through the arrangement, the communication terminal is constructed for acquiring interfaces of multiple devices, performing internal operation processing and realizing near, medium and far-end data information exchange.
The above-mentioned embodiment is only the preferred embodiment of the present invention, and is not a limitation to the protection scope of the present invention, but all the changes made by adopting the design principle of the present invention and performing non-creative work on this basis should belong to the protection scope of the present invention.

Claims (8)

1. The utility model provides an intelligent gateway circuit of multichannel transmission which characterized in that includes two at least ways 485 acquisition unit that are used for gathering front end 485 equipment information, at least one way DIDO acquisition unit that is used for gathering front end on-off state information, the core processing unit who all is connected with all 485 acquisition units and DIDO acquisition unit to and near-end communication unit, middle-end communication unit and the far-end communication unit that are connected with core processing unit respectively.
2. The multi-channel transmission intelligent gateway circuit according to claim 1, wherein the 485 acquisition unit comprises a conversion chip IC1, a resistor R1 having one end connected to the TX transmission of the core processing unit and the other end connected to the DI pin of the conversion chip IC1, a resistor R2 having one end connected to the DI pin of the conversion chip IC1, a transistor Q1 having a base connected to the other end of the resistor R2, a collector connected to the RE and DE pins of the conversion chip IC1 and an emitter connected to the GND pin of the conversion chip IC1, a resistor R3 having one end connected to the 5V power supply and the other end connected to the RE and DE pins of the conversion chip IC1, a resistor R4 having one end connected to the 5V power supply and the other end connected to the RO pin of the conversion chip IC1, a resistor R5 having one end connected to the RX reception of the core processing unit and the RO pin of the other end of the conversion chip IC1, a resistor R5 having one end connected to the ground, a resistor R7 having one end connected to the A pin of the conversion chip IC1, the device comprises a resistor R8 and a transient diode TVS1 which are connected with one end of a resistor R7 and the other end of which is connected with a 5V power supply after being connected in parallel, a variable resistor R9 which is connected with the other end of a resistor R7 and the other end of which is used as a path of differential signal 485A interface, a resistor R10 of which one end is connected with a B pin of a conversion chip IC1, a resistor R11 and a transient diode TVS2 which are connected with the other end of a resistor R10 and the other end of which are connected with the ground after being connected in parallel, a variable resistor R12 which is connected with the other end of a resistor R10 and the other end of which is used as a path of differential signal 485B interface, and a transient diode TVS3 which is connected between two paths of differential signal interfaces, wherein the Vcc pin of the conversion chip IC1 is connected with the 5V power supply and is connected with the ground through a capacitor C1, and the two paths of differential signal interfaces 485A and 485B are used for connecting with a front-end 485 acquisition equipment.
3. The multi-channel transmission intelligent gateway circuit according to claim 2, wherein the DIDO acquisition unit comprises a power supply chip U1 with a 5VIN pin connected to a 5V power supply, a resistor R15 with one end connected to a 5VOUT pin of the power supply chip U1, an optocoupler N1 with an anode of a transmitting end connected to the other end of the resistor R15, a transient diode TVS4 with a cathode of a transmitting end connected to an optocoupler N1 and a ground terminal of the other end, a resistor R13 with a terminal of the 5V power supply and a terminal C of a receiving end connected to the optocoupler N1, and a switch control circuit connected between the COM pin of the power supply chip U1 and the cathode of the transmitting end of the optocoupler N1, wherein the terminal C of the optocoupler N1 transmits a front switch state quantity signal DI to the core processing unit, the terminal E of the optocoupler N1 receives a ground terminal E, and the switch control circuit receives a control signal DO of the core processing unit.
4. The multi-channel transmission intelligent gateway circuit of claim 3, the switch control circuit comprises a resistor R14, a resistor R16, a capacitor C2, a triode Q2, a diode D1 and a relay JK1, wherein one end of the resistor R16 receives a control signal DO of the core processing unit, the other end of the resistor R16 is connected with the base electrode of the triode Q2, one end of the capacitor C2 is connected with the base electrode of the triode Q2, the other end of the capacitor C2 is grounded, the emitter electrode of the triode Q2 is grounded, the collector electrode of the triode Q2 is connected with one end of a resistor R14, the other end of the resistor R14 is connected with a pin 1 of the relay JK1, the positive electrode of a diode D1 is connected with a pin 1 of the relay JK1, the negative electrode of the diode D1 is connected with a pin 2 of the relay JK1 and 5V for power supply, and the relay JK1 is used as a switch component, the primary coils are arranged in the pins 1 and 2, the secondary coils in the pins 3 and 4 are driven to open and close, the 3 pin and the 4 pin are respectively connected with the cathode of the emitting end of the optocoupler N1 and the COM pin of the power supply chip U1.
5. The multi-channel transmission intelligent gateway circuit according to claim 4, wherein the core processing unit adopts an embedded module with model number of FETMX6 ULL-S.
6. The multi-channel transmission intelligent gateway circuit of claim 5, wherein the near-end communication unit adopts a Bluetooth module with model number HY-40R204 CC.
7. The multi-channel transmission intelligent gateway circuit of claim 6, wherein the middle-end communication unit adopts a LORA wireless communication module with a model number LORA _ M-HL 10.
8. The multi-channel transmission intelligent gateway circuit of claim 7, wherein the remote communication unit employs an ethernet module of IEEE802.3 standard.
CN202123034563.7U 2021-12-03 2021-12-03 Intelligent gateway circuit of multichannel transmission Active CN216437214U (en)

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