CN216248274U - Half-bus short-circuit fault detection circuit for three-level inverter circuit - Google Patents
Half-bus short-circuit fault detection circuit for three-level inverter circuit Download PDFInfo
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- CN216248274U CN216248274U CN202122261420.3U CN202122261420U CN216248274U CN 216248274 U CN216248274 U CN 216248274U CN 202122261420 U CN202122261420 U CN 202122261420U CN 216248274 U CN216248274 U CN 216248274U
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Abstract
The utility model provides a half bus short circuit fault detection circuit for three level inverter circuit, includes the fault detection circuit, and the fault detection circuit is connected with BOOST BOOST circuit and three level inverter circuit, and BOOST BOOST circuit transmits the direct current of photovoltaic board to carry out the contravariant processing in three level inverter circuit after stepping up, converts the direct current into the alternating current, and the bus short circuit situation among the fault detection circuit detection circuitry to when the bus takes place the short circuit condition, make corresponding processing. The opening and closing actions of the relay K1 are controlled by the detection control circuit, the detection control circuit judges whether the half bus short circuit occurs or not by measuring the voltage values of the two sides of the bus and the neutral line point, when the half bus short circuit fault is detected, the relay K1 is switched off, the overvoltage of the bus capacitor is avoided, the prevention of the overvoltage of the capacitor caused by the half bus short circuit is completed only by using a small number of components, and the safety of a circuit system is improved.
Description
Technical Field
The utility model relates to the technical field of circuit fault detection, in particular to a half-bus short-circuit fault detection circuit for a three-level inverter circuit.
Background
The inverter is a converter for converting direct current electric energy into constant frequency, constant voltage or alternating current with frequency and voltage regulation, consists of an inverter bridge, control logic and a filter circuit, and is widely applied to household or industrial appliances. Since photovoltaic power generation requires conversion of direct current into alternating current for use, an inverter is also present in photovoltaic power generation equipment, because of the influence of various factors such as the change of illumination intensity, the voltage generated by the photovoltaic panel in the photovoltaic power generation equipment is not stable, therefore, most of the pre-stage inverters or the combiner boxes of the inverters BOOST the input direct current by using the BOOST circuit and then invert the boosted direct current, the boosted direct current needs to be converted into alternating current by the T-type three-level inverter circuit, in the practical use of the inverter, because the IGBT in the inverter circuit needs to bear high voltage and be frequently switched, failure is easily caused, and when the IGBT fails, it will be in a continuous conducting state, in which case it may cause a phenomenon of half-bus short-circuiting, and the voltage of the direct current bus after boosting is higher, and once a short circuit occurs, the whole circuit is greatly damaged. When half bus short circuit, the generating line high pressure is directly received the electric capacity and the electrolytic capacitor of generating line for the electric capacity is excessive pressure, because generating line capacitance voltage is higher, in case the electric capacity overvoltage that connects, the electric capacity is very likely to explode, takes place electric arc burning even, causes the further deterioration of inverter trouble, causes serious consequence even.
SUMMERY OF THE UTILITY MODEL
The utility model aims to overcome the defects of the prior art and provide a half-bus short-circuit fault detection circuit which is applied to a three-level inverter circuit and can prevent the fault deterioration caused by the overvoltage of a capacitor caused by the short circuit of a bus.
The technical problem to be solved by the utility model is realized by adopting the following technical scheme:
a half bus short circuit fault detection circuit for a three-level inverter circuit comprises a fault detection circuit, wherein the fault detection circuit is connected with a BOOST circuit and the three-level inverter circuit, the BOOST circuit is used for boosting input direct current voltage, the three-level inverter circuit is used for converting the direct current into alternating current, and the fault detection circuit is used for detecting the short circuit condition of a bus;
the BOOST circuit comprises a photovoltaic cell PV1, a positive bus and a negative bus are connected to two ends of the photovoltaic cell PV1, a diode D1 and an inductor L1 are arranged on the positive bus, a capacitor C1 and a transistor T1 are connected between the positive bus and the negative bus, a capacitor C1 is connected with the transistor T1 in parallel, the capacitor C2 and the capacitor C3 are connected in series between the positive bus and the negative bus, the midpoint of a connecting line of the capacitor C2 and the capacitor C3 is set as a neutral point, and an extension line of the neutral point is a neutral line;
the three-level inverter circuit comprises three-phase inverter circuits arranged on a positive bus and a negative bus, the three phases of the three-phase inverter circuit have the same composition structure, wherein the R phase comprises a transistor V1, a transistor V2, a transistor V3 and a transistor V4, the transistor V1 and a transistor V4 are connected in series at two ends of the positive bus and the negative bus, the transistor V2 and the transistor V3 are connected in series and are connected in parallel with the transistor V1 or the transistor V4, a series connection of a capacitor C4 and a capacitor C5 is further connected between the positive bus and the negative bus, and the midpoint of a connecting line of the capacitor C4 and the capacitor C5 is set to be a neutral point which is on the neutral line;
the fault detection circuit comprises a detection control circuit, one end of the detection control circuit is connected with a positive bus, one end of the detection control circuit is connected with a negative bus, one end of the detection control circuit is connected with a neutral line, the detection control circuit is further connected with a relay K1, the relay K1 is arranged on the neutral line, one end of the relay K1 is connected with a neutral point of the BOOST booster circuit, and the other end of the relay K1 is connected with a transistor V2 of the three-level inverter circuit.
Preferably, the detection control circuit is a circuit for detecting the voltage of the bus, and the half-bus short circuit condition is judged by measuring the voltage values of the positive bus, the negative bus and the neutral line.
Preferably, the bus voltage at the intersection of the transistor V1 and the positive bus is VBUSThe withstand voltage values of the capacitor C2, the capacitor C3, the capacitor C4 and the capacitor C5 are Vcmax，VcmaxGreater than VBUSOne half of (a).
Preferably, a Test point Test1 is arranged on the positive bus, a Test point Test3 is arranged on the negative bus, a Test point Test2 is arranged on the neutral line, and the Test point Test1, the Test point Test2 and the Test point Test3 are connected with a voltage sampling circuit, wherein the voltage sampling circuit is used for obtaining a voltage value of a corresponding Test point.
Preferably, the Test point Test2 is located at the intersection of the detection control circuit and the neutral line.
Preferably, the detection control circuit determines that the threshold voltage of the half-bus short circuit is UM，UMGreater than VBUSOne half of (a).
Preferably, the threshold voltage UMIs 0.6VBUSTo 0.8VBUS。
The utility model has the advantages and positive effects that:
according to the utility model, the relay K1 is additionally arranged between the transistor V2 of the three-level inverter circuit and the bus capacitor, the relay K1 is connected with the detection control circuit, the opening and closing actions of the relay K1 are controlled by the detection control circuit, the detection control circuit judges whether the half-bus short circuit occurs or not by measuring the voltage values of the two sides of the bus and the neutral point, once the half-bus short circuit fault is detected, the relay K1 is controlled to be disconnected, the overvoltage of the bus capacitor is avoided, the whole circuit only uses a small number of components to complete the prevention of the capacitor overvoltage condition caused by the half-bus short circuit, the bus voltage is not influenced, the auxiliary power supply can normally work, and the safety of a circuit system is improved.
Drawings
Fig. 1 is a schematic circuit diagram of the present invention.
In the figure:
1. a BOOST voltage BOOST circuit; 2. a three-level inverter circuit; 3. a fault detection circuit.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When a component is referred to as being "connected" to another component, it can be directly connected to the other component or intervening components may also be present. When a component is referred to as being "disposed on" another component, it can be directly on the other component or intervening components may also be present. The terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the utility model herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the utility model. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
The embodiments of the utility model will be described in further detail below with reference to the accompanying drawings:
as shown in fig. 1, the half-bus short-circuit fault detection circuit for a three-level inverter circuit according to the present invention includes a fault detection circuit 3, the fault detection circuit 3 is connected to a BOOST voltage BOOST circuit 1 and a three-level inverter circuit 2, the BOOST voltage BOOST circuit 1 is configured to BOOST an input dc voltage, the three-level inverter circuit 2 is configured to convert a dc voltage into an ac voltage, the fault detection circuit 3 is configured to detect a short-circuit condition of a bus, the BOOST voltage BOOST circuit 1 BOOSTs the dc voltage of a photovoltaic panel and transmits the boosted dc voltage to the three-level inverter circuit 2 for inversion processing, and converts the dc voltage into an ac voltage, the fault detection circuit 3 detects a bus short-circuit condition in a circuit system, and performs corresponding processing when the bus short-circuit condition occurs, so as to prevent a more harmful accident.
The BOOST circuit 1, the three-level inverter circuit 2, and the fault detection circuit 3 will be further described below:
the BOOST circuit 1 comprises a photovoltaic cell PV1, a positive bus and a negative bus are connected to two ends of a photovoltaic cell PV1, a diode D1 and an inductor L1 are arranged on the positive bus, a capacitor C1 and a transistor T1 are connected between the positive bus and the negative bus, a capacitor C1 is connected with the transistor T1 in parallel, the capacitor C2 and the capacitor C3 are connected in series between the positive bus and the negative bus, the midpoint of a connecting line of the capacitor C2 and the capacitor C3 is set as a neutral point, and an extension line of the neutral point is the neutral line.
The three-level inverter circuit 2 comprises three-phase inverter circuits arranged on a positive bus and a negative bus, the three phases of the three-phase inverter circuits are identical in composition structure, wherein the R phase comprises a transistor V1, a transistor V2, a transistor V3 and a transistor V4, the transistor V1 and a transistor V4 are connected in series at two ends of the positive bus and the negative bus, a transistor V2 and a transistor V3 are connected in series and connected in parallel with the transistor V1 or the transistor V4, a capacitor C4 and a capacitor C5 are connected in series between the positive bus and the negative bus, and the midpoint of a connecting line of the capacitor C4 and the capacitor C5 is set to be a neutral point which is on the neutral line.
As shown in fig. 1, in this embodiment, when the transistor V1, the transistor V2 and the transistor V3 are damaged, the transistor V1, the transistor V2 and the transistor V3 form a path, at this time, the capacitor C2 and the capacitor C4 are bypassed, the capacitor C3 and the capacitor C5 directly bear the bus voltage, the capacitor C3 and the capacitor C5 generate overvoltage, which causes the capacitor to be damaged, and similarly, when the transistor V2, the transistor V3 and the transistor V4 are damaged, the capacitor C2 and the capacitor C4 generate overvoltage, which causes the damage, so the relay K1 is provided on the neutral line, and when the detection control circuit detects that the voltages on the capacitor C2, the capacitor C3, the capacitor C4 and the capacitor C5 exceed the threshold voltages, it is determined that the bus is shorted, and when the bus short occurs, the relay K1 is controlled to be disconnected, so as to protect the capacitor.
The fault detection circuit 3 comprises a detection control circuit, one end of the detection control circuit is connected with a positive bus, one end of the detection control circuit is connected with a negative bus, one end of the detection control circuit is connected with a neutral line, the detection control circuit is further connected with a relay K1, the relay K1 is arranged on the neutral line, one end of the relay K1 is connected with a neutral point of the BOOST booster circuit 1, the other end of the relay K1 is connected with a transistor V2 of the three-level inverter circuit 2, the on and off of the relay K1 are controlled and operated by the detection control circuit, the detection control circuit is a circuit for detecting the bus voltage, the half-bus short-circuit condition is judged by measuring the voltage values of the positive bus, the negative bus and the neutral line, the detection control circuit adopts a circuit for detecting the bus voltage in the prior art, the detection control circuit does not belong to the technical point of the scheme, but belongs to the protection point, the constitution of the internal devices is not repeated, when the detection control circuit detects that the half-bus short-short circuit occurs, the relay K1 is controlled to open to avoid overvoltage on the bus capacitor C1 and to send a fault signal to the external master control circuit to which it is connected.
The detection control circuit judges that the threshold voltage of the half-bus short circuit is UMSince the capacitance parameters of C2, C3, C4 and C5 may change after long-term use to cause voltage unbalance, U is adoptedMGreater than VBUSIs usually about half of the threshold voltage UMIs set to 0.6VBUSTo 0.8VBUSIn the meantime.
The bus voltage at the intersection of transistor V1 and the positive bus is VBUSThe withstand voltage values of the capacitor C2, the capacitor C3, the capacitor C4 and the capacitor C5 are Vcmax，VcmaxGreater than VBUSOne half of (a).
A Test point Test1 is arranged on the positive bus, a Test point Test3 is arranged on the negative bus, a Test point Test2 is arranged on the neutral line, a voltage sampling circuit is connected to the Test point Test1, the Test point Test2 and the Test point Test3 and used for obtaining the voltage value of the corresponding Test point, a Test point Test2 is located at the intersection point of the detection control circuit and the neutral line, the voltage sampling circuit adopts a resistance voltage division network to obtain the required sampling voltage, the voltage at the point is input into an external DSP after AD conversion, and the DSP judges that U1= UTest1-UTest2、U2=UTest2-UTest3Whether half-bus short circuit occurs is judged according to the size of the voltage, when U1>UMOr U2>UMTime-judging hairAnd the half bus is short-circuited.
In specific implementation, the detection control circuit detects the short circuit condition on the bus, if the short circuit occurs, the relay K1 is controlled to be switched off, and because the characteristics of the components adopted by the capacitor C2 and the capacitor C3, the capacitor C4 and the capacitor C5 are the same, the voltage at two ends of the capacitors is 1/2VBUS. To ensure the safety of the relay K1, the transistors V1, V2, V3 and V4 should be signaled to turn off after the relay K1 is turned on.
According to the utility model, the relay K1 is additionally arranged between the transistor V2 of the three-level inverter circuit 2 and the bus capacitor, the relay K1 is connected with the detection control circuit, the opening and closing actions of the relay K1 are controlled by the detection control circuit, the detection control circuit judges whether half-bus short circuit occurs or not by measuring the voltage values of two sides of the bus and a neutral line point, once half-bus short circuit fault is detected, the relay K1 is controlled to be disconnected, overvoltage of the bus capacitor is avoided, the whole circuit can prevent the capacitor overvoltage condition caused by the half-bus short circuit by using a small number of components, the bus voltage is not influenced, an auxiliary power supply can normally work, and the safety of a circuit system is improved.
It should be emphasized that the embodiments described herein are illustrative rather than restrictive, and thus the present invention is not limited to the embodiments described in the detailed description, but other embodiments derived from the technical solutions of the present invention by those skilled in the art are also within the scope of the present invention.
Claims (7)
1. A half-bus short-circuit fault detection circuit for a three-level inverter circuit is characterized in that: the bus fault detection circuit comprises a fault detection circuit (3), wherein the fault detection circuit (3) is connected with a BOOST circuit (1) and a three-level inverter circuit (2), the BOOST circuit (1) is used for boosting input direct-current voltage, the three-level inverter circuit (2) is used for converting direct current into alternating current, and the fault detection circuit (3) is used for detecting the short-circuit condition of a bus;
the BOOST circuit (1) comprises a photovoltaic cell PV1, a positive bus and a negative bus are connected to two ends of a photovoltaic cell PV1, a diode D1 and an inductor L1 are arranged on the positive bus, a capacitor C1 and a transistor T1 are connected between the positive bus and the negative bus, a capacitor C1 and a transistor T1 are connected in parallel, the capacitor C2 and a capacitor C3 are connected in series between the positive bus and the negative bus, the midpoint of a connecting line of the capacitor C2 and the capacitor C3 is set as a neutral point, and an extension line of the neutral point is a neutral line;
the three-level inverter circuit (2) comprises three-phase inverter circuits arranged on a positive bus and a negative bus, the three-phase inverter circuits have the same composition structure, wherein the R phase comprises a transistor V1, a transistor V2, a transistor V3 and a transistor V4, the transistor V1 and a transistor V4 are connected in series at two ends of the positive bus and the negative bus, the transistor V2 and the transistor V3 are connected in series and are connected in parallel with the transistor V1 or the transistor V4, a capacitor C4 and a capacitor C5 are connected in series between the positive bus and the negative bus, and the midpoint of a connecting line of the capacitor C4 and the capacitor C5 is set as a neutral point which is on the neutral line;
the fault detection circuit (3) comprises a detection control circuit, one end of the detection control circuit is connected with a positive bus, one end of the detection control circuit is connected with a negative bus, one end of the detection control circuit is connected with a neutral line, the detection control circuit is further connected with a relay K1, the relay K1 is arranged on the neutral line, one end of the relay K1 is connected with a neutral point of the BOOST circuit (1), and the other end of the relay K1 is connected with a transistor V2 of the three-level inverter circuit (2).
2. The half-bus short-circuit fault detection circuit for the three-level inverter circuit according to claim 1, wherein: the detection control circuit is used for detecting the voltage of the bus, and the short circuit condition of the half bus is judged by measuring the voltage values of the positive bus, the negative bus and the neutral line.
3. The half-bus short-circuit fault detection circuit for the three-level inverter circuit according to claim 1, wherein: the bus voltage at the intersection point of the transistor V1 and the positive bus is VBUSThe withstand voltage values of the capacitor C2, the capacitor C3, the capacitor C4 and the capacitor C5 are Vcmax，VcmaxGreater than VBUSOne half of (a).
4. The half-bus short-circuit fault detection circuit for the three-level inverter circuit according to claim 1, wherein: the positive bus is provided with a Test point Test1, the negative bus is provided with a Test point Test3, the neutral line is provided with a Test point Test2, the Test point Test1, the Test point Test2 and the Test point Test3 are connected with a voltage sampling circuit, and the voltage sampling circuit is used for obtaining the voltage value of the corresponding Test point.
5. The half-bus short-circuit fault detection circuit for the three-level inverter circuit according to claim 4, wherein: the Test point Test2 is located at the intersection of the detection control circuit and the neutral line.
6. The half-bus short-circuit fault detection circuit for the three-level inverter circuit according to claim 3, wherein: the detection control circuit judges that the threshold voltage of the half-bus short circuit is UM，UMGreater than VBUSOne half of (a).
7. The half-bus short-circuit fault detection circuit for the three-level inverter circuit according to claim 6, wherein: the threshold voltage UMIs 0.6VBUSTo 0.8VBUS。
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122261420.3U CN216248274U (en) | 2021-09-17 | 2021-09-17 | Half-bus short-circuit fault detection circuit for three-level inverter circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122261420.3U CN216248274U (en) | 2021-09-17 | 2021-09-17 | Half-bus short-circuit fault detection circuit for three-level inverter circuit |
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| CN216248274U true CN216248274U (en) | 2022-04-08 |
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| CN202122261420.3U Active CN216248274U (en) | 2021-09-17 | 2021-09-17 | Half-bus short-circuit fault detection circuit for three-level inverter circuit |
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