CN216146485U - Microwave generator of phase control system and frequency source chip thereof - Google Patents
Microwave generator of phase control system and frequency source chip thereof Download PDFInfo
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Abstract
The application is applicable to the technical field of microwaves and provides a microwave generating device with a phase control system and a frequency source chip thereof. The frequency source chip includes: the power divider comprises a signal generating unit, a numerical control attenuator, a power divider and a plurality of processing circuits, wherein the signal generating unit, the numerical control attenuator and the power divider are sequentially connected; the signal generating unit is used for generating a first power signal, the numerical control attenuator is used for carrying out first attenuation processing on the first power signal to obtain a second power signal, and the power divider is used for dividing the second power signal into a plurality of paths of power signals which correspond to the processing circuits one to one; each processing circuit in the multiple processing circuits is used for performing phase shift processing and second attenuation processing on the power signal transmitted by the power divider. The method and the device can accurately control the output power of the frequency source chip.
Description
Technical Field
The application belongs to the technical field of microwaves, and particularly relates to a microwave generating device of a phase control system and a frequency source chip thereof.
Background
The microwave oven is widely applied to the fields of microwave heating, drying and the like. Most of the traditional microwave ovens in the application of industrial microwave heating and drying adopt a magnetron as a microwave source, the working frequency of the traditional microwave oven mainly adopts 915MHz +/-15 MHz, and the whole power of the microwave oven is within the range of 10W-10 kW.
However, the magnetron needs a high-voltage device when working, the output power of the microwave oven adopting the magnetron depends on the anode voltage under the high-voltage condition, the control precision of the output power is poor, and the working frequency is fixed and unadjustable.
SUMMERY OF THE UTILITY MODEL
In view of this, the present application provides a microwave generating apparatus applied to a phase control system of microwave heating and a frequency source chip thereof, which can improve the control accuracy of the output power of the frequency source.
In order to achieve the purpose, the technical scheme is as follows:
in a first aspect, an embodiment of the present application provides a frequency source chip, which is applied to a microwave generating device, where the frequency source chip includes: the power divider comprises a signal generating unit, a numerical control attenuator, a power divider and a plurality of processing circuits, wherein the signal generating unit, the numerical control attenuator and the power divider are sequentially connected;
the signal generating unit is used for generating a first power signal, the numerical control attenuator is used for performing first attenuation processing on the first power signal to obtain a second power signal, and the power divider is used for dividing the second power signal into multiple paths of power signals which correspond to the processing circuits one to one; each processing circuit in the multiple processing circuits is used for performing phase shift processing and second attenuation processing on the power signal transmitted by the power divider.
In the embodiment of the application, the signal generating unit can generate a first power signal with a preset frequency, and the numerical control attenuator performs first attenuation processing on the first power signal to obtain a second power signal. And then, the power divider divides the second power signal into a plurality of paths of power signals which correspond to the plurality of processing circuits one by one. Each processing circuit performs phase shift processing and second attenuation processing on the power signal transmitted by the power divider. The output power of the frequency source chip can be adjusted through the first attenuation treatment and the second attenuation treatment, the phase of the power signal can be adjusted through the phase shifting treatment, and the signal generation unit can control the frequency of the first power signal, so that the output power of the frequency source chip can be accurately controlled.
Based on the first aspect, in some embodiments, the attenuation accuracy of the first attenuation process is different from the attenuation accuracy of the second attenuation process. For example, the attenuation accuracy of the first attenuation process is smaller than that of the second attenuation process.
For example, the attenuation accuracy of the first attenuation process may be smaller than that of the second attenuation process, or the attenuation accuracy of the first attenuation process may be larger than that of the second attenuation process. For example, the first attenuation process is to perform desaturation attenuation on the power signal, and the second attenuation process is to perform more precise attenuation after performing depreciation and attenuation on the power signal.
Specifically, the first attenuation process may be a numerical control attenuator that performs a large-amplitude attenuation (which may also be a coarse attenuation) on the signal, and the second attenuation process may be a small-amplitude attenuation (which may also be a precise attenuation) on the signal. The signal is firstly attenuated to gain unsaturation through the numerical control attenuator, and then the signal is attenuated to a set value through second attenuation processing.
It is understood that the signal gain is linear to a certain degree, but when the signal gain is increased to a certain degree, the signal gain tends to be saturated or even decreased. Therefore, the digital control attenuator can be used to attenuate the signal to the set value before saturation (i.e. the desaturation attenuation), and then the second attenuation process with higher precision is performed to attenuate the signal to the set value, so that the attenuation precision and efficiency can be improved.
Based on the first aspect, in some embodiments, each of the processing circuits includes a digital phase shifter and an electrically tunable attenuator;
the digital phase shifter is used for performing phase shifting processing on the power signal transmitted by the power divider, and the electrically adjustable attenuator is used for performing second attenuation processing on the power signal subjected to the phase shifting processing; alternatively, the first and second electrodes may be,
the electrically-adjustable attenuator is used for performing the second attenuation processing on the power signal transmitted by the power divider, and the digital phase shifter is used for performing the phase shift processing on the power signal subjected to the second attenuation processing.
Based on the first aspect, in some embodiments, each processing circuit further includes a channel switch for controlling on/off of the processing circuit.
In each working period of the microwave generating device, the channel switch is firstly switched off, and after the signal generating unit, the numerical control attenuator, the digital phase shifter and the electrically-tuned attenuator determine working parameters, the channel switch is switched on, and the frequency source chip outputs signals. When the next working period comes, the channel switch is switched off, and after the signal generation unit, the numerical control attenuator, the digital phase shifter and the electrically-adjusted attenuator re-determine the working parameters, the channel switch is switched on, and the frequency source chip outputs signals.
Based on the first aspect, in some embodiments, each of the processing circuits further includes a second amplifying unit, and the second amplifying unit is configured to amplify the power signal after the second attenuation processing.
Wherein the second amplifying unit may include one or more power amplifiers. After the second attenuation processing is performed on the signal, the power of the signal is usually low, and at this time, the signal needs to be amplified by a certain multiple to meet the power of the output signal of the frequency source chip.
Based on the first aspect, in some embodiments, the frequency source chip is further provided with a first interface, the first interface is respectively connected with the signal generation unit, the digitally controlled attenuator and each processing circuit, and the first interface is further configured to be connected with an external processor; and the frequency source chip receives an instruction sent by the external processor through the first interface. Such as a frequency modulation command, a first attenuation command, a phase shift command, a second attenuation command, and a channel switch command.
The signal generating unit executes the frequency modulation instruction to adjust the frequency of the first power signal, the numerical control attenuator executes the first attenuation processing on the first power signal according to the first attenuation instruction, the digital phase shifter of each processing circuit performs the phase shift processing on the power signal transmitted by the power divider according to the phase shift instruction, the electric tuning attenuator of each processing circuit performs the second attenuation processing on the power signal transmitted by the power divider according to the second attenuation instruction, and the channel switch of each processing circuit executes the channel switch instruction to control the on-off of each processing circuit.
Based on the first aspect, in some embodiments, the frequency source chip is further provided with a crystal oscillator interface, the crystal oscillator interface is connected with the signal generation unit, and the crystal oscillator interface is further configured to be connected with an external crystal oscillator.
Based on the first aspect, in some embodiments, the frequency source chip is further provided with a power interface, and the power interface can be connected with an external power supply to supply power to the signal generation unit, the numerical control attenuator, the power divider, the digital phase shifter, the electrically tunable attenuator, and the channel switch.
According to the first aspect, in some embodiments, each of the processing circuits corresponds to a phase shift process and a second attenuation process, and the phase shift processes are the same or different from each other, and the second attenuation processes are the same or different from each other.
For example, in each operating cycle of the microwave generating device, each processing circuit corresponds to one digital phase shifter and one electrically tunable attenuator, the phase shifting processing of each digital phase shifter on a signal may be the same or different, and the second attenuation processing of each electrically tunable attenuator on a signal may be the same or different. For example, in one working period, the phase shift angle of each digital phase shifter to the signal is different, and the attenuation degree of each electrically-adjusted attenuator to the signal is different.
Based on the first aspect, in some embodiments, the frequency source chip further includes a first amplifying unit, where the first amplifying unit is disposed between the digitally controlled attenuator and the power divider, and the digitally controlled attenuator is connected to the power divider through the first amplifying unit.
Wherein the first amplifying unit may include one or more power amplifiers. After the first attenuation processing is performed on the signal, the power of the signal is usually low, and at this time, the signal needs to be amplified by a certain multiple to meet the power of the output signal of the frequency source chip.
A second aspect of the embodiments of the present application provides a microwave generating apparatus with a phase-control system, including the frequency source chip according to any one of the first aspect.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic circuit diagram of a frequency source chip according to an embodiment of the present disclosure.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
To make the objects, technical solutions and advantages of the present application more clear, the following description is made by way of specific embodiments with reference to the accompanying drawings.
The following describes a frequency source chip provided in an embodiment of the present application, taking two processing circuits as an example.
Fig. 1 shows a schematic structural diagram of a frequency source chip provided in an embodiment of the present application. Referring to fig. 1, the frequency source chip 110 may include: the signal generating unit 1111, the digital controlled attenuator 1112, the first power amplifier 1113, the power divider 1114, the first digital phase shifter 1115, the first electrical modulation attenuator 1116, the second digital phase shifter 1117 and the second electrical modulation attenuator 1118.
The signal generating unit 1111, the digitally controlled attenuator 1112, the first power amplifier 1113, and the power divider 1114 are connected in sequence. The first digital phase shifter 1115 is connected to the first electrically tunable attenuator 1116 to form a first processing circuit. The output of the power divider 1114 is connected to the input of a first digital phase shifter 1115. The second digital phase shifter 1117 is connected to the second electrically tunable attenuator 1118 to form a second processing circuit. The output of the power divider 1114 is also connected to an input of a second digital phase shifter 1117.
The frequency source chip in this embodiment has a first frequency source channel and a second frequency source channel, and can output two paths of signals through the first frequency source channel and the second frequency source channel.
Specifically, the signal generation unit 1111, the digitally controlled attenuator 1112, the first power amplifier 1113, the power divider 1114, the first digital phase shifter 1115, and the first electrically tunable attenuator 1116 constitute a first frequency source channel (channel 1 shown in fig. 1).
The signal generation unit 1111, the digitally controlled attenuator 1112, the first power amplifier 1113, the power divider 1114, the second digital phase shifter 1117, and the second electrically controlled attenuator 1118 form a second frequency source channel (channel 2 shown in fig. 1).
The first output end of the power divider 1114 is connected to the input end of the first digital phase shifter 1115, and the output end of the first digital phase shifter 1115 is connected to the input end of the first electrically tunable attenuator 1116. The output terminal of the first electrically tunable attenuator 1116 is connected to the first output terminal of the frequency source chip 110.
A second output end of the power divider 1114 is connected to an input end of the second digital phase shifter 1117, and an output end of the second digital phase shifter 1117 is connected to an input end of the second electrically tunable attenuator 1118. The output end of the second electrically tunable attenuator 1118 is connected to the second output end of the frequency source chip 110.
Referring to fig. 1, the frequency source chip 110 may further be provided with an SPI (Serial Peripheral Interface) Interface and a voltage-regulated damping (VT) Interface. The first SPI interface is connected to the signal generating unit 1111, and the VT interface is connected to the first electrically tunable attenuator 1116 and the second electrically tunable attenuator 1118.
In this embodiment, the SPI interface and the VT interface are both used for connecting to an external microprocessor. The external microprocessor may send a control command to the signal generation unit 1111, the digital control attenuator 1112, the first digital phase shifter 1115, and the second digital phase shifter 1117 through the first SPI interface, and control the frequency, phase, and power of the output signal of the frequency source chip 110. An external microprocessor may send a control instruction to first electrically tunable attenuator 1116 and second electrically tunable attenuator 1118 through a VT interface, and control first electrically tunable attenuator 1116 and/or second electrically tunable attenuator 1118.
Specifically, the frequency source chip 110 receives a frequency modulation command, a first attenuation command, a phase shift command, and a second attenuation command sent by an external processor through the SPI interface and the VT interface. The signal generating unit 1111 executes a frequency modulation command to adjust the frequency of the first power signal. Digitally controlled attenuator 1112 performs a first attenuation process on the first power signal in accordance with the first attenuation instruction. The first digital phase shifter 1115 and the second digital phase shifter 1117 perform phase shift processing on the received signal according to the phase shift instruction, respectively. The first electrically tunable attenuator 1116 and the second electrically tunable attenuator 1118 perform a second attenuation process on the received signal according to the second attenuation instruction.
The control instructions sent by the external microprocessor to the signal generation unit 1111, the digitally controlled attenuator 1112, the first digital phase shifter 1115 and the second digital phase shifter 1117 may be transmitted to the SPI interface in the form of MISO (master-receive-slave-transmit) signal, MOSI (master-receive-slave-receive) signal, SCLK (internal system clock) signal and SSN (enable) signal.
In addition, the frequency source chip 110 may further include a crystal oscillator interface and a power interface. The frequency source chip 110 may be connected to an external crystal oscillator through a crystal oscillator interface, where the external crystal oscillator may be a 16MHz chip oscillator for industrial use. The frequency source chip 110 may be connected to an external power source through a power interface, and an LDO (low dropout regulator) may be built in the frequency source chip 110. The LDO can convert an external power supply to 3.3V or 5V to supply power to various parts in the frequency source chip 110.
The input end of the signal generating unit 1111 is connected to an external crystal oscillator through a crystal oscillator interface, and the output end of the signal generating unit 1111 is connected to the input end of the digital control attenuator 1112. The output end of the digitally controlled attenuator 1112 is connected to the input end of the power divider 1114 through a second power amplifier 1113.
Illustratively, the parameters of the digitally controlled attenuator 1112 are as follows: the attenuation range is 0-30 dB, the stepping is 1dB, and the attenuation precision is +/-0.5 dB. The parameters of the first electrically tunable attenuator 1116 and the second electrically tunable attenuator 1118 are as follows: the attenuation range is 0-30 dB, the continuous adjustable effect is achieved, and the working voltage is 0-3.3V. The parameters of the first digital phase shifter 1115 and the second digital phase shifter 1117 are as follows: 0-360 degrees, 1.4 degrees of stepping and less than or equal to 2 degrees of phase shifting precision.
In the embodiment of the present application, the working frequency of the frequency source chip 110 may be 915MHz ± 15MHz, 2450MHz ± 50MHz, 433MHz, or other frequencies, which is not limited herein. The power of the microwave oven to which the frequency source chip 110 of the embodiment of the present application is applied may be 10W to 1 KW.
In some embodiments, the frequency source chip 110 may further include a first channel switch, a second power amplifier, a second channel switch, and a third power amplifier. The first digital phase shifter 1115, the first electrically tunable attenuator 1116, the first channel switch, and the second power amplifier are connected in sequence to form a first processing circuit. The second digital phase shifter 1117, the second electrically-tunable attenuator 1118, the second channel switch and the third power amplifier are connected in sequence to form a second processing circuit.
The signal generating unit 1111, the digital control attenuator 1112, the first power amplifier 1113, the power divider 1114, the first digital phase shifter 1115, the first electrically tunable attenuator 1116, the first channel switch, and the second power amplifier form a first frequency source channel. The output end of the first electrically tunable attenuator 1116 is connected to the input end of the second power amplifier through the first channel switch, and the output end of the second power amplifier is connected to the first output end of the frequency source chip 10.
The signal generating unit 1111, the digitally controlled attenuator 1112, the first power amplifier 1113, the power divider 1114, the second digital phase shifter 1117, the second electrically controlled attenuator 1118, the second channel switch, and the third power amplifier form a second frequency source channel. The output end of the second electrically tunable attenuator 1118 is connected to the input end of the third power amplifier through the second channel switch, and the output end of the third power amplifier is connected to the second output end of the power source chip 110.
In this embodiment, the first power amplifier 1113 is a first amplifying unit of the frequency source chip 110, and the second power amplifier and the third power amplifier are second amplifying units of two processing circuits of the frequency source chip 110, respectively.
Optionally, the frequency source chip 110 may further be provided with a channel switch (LVTTL) interface, and the LVTTL interface is connected to the first channel switch and the second channel switch. The LVTTL interface is used for being connected with an external microprocessor. And the external microprocessor can send control instructions to the first channel switch and the second channel switch through the LVTTL interface to control the opening and closing of the first channel switch and/or the second channel switch.
The frequency source chip 110 receives a channel switch instruction sent by an external processor through the LVTTL interface, and the first channel switch and the second channel switch respectively execute the channel switch instruction to control on/off of the respective frequency source channel.
The parameters of the first channel switch and the second channel switch are as follows: the degree of turn-off is 60dB, and the response time is within 150 ms.
It should be noted that the circuit structure shown in fig. 1 is only one example of the frequency source chip 110, and the embodiment of the present application is not limited thereto.
In some embodiments, the frequency source chip 110 may have three or more processing circuits.
In some embodiments, the positional relationship of first digital phase shifter 1115, first electrically tunable attenuator 1116, and first channel 1117 may vary. For example, the power divider 1114 is sequentially connected to the first electrically tunable attenuator 1116, the first digital phase shifter 1115, and the first channel switch. For another example, the power divider 1114 is sequentially connected to the first channel switch, the first digital phase shifter 1115, and the first electrically tunable attenuator 1116. The second power amplifier is located behind the first electrically tunable attenuator 1116, and may amplify the attenuated signal.
The embodiment of the application also provides a microwave generating device of the phase control system, which comprises any one of the frequency source chips and has the beneficial effects of the frequency source chip. The phase control system is a microwave generating device, has a phase shifting function and can control the phase of a microwave signal.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.
Claims (10)
1. A frequency source chip applied to a microwave generating device, the frequency source chip comprising: the power divider comprises a signal generating unit, a numerical control attenuator, a power divider and a plurality of processing circuits, wherein the signal generating unit, the numerical control attenuator and the power divider are sequentially connected;
the signal generating unit is used for generating a first power signal with a preset frequency, the numerical control attenuator is used for performing first attenuation processing on the first power signal to obtain a second power signal, and the power divider is used for dividing the second power signal into multiple paths of power signals which are in one-to-one correspondence with the processing circuits; each processing circuit in the plurality of processing circuits is configured to perform phase shift processing and second attenuation processing on the power signal transmitted by the power divider.
2. The frequency source chip of claim 1, wherein each of the processing circuits comprises a digital phase shifter and an electrically tunable attenuator;
the digital phase shifter is used for performing phase shifting processing on the power signal transmitted by the power divider, and the electrically adjustable attenuator is used for performing second attenuation processing on the power signal subjected to the phase shifting processing; alternatively, the first and second electrodes may be,
the electrically-adjustable attenuator is used for performing the second attenuation processing on the power signal transmitted by the power divider, and the digital phase shifter is used for performing the phase shift processing on the power signal subjected to the second attenuation processing.
3. The frequency source chip of claim 2, wherein each of the processing circuits further comprises a channel switch for controlling the on/off of the processing circuit.
4. The frequency source chip according to claim 2 or 3, wherein each of the processing circuits further comprises a second amplifying unit, and the second amplifying unit is configured to amplify the power signal after the second attenuation processing.
5. The frequency source chip according to claim 3, wherein the frequency source chip is further provided with a first interface, the first interface is respectively connected with the signal generating unit, the numerical control attenuator and each processing circuit, and the first interface is further used for being connected with an external processor; and the frequency source chip receives an instruction sent by the external processor through the first interface.
6. The frequency source chip according to claim 5, wherein the frequency source chip is further provided with a crystal oscillator interface, the crystal oscillator interface is connected to the signal generating unit, and the crystal oscillator interface is further configured to be connected to an external crystal oscillator.
7. The frequency source chip according to claim 5, wherein the frequency source chip is further provided with a power interface, and the power interface is capable of being connected with an external power supply to supply power to the signal generating unit, the digital control attenuator, the power divider, the digital phase shifter, the electrically tunable attenuator, and the channel switch.
8. The frequency source chip according to claim 7, wherein a low dropout regulator is further built in the frequency source chip, the power interface is connected to the low dropout regulator, and the low dropout regulator converts an external power supply into 3.3V or 5V to supply power to the signal generation unit, the numerical control attenuator, the power divider, the digital phase shifter, the electrical tuning attenuator, and the channel switch.
9. The frequency source chip according to claim 1, further comprising a first amplifying unit, wherein the first amplifying unit is disposed between the digitally controlled attenuator and the power divider, and the digitally controlled attenuator is connected to the power divider through the first amplifying unit.
10. A microwave generating apparatus of a phase control system, comprising the frequency source chip according to any one of claims 1 to 9.
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| CN113573433A (en) * | 2021-05-24 | 2021-10-29 | 中国电子科技集团公司第十三研究所 | Microwave generator of phase control system and programmable control frequency source chip thereof |
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| CN113573433A (en) * | 2021-05-24 | 2021-10-29 | 中国电子科技集团公司第十三研究所 | Microwave generator of phase control system and programmable control frequency source chip thereof |
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