CN216133324U

CN216133324U - Wireless input module

Info

Publication number: CN216133324U
Application number: CN202120920856.6U
Authority: CN
Inventors: 王涛; 叶恭良
Original assignee: Zhejiang Jugan Internet Of Things Technology Co ltd; Fire Rescue Corps Of Tibet Autonomous Region
Current assignee: Zhejiang Jugan Internet Of Things Technology Co ltd; Fire Rescue Corps Of Tibet Autonomous Region
Priority date: 2021-04-25
Filing date: 2021-04-25
Publication date: 2022-03-25
Anticipated expiration: 2031-04-25

Abstract

The utility model discloses a wireless input module, which comprises a power supply, an MCU circuit, a booster circuit and a display circuit, wherein the power supply is 3.6V direct current, and the MCU circuit is used for transmitting data through an LORA protocol; the booster circuit is connected with a power supply and used for boosting the power supply voltage and providing voltage for the module, the display circuit is used for displaying monitoring data received by the MCU circuit, the technical scheme is adopted, the technology is reasonable, a wireless fire fighting system is realized, under the condition that communication messages are not additionally added, the heartbeat sending time of nodes in a network tends to be discretized, the phenomenon of packet loss can not occur, monitoring signals can be accurately received, alarm signals can be timely sent out, fire can be timely prevented, in addition, compared with a traditional wired fire fighting system, the wireless input module is powered by a battery, and the wireless advantages and the significance are fully embodied. And the installation position can be dispersed, can install wantonly as required.

Description

Wireless input module

Technical Field

The utility model relates to the technical field of fire safety, in particular to a wireless input module.

Background

The smoke sensing system is generally used in workshops, markets or households to prevent fires and send out alarm signals in time, so that property loss and personal injury are reduced as much as possible. At present, most of the fire fighting systems in the market are traditional wired fire fighting systems, and the fire fighting systems have the problems of long construction time, difficult line maintenance, high reconstruction cost and the like. Therefore, a small number of wireless fire fighting systems are gradually appeared in the market, and especially in places with dense population such as shopping malls, the transmission of wireless signals is easily interfered by external signals. Finally, the state of false alarm or delayed alarm occurs.

SUMMERY OF THE UTILITY MODEL

According to the defects of the prior art, the utility model provides the wireless input module which can accurately receive the monitoring signal and send out the alarm signal in time, so that the fire can be prevented in time.

In order to solve the technical problems, the technical scheme of the utility model is as follows:

a wireless input module comprises a power supply, an MCU circuit, a booster circuit and a display circuit, wherein the power supply is 3.6V direct current, and the MCU circuit is used for transmitting data through an LORA protocol; the boost circuit is connected with a power supply and used for boosting the power supply voltage and providing voltage for the module, the display circuit is used for displaying monitoring data received by the MCU circuit, the MCU circuit comprises a main chip M1, a first interface J3, a first resistor R1, a second resistor R2, a first capacitor C12, a second capacitor C13, a third capacitor C16, a fourth capacitor C17, a fifth capacitor C18, a sixth capacitor C19, a signal transceiver and a rheostat D1, a first pin of the first interface J59642 is connected with the power supply and respectively connected with one ends of the first resistor R1 and the second resistor R2, the other end of the first resistor R1 is connected with a data receiving end of the main chip M1, the other end of the second resistor R2 is connected with a data transmitting end of the main chip M1, a third pin of the first interface J3 is connected with a data receiving end of the main chip M1, a first interface J3 is connected with a data transmitting end of the main chip M57324, the first capacitor C12, the second capacitor C13 and the sixth capacitor C19 are connected in parallel, after being connected in parallel, one end of each of the first capacitor C12, the second capacitor C13 and the sixth capacitor C19 is connected with a VDD pin of the main chip M1, the other end of each of the first capacitor C13 and the sixth capacitor C1 is connected to ground, a radio frequency pin of the main chip M1 is connected with one end of a third capacitor C16 and one end of a fourth capacitor C17, the other end of the fourth capacitor C17 is connected to ground, the other end of the third capacitor C16 is connected with one end of a fifth capacitor C18, the other end of the fifth capacitor C18 is connected to ground, the other end of the third capacitor C16 is connected with one end of a rheostat D1, the other end of the rheostat D1 is connected to ground, the other end of the third capacitor C16 is connected with one end of a signal transceiver, and the other end of the signal transceiver is connected to ground.

Preferably, the sixth capacitor C19 is a polar capacitor, and the positive electrode of the sixth capacitor C19 is connected to a power supply.

Preferably, the MCU circuit further includes a reset circuit, the reset circuit includes a second interface J2 and a seventh capacitor C11, a first pin of the second interface J2 is connected to a power supply, a third pin of the second interface J2 is connected to a SWIM reset pin of the main chip MI, a fourth pin of the second interface J2 is connected to an NRST reset pin of the main chip MI, one end of the seventh capacitor C11 is connected to the NRST reset pin of the main chip MI, and the other end of the seventh capacitor C11 is grounded.

Preferably, the MCU circuit further includes a communication test circuit, the communication test circuit includes an eighth capacitor C14, a ninth capacitor C15, a third resistor R27, a fourth resistor R28 and a switch SW2, one end of each of the third resistor R27 and the fourth resistor R28 is connected to one end of the switch SW2, the other end of the switch SW2 is grounded, the other end of the third resistor R27 is connected to the power supply, the other end of the fourth resistor R28 is connected to the forty-fifth pin of the main chip M1, one end of each of the eighth capacitor C14 and the ninth capacitor C15 is connected to the forty-fifth pin of the main chip M1, and the other end of each of the eighth capacitor C14 and the ninth capacitor C15 is grounded.

Preferably, the boost circuit includes a boost chip U3, a fifth resistor R12, a sixth resistor R13, a seventh resistor R14, an eighth resistor R15, a ninth resistor R16, a tenth resistor R17, an eleventh resistor R18, a first fet Q3, a second fet Q4, a first inductor L1, a schottky diode D3, a tenth capacitor C7, and an eleventh capacitor C8, the input pin of the boost chip U3 is connected to the source of the first fet Q3, the source of the first fet Q3 is connected to one end of a tenth capacitor C7, the other end of the tenth capacitor C7 is grounded, the drain of the first fet Q3 is connected to the power supply, the gate of the first fet Q3 is connected to one end of the fifth resistor R12 and the drain of the sixth resistor R12, the other end of the fifth resistor R12 is connected to the power supply, the other end of the sixth resistor R12 is connected to the drain of the second fet Q12, the source of the second field-effect transistor Q4 is connected to power, the gate of the second field-effect transistor Q4 is connected to one end of a ninth resistor R16, the other end of the ninth resistor R16 outputs a first boost voltage and is connected to the forty-fourth pin of the main chip M1, the output pin of the boost chip U3 is connected to one end of a tenth resistor R17, the other end of the tenth resistor R17 is connected to the other end of the ninth resistor R16 and one end of the eleventh resistor R18, the other end of the eleventh resistor R18 is grounded, the conversion pin of the boost chip U3 is connected to one end of a first inductor L1 and the anode of a schottky diode D3, the other end of the first inductor L1 is connected to the input pin of the boost chip U3, the cathode of the schottky diode D3 outputs a second boost voltage, and the feedback pin of the boost chip U3 is connected to the seventh resistor R14, the seventh resistor R4, the seventh resistor R14, the seventh resistor R16, the fourth pin, the eleventh resistor R17, the eleventh resistor R3624, the eleventh resistor R18, the eleventh resistor R3624, and the eleventh resistor R3624, the eleventh resistor R18, the eleventh resistor R3624, the eleventh resistor, and the eleventh resistor R3624, and the eleventh resistor R18, the eleventh resistor R3624, and the fourth resistor R18, and the fourth resistor R3624 are connected to the fourth resistor R3624, and the fourth resistor R18, and the fourth resistor R3624, and the fourth resistor R3, and the fourth resistor R3624, and the fourth resistor R3, and the fourth resistor R3624, respectively, One end of an eighth resistor R15 is connected, the other end of the seventh resistor R14 is grounded, the other end of the eighth resistor R15 is connected to the cathode of the schottky diode D3 and one end of an eleventh capacitor C8, and the other end of the eleventh capacitor C8 is grounded.

Preferably, the display circuit includes a twelfth resistor R36, a thirteenth resistor R37, a fourteenth resistor R38, a light emitting diode D6, and a third field effect transistor Q8, one end of the twelfth resistor R36 is connected to a power supply, the other end of the twelfth resistor R36 is connected to the anode of the light emitting diode D6, the cathode of the light emitting diode D6 is connected to the drain of the third field effect transistor Q8, one end of the fourteenth resistor R38 is connected to the gate of the third field effect transistor Q8, the other end of the fourteenth resistor R38 is connected to the source of the third field effect transistor Q8 and grounded, one end of the thirteenth resistor R37 is connected to the gate of the third field effect transistor Q8, and the other end of the thirteenth resistor R37 is connected to the forty-second pin of the main chip M1.

Preferably, the second boosted voltage is 12V dc.

Preferably, the electronic device further comprises an input detection circuit, the input detection circuit comprises a third interface J1, a fifteenth resistor R19, a sixteenth resistor R20, a seventeenth resistor R21, an eighteenth resistor R22, a nineteenth resistor R23, a twentieth resistor R24, a twenty-first resistor R25, a twenty-second resistor R26, a twelfth capacitor C9, a thirteenth capacitor C10, a zener diode D4, a first jumper JP1, a second jumper JP2, and a third jumper JP3, the second boosted voltage output by the boosting circuit is connected with one end of the fifteenth resistor R24, the other end of the fifteenth resistor R24 is respectively connected with one end of a sixteenth resistor R20, a seventeenth resistor R21, and a twentieth resistor R24, the other end of the twentieth resistor R24 is respectively connected with one end of a twenty-second resistor R26 and one end of a thirteenth capacitor C10, and the other end of the twenty-second resistor R8658 and the thirteenth capacitor C10 are respectively connected with ground, the other end of the twentieth resistor R24 is connected to the twenty-first pin of the main chip M1, the zener diode D4 is connected in parallel to both ends of the seventeenth resistor R21, the anode of the zener diode D4 is grounded, the anode of the zener diode D4 is connected to one end of the twenty-first resistor R25, the other end of the twenty-first resistor R25 is connected to one end of a twelfth capacitor C9, the other end of the sixteenth resistor R20 is connected to the other end of the twelfth capacitor C9, one end of the twelfth capacitor C9 is connected to one end of a first jumper JP1, one end of a second jumper JP2 and the first pin of the third interface J1, the other end of the second jumper JP2 is connected to the other end of the twelfth capacitor C9 and the second pin of the third interface J1, the other end of the first jumper 1 is connected to one end of an eighteenth resistor R22, the other end of the eighteenth jumper R6342 is connected to the nineteenth resistor R3 and the nineteenth terminal of the third interface J5928, the other end of the nineteenth resistor R23 is connected to the other end of the third jumper JP3 and to the second pin of the third interface J3.

Preferably, a discharge circuit is arranged between the power supply and the MCU circuit, the discharge circuit comprises a fourth field effect transistor Q5, a triode Q7, a twenty-third resistor R30, a twenty-fourth resistor R32, a twenty-fifth resistor R34 and a twenty-sixth resistor R35, the drain of the fourth field effect transistor Q5 is connected with the power supply, the source of the fourth field effect transistor Q5 is respectively connected with the base of the triode Q7, one end of the twenty-fifth resistor R34 and one end of the twenty-sixth resistor R35, the other ends of the twenty-fifth resistor R34 and the twenty-sixth resistor R35 are connected with the emitter of the triode Q7 and grounded, the gate of the fourth fet Q5 is connected to the collector of the transistor Q7 and to one end of a twenty-third resistor R30, an emitter of the triode Q7 is connected with one end of a twenty-fourth resistor R32, and the other end of the twenty-fourth resistor R32 is connected with the other end of the twenty-third resistor R30 and is connected to a forty-sixth pin of the main chip M1.

The utility model has the following characteristics and beneficial effects:

adopt above-mentioned technical scheme, carry out the transmission of data through the LORA agreement, realize wireless fire control system, carry out the transmission of data in real time to prevention conflagration that can be timely, in addition, more traditional wired fire control system, wireless input module uses battery powered, has fully embodied wireless advantage and meaning. And the mounted position can disperse, can mount according to the demand wantonly, adopts low-power consumption battery direct current power supply mode, and under the dormant state, the electric current maintains and can maintain the low level to long time of having increased the use of dry battery, having provided life greatly, and reduced use cost.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.

FIG. 1 is a circuit schematic of the MCU circuit of the present invention;

FIG. 2 is a schematic circuit diagram of the boost circuit of the present invention;

fig. 3 is a schematic circuit diagram of the input detection circuit of the present invention.

FIG. 4 is a circuit schematic of the discharge circuit of the present invention;

fig. 5 is a schematic circuit diagram of a display circuit according to the present invention.

Detailed Description

It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.

In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present invention and for simplicity in description, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and thus, are not to be construed as limiting the present invention. Furthermore, the terms "first", "second", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first," "second," etc. may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless otherwise specified.

In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art through specific situations.

The utility model provides a wireless input module, which comprises a power supply, an MCU circuit, a booster circuit and a display circuit, wherein the power supply is 3.6V direct current, and the MCU circuit transmits data through an LORA protocol; the boost circuit is connected with a power supply and used for boosting the power supply voltage and providing voltage for the module, the display circuit is used for displaying monitoring data received by the MCU circuit, the MCU circuit comprises a main chip M1, a first interface J3, a first resistor R1, a second resistor R2, a first capacitor C12, a second capacitor C13, a third capacitor C16, a fourth capacitor C17, a fifth capacitor C18, a sixth capacitor C19, a signal transceiver and a rheostat D1, a first pin of the first interface J59642 is connected with the power supply and respectively connected with one ends of the first resistor R1 and the second resistor R2, the other end of the first resistor R1 is connected with a data receiving end of the main chip M1, the other end of the second resistor R2 is connected with a data transmitting end of the main chip M1, a third pin of the first interface J3 is connected with a data receiving end of the main chip M1, a first interface J3 is connected with a data transmitting end of the main chip M57324, the first capacitor C12, the second capacitor C13 and the sixth capacitor C19 are connected in parallel, after being connected in parallel, one end of each of the first capacitor C12, the second capacitor C13 and the sixth capacitor C19 is connected with a VDD pin of the main chip M1, the other end of each of the first capacitor C13 and the sixth capacitor C1 is connected to ground, a radio frequency pin of the main chip M1 is connected with one end of a third capacitor C16 and one end of a fourth capacitor C17, the other end of the fourth capacitor C17 is connected to ground, the other end of the third capacitor C16 is connected with one end of a fifth capacitor C18, the other end of the fifth capacitor C18 is connected to ground, the other end of the third capacitor C16 is connected with one end of a rheostat D1, the other end of the rheostat D1 is connected to ground, the other end of the third capacitor C16 is connected with one end of a signal transceiver, and the other end of the signal transceiver is connected to ground.

Among the above-mentioned technical scheme, more traditional wired connection's input module adopts battery powered, need not to lay the circuit, can install according to actual demand and requirement during the installation at arbitrary preset position, and it is more convenient to install, and the installation degree of difficulty reduces, and installation cost is greatly reduced also. In addition, the low-power consumption battery power supply mode is adopted, and in the dormant state, the current is maintained below 5uA, which is the guarantee that one dry battery can run for more than 2 years.

Specifically, adopt BE60L1_ M01 module as the MCU circuit, inside adopts ASR6505 as the main chip, LORA receiving and dispatching and MCU are integrative, and the receiving sensitivity is high, and transmitted power is big, and the low power dissipation is difficult for being disturbed by external signal to ensure the accuracy of signal receiving and dispatching, fine avoidance takes place the state of wrong report police.

Specifically, the resistance of the first resistor R1 is 10K, the resistance of the second resistor R2 is 10K, the capacitance of the first capacitor C12 is 10 μ F, the capacitance of the second capacitor C13 is 0.1 μ F, and the capacitance of the third capacitor C16 is 100pF, wherein the fourth capacitor C17 and the fifth capacitor C18 are backup capacitors.

Furthermore, the sixth capacitor C19 is a polar capacitor, and the positive electrode of the sixth capacitor C19 is connected to a power supply. The capacitor is a filter capacitor, the capacitance value is 220 muF/6.3V, and the capacitor is used for filtering the power supply, so that the stability of power supply input is ensured.

In a further configuration of the present invention, the MCU circuit further includes a reset circuit, the reset circuit includes a second interface J2 and a seventh capacitor C11, a first pin of the second interface J2 is connected to a power supply, a third pin of the second interface J2 is connected to a SWIM reset pin of the main chip MI, a fourth pin of the second interface J2 is connected to an NRST reset pin of the main chip MI, one end of the seventh capacitor C11 is connected to the NRST reset pin of the main chip MI, and the other end of the seventh capacitor C11 is grounded.

In the technical scheme, the wireless input module can be reset by arranging the reset circuit.

The capacitance value of the seventh capacitor C11 is 0.1 μ F.

The utility model is further configured that the MCU circuit further includes a communication test circuit, the communication test circuit includes an eighth capacitor C14, a ninth capacitor C15, a third resistor R27, a fourth resistor R28 and a switch SW2, one end of each of the third resistor R27 and the fourth resistor R28 is connected to one end of the switch SW2, the other end of the switch SW2 is grounded, the other end of the third resistor R27 is connected to a power supply, the other end of the fourth resistor R28 is connected to a forty-fifth pin of the main chip M1, one end of each of the eighth capacitor C14 and the ninth capacitor C15 is connected to the forty-fifth pin of the main chip M1, and the other end of each of the eighth capacitor C14 and the ninth capacitor C15 is grounded.

Among the above-mentioned technical scheme, add communication test circuit in the MCU circuit, this communication test circuit does not have the influence to MCU circuit itself, in addition, still can test communication effect through its test function, and then ensure data transmission's stability and real-time, finally improve wireless fire extinguishing system's security performance.

The capacitance of the eighth capacitor C14 is 0.001 μ F, the capacitance of the ninth capacitor C15 is 10pF, the resistance of the third resistor R27 is 10M, and the resistance of the fourth resistor R28 is 1M.

In a further arrangement of the present invention, as shown in fig. 2, the voltage boost circuit includes a voltage boost chip U3, a fifth resistor R12, a sixth resistor R13, a seventh resistor R14, an eighth resistor R15, a ninth resistor R16, a tenth resistor R17, an eleventh resistor R18, a first fet Q3, a second fet Q4, a first inductor L1, a schottky diode D3, a tenth capacitor C7, and an eleventh capacitor C8, an input pin of the voltage boost chip U3 is connected to a source of a first fet Q3, a source of the first fet Q3 is connected to one end of a tenth capacitor C7, the other end of the tenth capacitor C7 is grounded, a drain of the first fet Q3 is connected to a power supply, a gate of the first fet Q3 is connected to one end of a fifth resistor R12 and a drain of a sixth resistor R12, the other end of the fifth resistor R12 is connected to the drain of the second fet 12, the source of the second field-effect transistor Q4 is connected to power, the gate of the second field-effect transistor Q4 is connected to one end of a ninth resistor R16, the other end of the ninth resistor R16 outputs a first boost voltage and is connected to the forty-fourth pin of the main chip M1, the output pin of the boost chip U3 is connected to one end of a tenth resistor R17, the other end of the tenth resistor R17 is connected to the other end of the ninth resistor R16 and one end of the eleventh resistor R18, the other end of the eleventh resistor R18 is grounded, the conversion pin of the boost chip U3 is connected to one end of a first inductor L1 and the anode of a schottky diode D3, the other end of the first inductor L1 is connected to the input pin of the boost chip U3, the cathode of the schottky diode D3 outputs a second boost voltage, and the feedback pin of the boost chip U3 is connected to the seventh resistor R14, the seventh resistor R4, the seventh resistor R14, the seventh resistor R16, the fourth pin, the eleventh resistor R17, the eleventh resistor R3624, the eleventh resistor R18, the eleventh resistor R3624, and the eleventh resistor R3624, the eleventh resistor R18, the eleventh resistor R3624, the eleventh resistor, and the eleventh resistor R3624, and the eleventh resistor R18, the eleventh resistor R3624, and the fourth resistor R18, and the fourth resistor R3624 are connected to the fourth resistor R3624, and the fourth resistor R18, and the fourth resistor R3624, and the fourth resistor R3, and the fourth resistor R3624, and the fourth resistor R3, and the fourth resistor R3624, respectively, One end of an eighth resistor R15 is connected, the other end of the seventh resistor R14 is grounded, the other end of the eighth resistor R15 is connected to the cathode of the schottky diode D3 and one end of an eleventh capacitor C8, and the other end of the eleventh capacitor C8 is grounded.

In the technical scheme, the boost chip adopts MT3608 to boost, and the static power consumption is low. Furthermore, the power supply time of the battery is prolonged, and the service life of the wireless input module is prolonged.

In addition, the direct current voltage output by the power supply is boosted through the booster circuit, and the stable voltage is provided for the MCU circuit.

The resistance of the fifth resistor R12 is 1M, the resistance of the sixth resistor R13 is 10K, the resistance of the seventh resistor R14 is 2.2M, the resistance of the eighth resistor R15 is 11KM, the resistance of the ninth resistor R16 is 1M, the resistance of the tenth resistor R17 is 10K, the resistance of the eleventh resistor R18 is 100K, the capacitance of the tenth capacitor C7 is 0.1 muf, and the capacitance of the eleventh capacitor C8 is 0.1 muf.

In a further configuration of the present invention, as shown in fig. 5, the display circuit includes a twelfth resistor R36, a thirteenth resistor R37, a fourteenth resistor R38, a light emitting diode D6, and a third field effect transistor Q8, wherein one end of the twelfth resistor R36 is connected to a power supply, the other end of the twelfth resistor R36 is connected to the anode of the light emitting diode D6, the cathode of the light emitting diode D6 is connected to the drain of the third field effect transistor Q8, one end of the fourteenth resistor R38 is connected to the gate of the third field effect transistor Q8, the other end of the fourteenth resistor R38 is connected to the source of the third field effect transistor Q8 and grounded, one end of the thirteenth resistor R37 is connected to the gate of the third field effect transistor Q8, and the other end of the thirteenth resistor R37 is connected to the forty-second pin of the main chip M1.

In the technical scheme, the display circuit is used for displaying the running state of the system.

It can be understood that the wireless input module may be provided with a plurality of display circuits with the same structure according to actual requirements, and respectively connected to corresponding pins of the main chip M1, for example: the communication indicator light is used for displaying whether the communication is normal or not; the fault indicator lamp is used for displaying whether the system has a fault or not; and the operation/input action indicator light is used for displaying whether the system is operated and the data transmission is normal or not. It is obvious that the led D6 can emit light with different colors according to the actual operation setting and corresponding different indications.

The twelfth resistor R36 has a resistance of 4.7K, the thirteenth resistor R37 has a resistance of 10K, and the fourteenth resistor R38 has a resistance of 1M.

In a further configuration of the present invention, as shown in fig. 3, the present invention further includes an input detection circuit, the input detection circuit includes a third interface J1, a fifteenth resistor R19, a sixteenth resistor R20, a seventeenth resistor R21, an eighteenth resistor R22, a nineteenth resistor R23, a twentieth resistor R24, a twenty-first resistor R25, a twenty-second resistor R26, a twelfth capacitor C9, a thirteenth capacitor C10, a zener diode D4, a first jumper JP1, a second jumper JP2, and a third jumper JP3, the second boost voltage output by the boost circuit is connected to one end of the fifteenth resistor R24, the other end of the fifteenth resistor R24 is connected to one end of the sixteenth resistor R20, the seventeenth resistor R21, and one end of the twenty resistor R24, the other end of the twenty resistor R24 is connected to one end of the twenty-second resistor R26, one end of the thirteenth capacitor C10, one end of the twenty-second resistor R10, and the twenty-second resistor R26 are all grounded, the other end of the twentieth resistor R24 is connected to the twenty-first pin of the main chip M1, the zener diode D4 is connected in parallel to both ends of the seventeenth resistor R21, the anode of the zener diode D4 is grounded, the anode of the zener diode D4 is connected to one end of the twenty-first resistor R25, the other end of the twenty-first resistor R25 is connected to one end of a twelfth capacitor C9, the other end of the sixteenth resistor R20 is connected to the other end of the twelfth capacitor C9, one end of the twelfth capacitor C9 is connected to one end of a first jumper JP1, one end of a second jumper JP2 and the first pin of the third interface J1, the other end of the second jumper JP2 is connected to the other end of the twelfth capacitor C9 and the second pin of the third interface J1, the other end of the first jumper 1 is connected to one end of an eighteenth resistor R22, the other end of the eighteenth jumper R6342 is connected to the nineteenth resistor R3 and the nineteenth terminal of the third interface J5928, the other end of the nineteenth resistor R23 is connected to the other end of the third jumper JP3 and to the second pin of the third interface J3.

As can be appreciated, the second boost voltage is 12 vdc. The second boosted voltage is used for inputting stable 12V direct current for the input detection circuit.

In the technical scheme, the boosted 12V direct current is used as an output active detection circuit, so that line faults of the tested device and the wireless input module can be monitored in real time, and the line faults are reported to the background server through the MCU circuit in real time. Therefore, the real-time performance and the precision of data transmission of the wireless input module are ensured, and the condition of false alarm or delayed alarm or even no alarm is avoided.

Specifically, the resistance of the fifteenth resistor R19 is 10K, the resistance of the sixteenth resistor R20 is 0.0047K, the resistance of the seventeenth resistor R21 is 2.2M, the resistance of the eighteenth resistor R22 is 10K, the resistance of the nineteenth resistor R23 is 20K, the resistance of the twentieth resistor R24 is 300K, the resistance of the twenty-first resistor R25 is 0.0047K, the resistance of the twenty-second resistor R26 is 100K, the capacitance of the twelfth capacitor C9 is 0.01 μ F, and the capacitance of the thirteenth capacitor C10 is 0.001 μ F.

In a further arrangement of the present invention, as shown in fig. 4, a discharge circuit is disposed between the power supply and the MCU circuit, the discharge circuit includes a fourth fet Q5, a transistor Q7, a twenty-third resistor R30, a twenty-fourth resistor R32, a twenty-fifth resistor R34, and a twenty-sixth resistor R35, a drain of the fourth fet Q5 is connected to the power supply, a source of the fourth fet Q5 is connected to a base of the transistor Q7, one end of the twenty-fifth resistor R34 and one end of the twenty-sixth resistor R35, the other end of the twenty-fifth resistor R34 and the other end of the twenty-sixth resistor R35 are connected to ground, a gate of the fourth fet Q5 is connected to a collector of the transistor Q7 and one end of the twenty-third resistor R30, an emitter of the transistor Q7 is connected to one end of the twenty-fourth resistor R32, and the other end of the twenty-fourth resistor R5 is connected to the other end of the twenty-third resistor R30 and the other end of the main chip 57324 to the third chip 58m chip Forty-six pins.

In the technical scheme, the constant-current discharge circuit is adopted, so that the passivation effect of the lithium secondary battery can be weakened, the power supply time of the battery is prolonged, a low-power-consumption battery power supply mode is adopted, and the current is maintained below 5uA in a dormant state, which is the guarantee that one dry battery can run for at least more than 2 years. Greatly increasing the service life of the battery and the duration of continuous operation of the system.

The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the described embodiments. It will be apparent to those skilled in the art that various changes, modifications, substitutions and alterations can be made in these embodiments, including the components, without departing from the principles and spirit of the utility model, and still fall within the scope of the utility model.

Claims

1. A wireless input module comprises a power supply, and is characterized by further comprising an MCU circuit, a booster circuit and a display circuit, wherein the MCU circuit transmits data through an LORA protocol; the boost circuit is connected with a power supply and used for boosting the power supply voltage and providing voltage for the module, the display circuit is used for displaying monitoring data received by the MCU circuit, the MCU circuit comprises a main chip M1, a first interface J3, a first resistor R1, a second resistor R2, a first capacitor C12, a second capacitor C13, a third capacitor C16, a fourth capacitor C17, a fifth capacitor C18, a sixth capacitor C19, a signal transceiver and a rheostat D1, a first pin of the first interface J59642 is connected with the power supply and respectively connected with one ends of the first resistor R1 and the second resistor R2, the other end of the first resistor R1 is connected with a data receiving end of the main chip M1, the other end of the second resistor R2 is connected with a data transmitting end of the main chip M1, a third pin of the first interface J3 is connected with a data receiving end of the main chip M1, a first interface J3 is connected with a data transmitting end of the main chip M57324, the first capacitor C12, the second capacitor C13 and the sixth capacitor C19 are connected in parallel, after being connected in parallel, one end of each of the first capacitor C12, the second capacitor C13 and the sixth capacitor C19 is connected with a VDD pin of the main chip M1, the other end of each of the first capacitor C13 and the sixth capacitor C1 is connected to ground, a radio frequency pin of the main chip M1 is connected with one end of a third capacitor C16 and one end of a fourth capacitor C17, the other end of the fourth capacitor C17 is connected to ground, the other end of the third capacitor C16 is connected with one end of a fifth capacitor C18, the other end of the fifth capacitor C18 is connected to ground, the other end of the third capacitor C16 is connected with one end of a rheostat D1, the other end of the rheostat D1 is connected to ground, the other end of the third capacitor C16 is connected with one end of a signal transceiver, and the other end of the signal transceiver is connected to ground.

2. The wireless input module of claim 1, wherein the sixth capacitor C19 is a polar capacitor, and the positive electrode of the sixth capacitor C19 is connected to a power supply.

3. The wireless input module of claim 1, wherein the MCU circuit further comprises a reset circuit, the reset circuit comprises a second interface J2 and a seventh capacitor C11, a first pin of the second interface J2 is connected to a power supply, a third pin of the second interface J2 is connected to a SWIM reset pin of the main chip MI, a fourth pin of the second interface J2 is connected to a NRST reset pin of the main chip MI, one end of the seventh capacitor C11 is connected to the NRST reset pin of the main chip MI, and the other end of the seventh capacitor C11 is grounded.

4. The wireless input module of claim 1, wherein the MCU circuit further comprises a communication test circuit, the communication test circuit comprises an eighth capacitor C14, a ninth capacitor C15, a third resistor R27, a fourth resistor R28 and a switch SW2, one ends of the third resistor R27 and the fourth resistor R28 are connected to one end of the switch SW2, the other end of the switch SW2 is grounded, the other end of the third resistor R27 is connected to a power supply, the other end of the fourth resistor R28 is connected to a forty-fifth pin of the main chip M1, one ends of the eighth capacitor C14 and the ninth capacitor C15 are connected to a forty-fifth pin of the main chip M1, and the other ends of the eighth capacitor C14 and the ninth capacitor C15 are grounded.

5. The wireless input module of claim 1, wherein the boost circuit comprises a boost chip U3, a fifth resistor R12, a sixth resistor R13, a seventh resistor R14, an eighth resistor R15, a ninth resistor R16, a tenth resistor R17, an eleventh resistor R18, a first FET Q3, a second FET Q4, a first inductor L1, a Schottky diode D3, a tenth capacitor C7, and an eleventh capacitor C8, wherein an input pin of the boost chip U3 is connected to a source of the first FET Q3, a source of the first FET Q3 is connected to one end of the tenth capacitor C7, the other end of the tenth capacitor C7 is grounded, a drain of the first FET Q3 is connected to a power supply, a gate of the first FET Q3 is connected to one end of the fifth resistor R12 and the sixth resistor R13, and the other end of the fifth resistor R12 are connected to the power supply, the other end of the sixth resistor R13 is connected to the drain of a second field effect transistor Q4, the source of the second field effect transistor Q4 is connected to power, the gate of the second field effect transistor Q4 is connected to one end of a ninth resistor R16, the other end of the ninth resistor R16 outputs a first boost voltage and is connected to the forty-fourth pin of the main chip M1, the output pin of the boost chip U3 is connected to one end of a tenth resistor R17, the other end of the tenth resistor R17 is connected to the other end of the ninth resistor R16 and one end of an eleventh resistor R18, the other end of the eleventh resistor R18 is grounded, the switching pin of the boost chip U3 is connected to one end of a first inductor L1 and the anode of a schottky diode D3, the other end of the first inductor L1 is connected to the input pin of the boost chip U3, and the cathode of the schottky diode D3 outputs a second boost voltage, a feedback pin of the boost chip U3 is connected to one end of a seventh resistor R14 and one end of an eighth resistor R15, the other end of the seventh resistor R14 is grounded, the other end of the eighth resistor R15 is connected to a cathode of the schottky diode D3 and one end of an eleventh capacitor C8, and the other end of the eleventh capacitor C8 is grounded.

6. The wireless input module of claim 1, wherein the display circuit comprises a twelfth resistor R36, a thirteenth resistor R37, a fourteenth resistor R38, a light emitting diode D6, and a third fet Q8, one end of the twelfth resistor R36 is connected to the power supply, the other end of the twelfth resistor R36 is connected to the anode of the light emitting diode D6, the cathode of the light emitting diode D6 is connected to the drain of the third fet Q8, one end of the fourteenth resistor R38 is connected to the gate of the third fet Q8, the other end of the fourteenth resistor R38 is connected to the source of the third fet Q8 and grounded, one end of the thirteenth resistor R37 is connected to the gate of the third fet Q8, and the other end of the thirteenth resistor R37 is connected to the forty-two pin of the main chip M1.

7. The wireless input module of claim 5, wherein the second boosted voltage is 12 VDC.

8. The wireless input module of claim 7, further comprising an input detection circuit, wherein the input detection circuit comprises a third interface J1, a fifteenth resistor R19, a sixteenth resistor R20, a seventeenth resistor R21, an eighteenth resistor R22, a nineteenth resistor R23, a twentieth resistor R24, a twenty-first resistor R25, a twenty-second resistor R26, a twelfth capacitor C9, a thirteenth capacitor C10, a zener diode D4, a first jumper JP1, a second jumper JP2, and a third jumper JP3, wherein a second boosted voltage outputted by the voltage boosting circuit is connected to one end of the fifteenth resistor R24, the other end of the fifteenth resistor R24 is connected to one end of the sixteenth resistor R20, the seventeenth resistor R21, and one end of a twenty-second resistor R24, the other end of the twenty-second resistor R24 is connected to one end of the twenty-second resistor R26 and the thirteenth capacitor C10, and one end of the twenty-second resistor R26, The other end of the thirteenth capacitor C10 is grounded, the other end of the twentieth resistor R24 is connected to the twenty-first pin of the main chip M1, the zener diode D4 is connected in parallel to both ends of the seventeenth resistor R21, the anode of the zener diode D4 is grounded, the anode of the zener diode D4 is connected to one end of the twenty-first resistor R25, the other end of the twenty-first resistor R25 is connected to one end of the twelfth capacitor C9, the other end of the sixteenth resistor R20 is connected to the other end of the twelfth capacitor C9, one end of the twelfth capacitor C9 is connected to one end of the first jumper JP1, one end of the second jumper JP2 and the first pin of the third interface J1, the other end of the second jumper JP2 is connected to the other end of the twelfth capacitor C9 and the second pin of the third interface J1, and the other end of the first JP1 is connected to one end of the eighteenth resistor R22, the other end of the eighteenth resistor R22 is connected to one end of a nineteenth resistor R23 and one end of a third jumper JP3, and the other end of the nineteenth resistor R23 is connected to the other end of the third jumper JP3 and to a second pin of the third interface J3.

9. The wireless input module of claim 1, wherein a discharge circuit is disposed between the power supply and the MCU circuit, the discharge circuit comprises a fourth FET Q5, a transistor Q7, a twenty-third resistor R30, a twenty-fourth resistor R32, a twenty-fifth resistor R34 and a twenty-sixth resistor R35, a drain of the fourth FET Q5 is connected to the power supply, a source of the fourth FET Q5 is connected to a base of a transistor Q7, one end of a twenty-fifth resistor R34 and one end of a twenty-sixth resistor R35, the other end of the twenty-fifth resistor R34 and the other end of the twenty-sixth resistor R35 are connected to ground, a gate of the fourth FET Q5 is connected to a collector of a transistor Q7 and one end of a twenty-third resistor R30, an emitter of the transistor Q7 is connected to one end of a twenty-fourth resistor R32, the other end of the twenty-fourth resistor R32 is connected with the other end of the twenty-third resistor R30 and connected to the forty-sixth pin of the main chip M1.