CN216133165U - Chip testing machine and chip testing device - Google Patents
Chip testing machine and chip testing device Download PDFInfo
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- CN216133165U CN216133165U CN202121824083.8U CN202121824083U CN216133165U CN 216133165 U CN216133165 U CN 216133165U CN 202121824083 U CN202121824083 U CN 202121824083U CN 216133165 U CN216133165 U CN 216133165U
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Abstract
The application provides a chip testing machine and a chip testing device, and relates to the technical field of semiconductors. The testing machine comprises: the testing machine comprises a testing machine main body, a switch assembly, a switching assembly and a testing circuit board; the switch assembly and the switching assembly are arranged on the testing machine main body; the test circuit board is arranged in the tester main body; the switching assembly is connected with the switch assembly, and the test circuit board is connected with the switch assembly through the switching assembly. The test device comprises: the system comprises a testing machine, a first sorting machine and a second sorting machine; the first sorting machine is connected with a switch component of the testing machine, and the testing machine is used for testing a second chip in the first sorting machine when the second sorting machine moves the first chip in the second sorting machine; the second sorting machine is connected with a switch component of the testing machine, and the testing machine is used for testing the first chip when the first sorting machine moves the second chip. This application sets up two sorters, can utilize the travel time of chip, has improved the efficiency of chip test effectively.
Description
Technical Field
The application relates to the technical field of semiconductors, in particular to a chip testing machine and a chip testing device.
Background
Because the complexity of the chip manufacturing process is increasing continuously, and the production of different devices of different manufacturers is different, the produced chips are likely to be unqualified, so in the chip industry, the chips need to be tested strictly from manufacturing to shipment, and the shipment quality is ensured.
After the integrated circuit is packaged, electrical performance tests, such as open short circuit tests, leakage tests, radio frequency signal tests (including gain, isolation, switching time and the like) and appearance tests, need to be performed on the chip to eliminate defective products in the chip. In the prior art, in a test mode of an integrated circuit radio frequency test machine for detecting a chip, when a sorter rotates and picks and places the chip, a certain moving time exists in the picking and placing process, and the test machine and the sorter cannot test within the moving time, so that the test speed of the chip is low, and the test efficiency of the chip is low.
SUMMERY OF THE UTILITY MODEL
In view of the above, an object of the embodiments of the present application is to provide a chip testing machine and a chip testing apparatus, so as to solve the problem of low chip testing efficiency in the prior art.
In order to solve the above problem, in a first aspect, an embodiment of the present application provides a chip tester, where the chip tester includes: the testing machine comprises a testing machine main body, a switch assembly, a switching assembly and a testing circuit board;
the switch assembly and the switching assembly are arranged on the tester main body;
the test circuit board is arranged in the tester main body;
the switching assembly is connected with the switch assembly and is used for switching the switch assembly;
the test circuit board is connected with the switch assembly through the switching assembly and is used for controlling the switching assembly;
the switch assembly is used for connecting at least two external sorting machines.
In the above implementation manner, the switch assembly and the switching assembly are arranged on the testing machine main body, the testing circuit board and the switch assembly are connected through the switching assembly, the switch is switched through the connection of the switch assembly and the switching assembly, and the externally connected multiple sorting machines are connected independently through the switch assembly. The switch switching control is realized through the test circuit board in the test machine host, the switch can be accurately switched according to the circuit control, and the switch switching accuracy is improved.
Optionally, the switch assembly comprises a first switch and a second switch;
the test circuit board is connected with an external first sorting machine through the first switch;
and the test circuit board is connected with an external second sorter through the second switch.
In the above implementation manner, the test circuit board is respectively connected with the first switch and the second switch through the electrical connection of the switching component and the switch component, so that the test circuit board of the testing machine can be connected with the external first sorting machine through the first switch and connected with the second sorting machine through the second switch. So as to realize the control of the opening and the closing of the switch in different time periods. The accuracy and pertinence of switch control are improved.
In a second aspect, an embodiment of the present application further provides a chip testing apparatus, where the apparatus includes: the testing machine, the first sorter and the second sorter as described in any one of the above chip testing machines;
the first sorting unit is connected with the switch assembly of the testing machine, and the testing machine is used for testing a second chip in the first sorting unit when the second sorting unit moves the first chip in the second sorting unit;
the second sorter is connected with the switch assembly of the testing machine, and the testing machine is used for testing the first chip when the first sorter moves the second chip.
In the above implementation, through the connection between the first sorter and the switch assemblies of the second sorter and the testing machine, when the second sorter moves the first chip on the second sorter, the testing machine can test the second chip on the first sorter; while the first sorter is moving the second chip on the first sorter, the first chip on the second sorter is tested by the tester on the second sorter. The chip test system has the advantages that the moving time of moving and picking and placing the chip can be shortened by using any one of the two sorting machines, the chip is tested on the other sorting machine, the moving time of the chip is effectively utilized, the idle time of the test machine is reduced, and the efficiency of chip performance test is effectively improved.
Optionally, the first sorter is provided with a plurality of first detection stations, and the plurality of first detection stations are used for correspondingly placing a plurality of chips in the second chips.
In the implementation manner, the plurality of first detection stations are arranged in the first sorting machine, so that the plurality of chips in the second chip can be correspondingly placed, and when the second chip is tested by the testing machine, the plurality of chips can be simultaneously tested, and the testing efficiency of the second chip is improved.
Optionally, the second sorter is provided with a plurality of second detection stations, and the plurality of second detection stations are used for correspondingly placing a plurality of chips in the first chips.
In the implementation manner, the second sorting machine is provided with the second detection stations, so that the chips in the first chip can be correspondingly placed, and when the testing machine tests the first chip, the chips can be simultaneously tested, and the testing efficiency of the first chip is improved.
Optionally, the apparatus further comprises a first control line and a second control line;
the first separator is connected with the switch assembly through the first control line;
the second sorter is connected to the switch assembly by the second control line.
In the implementation mode, the connection between the first sorting machine and the switch assembly of the testing machine and the connection between the second sorting machine and the switch assembly are realized through the first control line and the second control line, the two sorting machines can be respectively connected with the switch assembly of the testing machine so as to realize the independent control of the two sorting machines, the testing machine respectively tests the chips in the two sorting machines, and the stability and the reliability of circuit line control are improved.
Optionally, the switch assembly comprises a first switch and a second switch;
the first switch is connected with the first control line;
the second switch is connected to the second control line.
In the implementation mode, the first switch is connected with the first control line, and the second switch is connected with the second control line, so that the respective connection and switch switching between the testing machine and the first sorting machine and between the testing machine and the second sorting machine can be realized, and the stability of the two lines is improved.
Optionally, the switching component is connected to the first switch to turn on the first switch when the second sorter moves the first chip;
and the switching component is connected with the second switch to turn on the second switch when the first sorter moves the second chip.
In the above implementation manner, the first switch and the second switch are controlled by connecting the switching component of the testing device with the switch component, so that the first switch is turned on when the second sorting machine moves the first chip, and the second switch is turned on when the first sorting machine moves the second chip, thereby realizing switching of the switches.
Optionally, the test circuit board is connected to the first sorting machine through the switching assembly, the first switch and the first control line when the second sorting machine moves the first chip;
and the test circuit board is connected with the second sorting machine through the switching component, the second switch and the second control line when the first sorting machine moves the second chip.
In the above implementation manner, the test circuit board is connected to the switching component to perform switching control with the switch component through the switching component, so that the test circuit board is connected to the first switch when the second sorting machine moves the first chip, and the test circuit board is connected to the second switch when the first sorting machine moves the second chip. The test circuit board is connected with the first sorting machine through the first switch and the first control line, is connected with the second sorting machine through the second switch and the second control line, and is respectively connected with the two independent lines so as to realize the signal distribution of the two sorting machines respectively. The signals are respectively sent to the corresponding sorting machines for testing, so that the occurrence of resource conflict is reduced, the accuracy of circuit connection is improved, the accuracy and pertinence of signal distribution are improved, and the two sorting machines are respectively tested.
In summary, the embodiment of the present application provides a chip testing machine and a chip testing device, two sorting machines are arranged in the chip testing device, and a switching circuit corresponding to the two sorting machines is arranged in the testing machine, so that the moving time for rotating and picking and placing a chip by any sorting machine can be utilized, the testing machine performs chip testing on the other sorting machine, the utilization rate of the moving time is effectively improved, and the chip testing efficiency is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.
Fig. 1 is a schematic structural diagram of a chip tester according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a chip testing apparatus according to an embodiment of the present disclosure;
fig. 3 is a schematic flowchart of a testing method of a chip testing apparatus according to an embodiment of the present disclosure.
Icon: 100-a tester; 110-tester body; 120-a switch assembly; 121-a first switch; 122-a second switch; 130-a switching component; 140-test circuit board; 150-connecting lines; 200-a first sorter; 210-a first control line; 220-a first inspection station; 300-a second classifier; 310-a second control line; 320-a second inspection station.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of them. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present application without any creative effort belong to the protection scope of the embodiments of the present application.
After the existing integrated circuit is packaged, the chip needs to be subjected to electrical performance tests (open short circuit tests, electric leakage tests, radio frequency signal tests including gain, isolation, switching time and the like) and appearance tests to remove defective products. At present, all integrated circuit testing devices are used by matching 1 testing machine (Tester) with 1 integrated circuit sorting machine (Handler), when chips are conveyed to the testing machine through the sorting machine, the sorting machine can rotate and pick and place the chips, and the process is the moving time (index time) of the chips. The application provides a chip testing machine and a chip testing device, which improve the structure of a testing machine and the components of the device, can make full use of the time of rotating and taking and placing chips by a sorting machine, keep the testing state of the testing machine and improve the testing efficiency of integrated circuit chips.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a chip tester according to an embodiment of the present disclosure, in which the tester 100 includes: the tester main body 110, the switch assembly 120, the switching assembly 130, the test circuit board 140, and the connection line 150.
The tester main body 110 is used to place various components in the tester 100, and the switch assembly 120 and the switching assembly 130 are provided on the tester main body 110. Alternatively, the switch assembly 120 and the switching assembly 130 may be disposed on the surface of the testing machine main body 110 for manual control by a user, and may also be disposed inside the testing machine main body 110 for control by a user through a terminal device, and fig. 1 only shows a possible embodiment in which the switch assembly 120 and the switching assembly 130 are disposed on the surface of the testing machine main body 110.
The test circuit board 140 is disposed inside the testing machine body 110, the test circuit board 140 can be connected to the switching element 130 through a connection line 150 of an electrical cable such as a data cable, and the switching element 130 can be a physical element such as a key or a port, or a virtual element such as software for controlling a connection circuit, so as to switch the switching element 120. The test circuit board 140 can control the switching component 130 through data transmission of the cable, and is connected with the switching component 120 through the switching component 130 to control the switching component 120, so as to realize switching of the switch, so that the switching component 120 and at least two external sorting machines can be respectively and independently connected.
Optionally, the switch assembly 120 may further include a first switch 121 and a second switch 122, the test circuit board 140 controls the switching assembly 130 to be connected to the first switch 121 through a connection line 150, so as to enable the test circuit board 140 to be connected to an external first handler; the test circuit board 140 controls the switching assembly 130 to be connected with the second switch 122 through the connection line 150, so that the test circuit board 140 is connected with the external second handler. The switching of the switch and the independent work of the two independent circuits can be realized, and the test circuit board 140 can be respectively connected with the first switch 121 and the second switch 122 in different time periods, so that the opening and closing of the switch can be controlled in different time periods. The accuracy and pertinence of switch control are improved.
In the embodiment shown in fig. 1, the test circuit board and the switch assembly are connected through the switching assembly, the switch is switched through the connection of the switch assembly and the switching assembly, the switch switching is controlled through the test circuit board in the tester host, the switch can be accurately switched according to the circuit control, and the accuracy of the switch switching is improved.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a chip testing apparatus according to an embodiment of the present disclosure. The chip testing device in this embodiment includes: test machine 100, first sorter 200, and second sorter 300.
Alternatively, the first sorter 200 may be connected to the switch assembly 120 of the testing machine 100 through the first control line 210, the second sorter 300 may be connected to the switch assembly 120 of the testing machine 100 through the second control line 310, and the first control line 210 and the second control line 310 may be linear cables having a data transmission function, and are connected to signal ports in the testing machine 100 for data and signal transmission.
Alternatively, a first end of the first control line 210 may be connected to the first switch 121 in the test machine 100, and a second end is connected to the connection port on the first sorter 200; the first end of the second control line 310 may be connected to the second switch 122 in the testing machine 100, and the second end is connected to the connection port on the second sorter 300, so as to implement two independent lines, and can be connected to the testing machine separately for implementing independent control of the two sorters, and the testing machine tests the chips in the two sorters separately, thereby improving the stability and reliability of the circuit line control.
It should be noted that, when the second sorting machine 300 moves the first chip placed on the second sorting machine 300, a time period for rotating, picking and placing the chip may be used as a first moving time; when the first sorter 200 moves the second chip placed on the first sorter 200, a time period during which the chip is rotated, picked and placed may be used as a second moving time. The first sorter 200 and the second sorter 300 may also send signals for starting movement or ending movement to the test machine 100 in a wired transmission or wireless transmission manner when the chip is moved by itself, so that the test machine can acquire the start and end of the first movement time and the second movement time. The first moving time and the second moving time are not only a certain period of time, but also a plurality of periods of time for the two sorting machines to respectively rotate and pick and place the corresponding chips. Illustratively, the chip testing device can be suitable for testing chip products within 200ms, and the first moving time and the second moving time can be within 110-150 ms.
The first sorter 200 is connected to the testing machine 100 within a first moving time when the second sorter 300 moves the first chip on the second sorter 300, and the testing machine 100 tests the first chip on the first sorter 200; the second sorter 300 is connected to the testing machine 100 for a second movement time when the first sorter 200 moves the second chip on the first sorter 200, and the second chip on the second sorter 300 is tested by the testing machine 100.
Optionally, the switching element 130 in the testing machine 100 is connected to the first switch 121 within the first moving time to turn on the first switch 121, so that the test circuit board 140 in the testing machine 100 is connected to the first switch 121, a first test circuit in the first handler 200 during testing is conducted, and the test circuit board 140 is connected to the first handler 200 within the first moving time through the first control line 210, so that the testing machine 100 tests the second chip on the first handler 200 within the first moving time, thereby improving the accuracy of circuit connection.
It should be noted that a plurality of first detection stations 220 may be further disposed on the first sorter 200, the placement relationship and the number of the plurality of first detection stations 220 may be determined according to the shape and the size of the conveyor belt of the first sorter 200, and only one of the placement relationships in sequential arrangement is shown in fig. 2. The first detection station 220 is used to correspondingly place one or more chips in the second chip, so that the tester 100 can simultaneously test multiple chips in the second chip, thereby effectively improving the efficiency of chip testing.
Optionally, the switching element 130 is connected to the second switch 122 within the second moving time to turn on the second switch 122, so that the test circuit board 140 in the testing machine 100 is connected to the second switch 122, a second test circuit in the second handler 300 is turned on, and the test circuit board 140 is connected to the second handler 300 through the second control line 310, so that the testing machine 100 tests the first chip on the second handler 300 within the second moving time, and accuracy of circuit connection is improved.
It should be noted that a plurality of second inspection stations 320 may be further provided on the second sorter 300, and the placement relationship and number of the plurality of second inspection stations 320 may be determined according to the shape and size of the conveyor belt of the second sorter 300, and only one of the placement relationships in sequential arrangement is shown in fig. 2. The second detection station 320 is used for correspondingly placing one or more chips in the first chip, so that the tester 100 can simultaneously test multiple chips in the first chip, thereby effectively improving the efficiency of chip testing.
It should be noted that, when the test circuit board 140 works, one path of signal in the test machine 100 can be converted into two paths of signals through two lines, and the two paths of signals are respectively distributed. For example, the test circuit board 140 is connected to the first sorter 200 for a first moving time and transmits a dc signal or a radio frequency signal to the first sorter 200, or the test circuit board 140 is connected to the second sorter 300 for a second moving time and transmits a dc signal or a radio frequency signal to the second sorter 300. The signals are respectively sent to the corresponding sorting machines for testing, so that the accuracy and pertinence of signal distribution are improved, and the two sorting machines are respectively tested.
Optionally, before distributing the signals, the test circuit board 140 may further determine the signals generated by the test machine 100 to determine that the signals are dc signals or rf signals, and distribute the signals to determine the sorting machine of the signals, so as to reduce resource conflicts.
It should be noted that, when the testing machine 100 tests the second chip in the first sorter 200 and the first chip in the second sorter 300 respectively, it is also possible to test chips with different batches and different functions respectively, so as to implement simultaneous testing of multiple functions of the chips. For example, the testing machine 100 can test the open-short performance of the second chip on the first sorter 200 during the first moving time and the leakage performance of the first chip on the second sorter 300 during the second moving time. The functional content of the test can be set and adjusted in the testing machine 100 according to the actual condition of the chip and the user requirements, so as to meet more test requirements and test scenarios.
Optionally, the testing machine 100 may further include a communication module and a display module, where the display module may display test pages of the two sorting machines, so that a user can check and understand test conditions of the two sorting machines, and can also operate and modify options, data, switches, and the like in the test pages in an interactive manner through a touch screen or buttons in the display module, so as to control and check the test process more effectively and timely. The communication module can send the test page to a terminal device used by a user, and the terminal device can be an electronic device with a logic calculation function, such as a Personal Computer (PC), a tablet PC, a smart phone, a Personal Digital Assistant (PDA), and the like, so that the user can remotely view the test page, control and operate the test page, and the like.
In the embodiment shown in fig. 2, the chip test can be performed on the other sorter by using the moving time of moving and picking and placing the chip by any one of the two sorters, so that the moving time of the chip is effectively utilized, the idle time of the tester is reduced, and the efficiency of the chip performance test is effectively improved.
Referring to fig. 3, fig. 3 is a schematic flow chart of a testing method of a chip testing apparatus according to an embodiment of the present application, where the method is applied to a chip testing machine according to the embodiment shown in fig. 1 and a chip testing apparatus according to the embodiment shown in fig. 2, and the method may include the following steps:
in step S1, the first sorter and the second sorter are connected to the tester, respectively.
The testing machine is connected with the first sorting machine through a first control line and connected with the second sorting machine through a second control line.
Step S2, when the second sorter moves the first chip in the second sorter, the second chip in the first sorter is tested by the testing machine.
The testing machine can test the chips in the first sorting machine within the first moving time of the second sorting machine for moving the chips, so that the first moving time is fully utilized, and the testing efficiency of the chips is improved.
Optionally, multiple chips in the second chip may be placed by multiple first inspection stations in the first sorter for simultaneous testing of the multiple chips by the tester.
Step S3, when the first sorter moves the second chip in the first sorter, the first chip in the second sorter is tested by the testing machine.
The testing machine can test the chips in the second sorting machine within the second moving time of the first sorting machine for moving the chips, so that the second moving time is fully utilized, and the testing efficiency of the chips is improved.
Optionally, multiple chips in the first chip may be placed by multiple second inspection stations in the second sorter for simultaneous testing of multiple chips by the tester.
It should be noted that, when the testing machine performs testing, the first chip may also be tested for the first function, and the second chip may also be tested for the second function, so as to implement simultaneous testing of multiple functions of the chip. The functional contents of the first function and the second function can be set and adjusted in the testing machine 100 according to the actual situation of the chip and the user requirements, so as to meet more testing requirements and testing scenarios.
And step S4, obtaining a test result according to the test.
Optionally, the test result of the chip may be collected and analyzed by the tester, and the tester may further display the test result, or send the test result to the terminal device used by the user, so that the user can check and understand the test result.
In the embodiment shown in fig. 3, the moving time of the sorter for rotating and picking and placing the chips can be fully utilized, the idle time of the tester is reduced, and the chips are tested simultaneously, so that the efficiency of chip performance testing is effectively improved.
In summary, the embodiment of the present application provides a chip testing machine and a chip testing device, two sorting machines are arranged in the chip testing device, and a switching circuit corresponding to the two sorting machines is arranged in the testing machine, so that the moving time for rotating and picking and placing a chip by any sorting machine can be utilized, the testing machine performs chip testing on the other sorting machine, the utilization rate of the moving time is effectively improved, and the chip testing efficiency is improved.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Claims (9)
1. A chip tester, comprising: the testing machine comprises a testing machine main body, a switch assembly, a switching assembly and a testing circuit board;
the switch assembly and the switching assembly are arranged on the tester main body;
the test circuit board is arranged in the tester main body;
the switching assembly is connected with the switch assembly and is used for switching the switch assembly;
the test circuit board is connected with the switch assembly through the switching assembly and is used for controlling the switching assembly;
the switch assembly is used for connecting at least two external sorting machines.
2. The testing machine of claim 1, wherein the switch assembly comprises a first switch and a second switch;
the test circuit board is connected with an external first sorting machine through the first switch;
and the test circuit board is connected with an external second sorter through the second switch.
3. A chip testing apparatus, the apparatus comprising: the testing machine of any one of claims 1-2, the first sorter, and the second sorter;
the first sorting unit is connected with the switch assembly of the testing machine, and the testing machine is used for testing a second chip in the first sorting unit when the second sorting unit moves the first chip in the second sorting unit;
the second sorter is connected with the switch assembly of the testing machine, and the testing machine is used for testing the first chip when the first sorter moves the second chip.
4. The apparatus of claim 3, wherein the first sorter is provided with a plurality of first inspection stations for placing a plurality of chips of the second chips correspondingly.
5. The apparatus according to claim 3, wherein the second sorter is provided with a plurality of second inspection stations for placing a plurality of chips of the first chips correspondingly.
6. The apparatus of claim 3, further comprising a first control line and a second control line;
the first separator is connected with the switch assembly through the first control line;
the second sorter is connected to the switch assembly by the second control line.
7. The apparatus of claim 6, wherein the switch assembly comprises a first switch and a second switch;
the first switch is connected with the first control line;
the second switch is connected to the second control line.
8. The apparatus of claim 7, wherein the switching component is connected to the first switch to open the first switch when the second sorter moves the first chip;
and the switching component is connected with the second switch to turn on the second switch when the first sorter moves the second chip.
9. The apparatus of claim 8, wherein the test circuit board is connected to the first sorter through the switching assembly, the first switch, and the first control line while the second sorter moves the first chip;
and the test circuit board is connected with the second sorting machine through the switching component, the second switch and the second control line when the first sorting machine moves the second chip.
Priority Applications (1)
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| CN202121824083.8U CN216133165U (en) | 2021-08-05 | 2021-08-05 | Chip testing machine and chip testing device |
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| CN202121824083.8U CN216133165U (en) | 2021-08-05 | 2021-08-05 | Chip testing machine and chip testing device |
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