CN2160963Y - Mathematics teaching board - Google Patents
Mathematics teaching board Download PDFInfo
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- CN2160963Y CN2160963Y CN 93236934 CN93236934U CN2160963Y CN 2160963 Y CN2160963 Y CN 2160963Y CN 93236934 CN93236934 CN 93236934 CN 93236934 U CN93236934 U CN 93236934U CN 2160963 Y CN2160963 Y CN 2160963Y
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- arithmetic
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- 239000004065 semiconductor Substances 0.000 claims description 2
- 230000003340 mental effect Effects 0.000 abstract description 2
- 210000004556 brain Anatomy 0.000 abstract 1
- 238000004364 calculation method Methods 0.000 abstract 1
- 238000006243 chemical reaction Methods 0.000 abstract 1
- 238000013500 data storage Methods 0.000 abstract 1
- 230000000694 effects Effects 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 230000002860 competitive effect Effects 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000002441 reversible effect Effects 0.000 description 1
- 238000003756 stirring Methods 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
- 230000010356 wave oscillation Effects 0.000 description 1
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Abstract
The utility model relates to a large amount of storage, convenient to use's primary school mathematics teaching board, the student of being convenient for improves mental arithmetic speed through a large amount of, the exercise of being rich in the calculation subject of change, strengthens brain thinking ability, student's intellectual development with higher speed. The mathematics teaching board consists of LED digital symbol display screen, decoding circuit, data storage circuit, addressing inquiry circuit and answering circuit, and features its memory IC9Storing arithmetic data, IC9Data line D0~D7Darlington transistor F connected with level conversion circuit4~F11,F4~F11Output receiving/sending decoding circuit IC1~IC8,IC9Address line A of0~A14Direct connection with switch K9~K12And a counter circuit IC11~IC12The output ends are connected.
Description
The utility model relates to a kind of electronics teaching aid that is used for primary school math teaching, is a kind of mathematical education plate specifically.
At present, mainly be blackboard still as the primary school mathematics teaching aid, be aided with picture and digital card.The teacher adopts and writes on blackboard, card is composed and laid out and imparted knowledge to students.There is following shortcoming in such teaching aid: 1, the teacher must write on related content on the blackboard (or paper) before the class.Collect sum, copy, over-burden in prepare lesson; 2, on the classroom, the teacher is used for writing time of topic on blackboard too much, influences the explanation of teacher to the student, is unfavorable for that student's understanding is accepted; 3, because, the content that can write out on the blackboard is less, and is difficult for variation, is unfavorable for that the student calculates the raising of ability soon; 4, present " arithmetic recreation " popular in primary school (being commonly called as the recreation of " 24 " point) all carried out among a small circle by the Piao Ke board, be difficult for it and introduce supplementary means (the so-called arithmetic recreation of classroom as the arithmetic teaching, be will be arbitrarily 4 be no more than 10 number, by arithmetic, allow its result equal 24, require each number to use once, and must use once).
The purpose of this utility model is the problem at above-mentioned existence, and it is big to have designed a kind of storage capability, primary school math teaching plate easy to use, be convenient to the student by exercises a large amount of, changeful arithmetic problem, improve mental arithmetic speed, strengthen the exercise of human thinking ability, quicken student's intelligence development.
Solution of the present utility model:
A kind of by LED mathematic sign display screen, decoding scheme, the data-storing circuit, the addressing enquiry circuit is raced to be the first to answer a question the mathematical education plate that circuit is formed, and it is characterized in that in the data-storing circuit with semiconductor read-only memory IC
9The data of storage arithmetic formula, IC
9Data line D
0~D
7Meet level shifting circuit Darlington transistor F
4~F
11, F
4~F
11Output pick decoding scheme IC
1~IC
8, IC
9Address wire A
0~A
14Directly and K switch
9~K
12, and counting circuit IC
11~IC
18Output terminal is connected.
Race to be the first to answer a question IC in the circuit
10Data line input end D
1~D
4Connect K switch
18~K
21, diode D
17~D
20Negative pole meet IC respectively
10D
1~D
4, diode D
17~D
20The common public point of positive pole meet Sheffer stroke gate YF
1~YF
4The power supply Vss utmost point, IC
10DOL Data Output Line Q
1~Q
4Meet code translator IC respectively
1~IC
8()/(LT) end.
Mathematical education plate described in the utility model is that a kind of storage capability is big, novel teaching aid easy to use, and it mainly contains following advantage: 1, the arithmetic formula weight of storage is big in the teaching aid, helps the student by a large amount of exercise tap intellectual resources.Teacher when 2, using has reduced the time that the teacher writes as long as one, two switch of operation just can obtain new sum on blackboard, help strengthening explanation, concentrates student's notice, improves teaching quality.3, changed fundamentally in the past that the teacher writes arithmetic problem when preparing lessons, blackly analysed the way of copying, reduced the loaded down with trivial details work of a lot of repetitions toward little.Helping the teacher is placed on energy in the research of teaching method.4, this teaching aid has the function of arithmetic recreation, and like this, the teacher can carry out the arithmetic recreation the student of classroom inner tissue by this teaching aid, improves the ability of student's arithmetic, promotes the cultivation of student's competitive spirit, collectivity consciousness.
Fig. 1 is the utility model electrical schematic diagram.
Below in conjunction with accompanying drawing the utility model is further described:
1, S
1~S
11Be LED numeral, symbol display, they are at seven sections decoding IC
1~IC
8Under the driving of the brilliant pipe of Darlington, can demonstrate +/-+/-the such arithmetic formula (is the number of 00-99) of=.As seen from the figure, operation K
1~K
7Just can determine that whether the numeral corresponding with switch, symbol show, same sum can be developed into several roads sum, for example, can develop into for +=? +=, ()=, +?=, +=?
2, storage IC
9Be one to have the read-only memory of 15 bit address lines, its address A
0~A
14Respectively by IC
13, IC
12, IC
11And K
9~K
12Etc. addressing (inquiry) the circuit control that relevant elements is formed, F
4~F
11Be Darlington transistor, its effect is with IC
9The level of data is converted to+12V-OV by OV-+5V, IC
9()/(CE), ()/(OE) be connected into " reading " state.
For the teacher can seek out the formula of each teaching phase easily, to IC
9During programming, its address code is divided into several zones, all kinds of formula classification are stored in the different zones.The method of dividing is:
A
14=0 stores the content of a last term;
A
14=1 stores the content of a next term;
A
13=0 A
12=0 A
11The formula of=0 storage-=type;
A
13=0 A
12=0 A
11The formula of=1 storage +=type.
A
13=1 A
12=1 A
11The formula of=1 storage + +=type.
Wherein: A
13=1 A
12=0 A
11=0
A
13=1 A
12=0 A
11=1
It is 24 4 numbers that storage all can obtain by arithmetic.
A
10~A
7Four address line combination become 16 different states, deposit the formula with each teaching phase in each state respectively in.For example, concerning last term, can be divided into 5~20 totally 16 teaching phase, be, the formula in this 16 stage is deposited in successively in 0000~1111 these 16 states in programming by the book of teaching.For next term, also its content can be divided into 16 stages, deposit IC successively in
9In.
5 address wire A
6~A
2Form 32 different conditions, can deposit 32 road formulas.A
0, A
1Two address wires are formed one of four states, deposit one two figure place under each state in, and four two figure places have just been formed formula one.
3, addressing (inquiry) circuit: IC
11Be level Four scale-of-two reversible counter, IC
12Be seven grades of binary counters, IC
18Be decade counter, they and K
9~K
17And the related resistors diode forms addressing circuit jointly, and the effect of addressing circuit is to leave IC in
9In the arithmetic formula seek out as required for decoding and showing.
During use, at first stir K
9~K
11, carry out the selection of arithmetic formula type, then, carry out the selection of teaching phase: press K
15, IC
11, the counting, Q
1~Q
4Change state with per second 1~2 time." M " is IC
11Make the control end of addition or subtraction, K
14Setting be for reduce the inquiry be the time.K
16, K
17Be to change the topic button, press K
16, change topic p.s. 1~2 time, press K
17, change 10~20 IC of topic p.s.
13Be decade counter, at YF
5, YF
6The multivibrator of forming is made cycle count under driving, and makes A
0A
1Two address wires can present four different states.C
1~C
4, R
77~R
80, D
5~D
8, R
67~R
70Form four differentiating circuit, its effect is to leave A in
0A
14 two figure places of four different conditions are latched in respectively in separately the code translator, and principle of work as shown in the figure.IC for example
13" 1 " bring out existing noble potential, other output terminals " 2 "~" 0 " is electronegative potential, at this moment IC
9A
0=0, A
1=1.Work as IC
13When next CL step-by-step counting, " 1 " current potential is jumped down, and " 2 " terminal potential rises, this moment A
0=0, A
1=1 state is constant.When " 1 " terminal potential is jumped down, in the differentiating circuit current potential of the negative pole of D6 by+it is OV that 5V jumps, D
6It is ≈ 1V that anodal current potential is jumped down by original+12V, leaves A in
0=0, A
1Number in=1 address location is latched at IC
1, IC
2In, in like manner other three two figure places also are latched at IC successively
3~IC
8In.The number average that is latched shows on the mathematics display of correspondence.
4, race to be the first to answer a question the principle of work of circuit: work as K
9Closure, K
10Disconnect.K
11Closed disconnection, K
2, K disconnects K
3Closure just can begin " arithmetic " recreation.Recreation people operation button (K separately
18~K
21), strive for answering power.Racing to be the first to answer a question circuit is by four D latched flip flop IC
10, YF
1~YF
4, K
13~K
21And F
12Deng composition, in a single day the player finds out the method for arithmetic, press the button immediately, this moment hummer FM sounding, corresponding with it numeral shows flash " 88 ".According to the position of " 88 ", first presses the button just can whom to determine, thereby can determine who obtains to answer power, for example, and K
18Take the lead in pressing IC
10Middle D
1Electronegative potential latch Q
1The output electronegative potential, diode D
20OV just very, the YF that is attached thereto
1~YF
4Vss obtain electronegative potential, multivibrator work, FM sounding, diode D
1The negative pole current potential with YF
3The square wave oscillation of output, S
1S
2On flash " 88 ", like this, press K
18The player just obtained to answer power.Because IC
10The effect of latching, as long as K
18Press and do not decontrol, other buttons are all inoperative, like this, guaranteed that first robs the answer power that touches the button.K
18After the relieving, display screen no longer flashes " 88 ", and FM is sounding no longer.
Claims (2)
1, a kind of by LED mathematic sign display screen, decoding scheme, the data-storing circuit, the addressing enquiry circuit is raced to be the first to answer a question the mathematical education plate that circuit is formed, and it is characterized in that with using semiconductor read-only memory IC in the data-storing circuit
9The data of storage arithmetic formula, IC
9Data line D
0~D
7Meet level shifting circuit Darlington transistor F
4~F
11, F
4~F
11Output pick decoding scheme IC
1~IC
8, IC
9Address wire A
0~A
14Directly and K switch
9~K
12, and counting circuit IC
11~IC
13Output terminal is connected.
2, mathematical education plate according to claim 1 is characterized in that racing to be the first to answer a question IC in the circuit
10Data line input end D
1~D
4Connect K switch
18~K
21, diode D
17~D
20Negative pole meet IC respectively
10D
1~D
4, diode D
17~D
20The common public point of positive pole meet Sheffer stroke gate YF
1~YF
4The power supply Vss utmost point, IC
10DOL Data Output Line Q
1~Q
4Do not meet code translator IC
1~IC
8()/(LT) end.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 93236934 CN2160963Y (en) | 1993-05-25 | 1993-05-25 | Mathematics teaching board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN 93236934 CN2160963Y (en) | 1993-05-25 | 1993-05-25 | Mathematics teaching board |
Publications (1)
Publication Number | Publication Date |
---|---|
CN2160963Y true CN2160963Y (en) | 1994-04-06 |
Family
ID=33811995
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN 93236934 Expired - Fee Related CN2160963Y (en) | 1993-05-25 | 1993-05-25 | Mathematics teaching board |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN2160963Y (en) |
-
1993
- 1993-05-25 CN CN 93236934 patent/CN2160963Y/en not_active Expired - Fee Related
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C19 | Lapse of patent right due to non-payment of the annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |