CN215990747U - Miniature digital logic signal distribution processing circuit - Google Patents
Miniature digital logic signal distribution processing circuit Download PDFInfo
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- CN215990747U CN215990747U CN202122103588.1U CN202122103588U CN215990747U CN 215990747 U CN215990747 U CN 215990747U CN 202122103588 U CN202122103588 U CN 202122103588U CN 215990747 U CN215990747 U CN 215990747U
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Abstract
The utility model discloses a micro digital logic signal distribution processing circuit, and relates to the technical field of micro digital circuits. The utility model comprises NAND gates U1: A, B, C, D and U2: A, B, C, D, light emitting diodes LD, LDA, LDB, LDC, LDD, resistors R1, R2, R3, R4, R5, R6, diodes MD, switches Ia, Ib, Ic, Id and a power supply Vcc. The puncture type sensor is used, the connection is fast, the sensor signals are uniformly and intensively processed, redistributed and transmitted, and the use and the maintenance are convenient; the LED indicator light is arranged, so that the current input signal state of the sensor can be conveniently and visually indicated, the NPN or PNP signal input into the sensor is operated through the logic NAND gate 74LS00IC, the operation logic result is calculated, and then the operation logic result is output and distributed to a corresponding interface for transmission and use, so that the signal state can be conveniently and visually reflected; in addition, a diode D is designed at the working power supply end to prevent reverse connection, so that the working power supply can work only when the power supply is correctly connected, and time and labor are saved.
Description
Technical Field
The utility model belongs to the technical field of miniature digital logic circuits, and particularly relates to a miniature digital logic signal distribution processing circuit.
Background
In the prior art, a sensor signal is usually connected to an equipment processor in a traditional cable connection mode, when the equipment is actually used, the using amount of a cable is large, and the equipment is not easy to troubleshoot, maintain and replace when a fault occurs, so that the equipment is easy to damage; meanwhile, the receiving process of the sensor signal by the equipment processor is complex, so that the requirement on the traditional cable connection mode is high, and the fault is easy to occur; therefore, in order to solve the problems, a miniature digital logic signal distribution processing circuit is designed.
SUMMERY OF THE UTILITY MODEL
The utility model aims to provide a micro digital logic signal distribution processing circuit, which solves the problems of large cable usage, inconvenience in troubleshooting and difficulty in maintenance and replacement when the traditional cable is used for connecting and transmitting sensor signals.
In order to solve the technical problems, the utility model is realized by the following technical scheme:
the utility model relates to a micro digital logic signal distribution processing circuit, which comprises NAND gates U1: A, B, C, D and U2: A, B, C, D, light-emitting diodes LD, LDA, LDB, LDC and LDD, resistors R1, R2, R3, R4, R5 and R6, diodes MD, switches Ia, Ib, Ic and Id and a power supply Vcc, wherein the NAND gates U1: A, B, C, D and U2: A, B, C, D are 74LS00 ICs; two input ends of the NAND gate U2: D are respectively connected with output ends of the NAND gates U2: B, U2: C, two input ends of the NAND gate U2: B are respectively connected with the switch Id and the output end of the NAND gate U1: D, and two input ends of the NAND gate U2: C are respectively connected with the switch Ib and the output end of the NAND gate U2: A; two input ends of the NAND gate U1: D are respectively connected with the output ends of the NAND gates U1: A, U1: B, and two input ends of the NAND gate U2: A are respectively connected with the input ends of the NAND gates U1: B, U1: C; two input ends of the NAND gate U1, A, B are respectively connected with the switches Ia and Ib, two input ends of the NAND gate U1, B are respectively connected with the switches Ic and Ia, and two input ends of the NAND gate U1, C are respectively connected with the switches Ic and Id; the NPN or PNP signal input to the sensor is operated by the logic NAND gate 74LS00IC, the operation logic result is calculated, and then the output is distributed to the corresponding interface for transmission and use.
Furthermore, the output end of the NAND gate U2: D is connected with the anode of the light emitting diode LD, and the switches Ia, Ib, Ic and Id are all connected with the cathode of the diode MD through the resistor R1, so that the on-site sensor signal of the equipment can be quickly accessed through the wire-stripping-free puncture type sensor, wherein the diode MD can prevent the power supply from being reversely connected, and the circuit safety is ensured.
Further, the anode of the light emitting diode LDA is connected to the switch Ia, the cathode is grounded through the resistor R3, the anode of the light emitting diode LDB is connected to the switch Ib, and the cathode is grounded through the resistor R4; the anode of the light emitting diode LDC is connected with the switch Ic, the cathode of the light emitting diode LDD is grounded through the resistor R5, the anode of the light emitting diode LDD is connected with the switch Id, the cathode of the light emitting diode LDD is grounded through the resistor R6, an electric signal is coupled and sampled through the photoelectric coupler, and the corresponding LED lamp is turned on to indicate the current input sensor signal state.
Further, the anode of the diode MD is connected to the power source Vcc, and the cathode of the light emitting diode LD is grounded through a resistor R2.
The utility model has the following beneficial effects:
the puncture type sensor is used, the connection is fast, the sensor signals are uniformly and intensively processed, redistributed and transmitted, and the use and the maintenance are convenient; through the arrangement of the LED indicating lamps, the on-site sensor signals of the equipment are quickly connected through the wire stripping-free puncture type sensor, the electric signals are coupled and sampled through the photoelectric coupler, the corresponding LED indicating lamps are on to indicate the current input sensor signal state, NPN or PNP signals input into the sensor are operated through the logic NAND gate 74LS00IC to calculate an operation logic result, and then the operation logic result is output and distributed to a corresponding interface for transmission and use, so that the signal state can be conveniently and visually reflected; in addition, in order to prevent NPN or PNP signal errors caused by reverse connection of the power supply, a reverse connection preventing circuit is designed at the working power supply end by adopting a diode D, so that the working can be ensured to work only when the power supply is correctly connected, and time and labor are saved.
Of course, it is not necessary for any product in which the utility model is practiced to achieve all of the above-described advantages at the same time.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a circuit diagram of a micro digital logic signal distribution processing circuit according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it is to be understood that the terms "upper", "middle", "outer", "inner", and the like, indicate orientations or positional relationships, are used for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the referenced components or elements must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention.
Referring to fig. 1, the present invention is a micro digital logic signal distribution processing circuit, including nand gates U1: A, B, C, D and U2: A, B, C, D, light emitting diodes LD, LDA, LDB, LDC, LDD, resistors R1, R2, R3, R4, R5, R6, diodes MD, switches Ia, Ib, Ic, Id and power Vcc, wherein the nand gates U1: A, B, C, D and U2: A, B, C, D are both 74LS00 IC; two input ends of the NAND gate U2: D are respectively connected with output ends of the NAND gates U2: B, U2: C, two input ends of the NAND gate U2: B are respectively connected with the switch Id and the output end of the NAND gate U1: D, and two input ends of the NAND gate U2: C are respectively connected with the switch Ib and the output end of the NAND gate U2: A; two input ends of the NAND gate U1: D are respectively connected with the output ends of the NAND gates U1: A, U1: B, and two input ends of the NAND gate U2: A are respectively connected with the input ends of the NAND gates U1: B, U1: C; two input ends of the NAND gate U1, A, are respectively connected with the switches Ia and Ib, two input ends of the NAND gate U1, B, are respectively connected with the switches Ic and Ia, and two input ends of the NAND gate U1, C are respectively connected with the switches Ic and Id; the NPN or PNP signal input to the sensor is operated by the logic NAND gate 74LS00IC, the operation logic result is calculated, and then the output is distributed to the corresponding interface for transmission and use.
Preferably, the output end of the nand gate U2: D is connected with the anode of the light emitting diode LD, and the switches Ia, Ib, Ic and Id are all connected with the cathode of the diode MD through the resistor R1, so that the sensor signal of the equipment site can be quickly accessed through the wire stripping-free puncture type sensor, wherein the diode MD can prevent the power supply from being reversely connected, and the circuit safety is ensured.
Preferably, the anode of the light emitting diode LDA is connected to the switch Ia, the cathode is grounded through a resistor R3, the anode of the light emitting diode LDB is connected to the switch Ib, and the cathode is grounded through a resistor R4; the anode of the light emitting diode LDC is connected with the switch Ic, the cathode of the light emitting diode LDD is grounded through the resistor R5, the anode of the light emitting diode LDD is connected with the switch Id, the cathode of the light emitting diode LDD is grounded through the resistor R6, an electric signal is coupled and sampled through the photoelectric coupler, and the corresponding LED lamp is turned on to indicate the current input sensor signal state.
Preferably, the anode of the diode MD is connected to the power source Vcc, and the cathode of the light emitting diode LD is grounded through the resistor R2.
Example 1:
referring to table 1, the present embodiment is a truth table for output display of a micro digital logic signal distribution processing circuit:
in table 1, the input terminals X1, X2, X3 and X4 sequentially represent the operating states of the switches Ia, Ib, Ic and Id, where "1" is a closed input high level, "0" is an input low level, and the output terminal Y is the output state of the whole circuit.
Example 2:
as shown in table 2, the present embodiment is the model or parameter of some components in the present invention:
in the description herein, references to the description of "one embodiment," "an example," "a specific example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the utility model. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The preferred embodiments of the utility model disclosed above are intended to be illustrative only. The preferred embodiments are not intended to be exhaustive or to limit the utility model to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the utility model and the practical application, to thereby enable others skilled in the art to best utilize the utility model. The utility model is limited only by the claims and their full scope and equivalents.
Claims (4)
1. A miniature digital logic signal distribution processing circuit comprises NAND gates U1: A, B, C, D and U2: A, B, C, D, light emitting diodes LD, LDA, LDB, LDC, LDD, resistors R1, R2, R3, R4, R5, R6, diodes MD, switches Ia, Ib, Ic, Id and a power supply Vcc, and is characterized in that: two input ends of the NAND gate U2: D are respectively connected with output ends of the NAND gates U2: B, U2: C, two input ends of the NAND gate U2: B are respectively connected with the switch Id and the output end of the NAND gate U1: D, and two input ends of the NAND gate U2: C are respectively connected with the switch Ib and the output end of the NAND gate U2: A; two input ends of the NAND gate U1: D are respectively connected with the output ends of the NAND gates U1: A, U1: B, and two input ends of the NAND gate U2: A are respectively connected with the input ends of the NAND gates U1: B, U1: C; two input ends of the NAND gate U1: A are respectively connected with the switches Ia and Ib, two input ends of the NAND gate U1: B are respectively connected with the switches Ic and Ia, and two input ends of the NAND gate U1: C are respectively connected with the switches Ic and Id.
2. The miniature digital logic signal distribution processing circuit of claim 1, wherein the output terminal of the nand gate U2: D is connected to the anode of the led LD, and the switches Ia, Ib, Ic, Id are connected to the cathode of the diode MD through the resistor R1.
3. The micro digital logic signal distribution processing circuit of claim 1, wherein the anode of the light emitting diode LDA is connected to the switch Ia, the cathode thereof is connected to the ground through a resistor R3, the anode of the light emitting diode LDB is connected to the switch Ib, and the cathode thereof is connected to the ground through a resistor R4; the anode of the light emitting diode LDC is connected with the switch Ic, the cathode of the light emitting diode LDD is grounded through a resistor R5, the anode of the light emitting diode LDD is connected with the switch Id, and the cathode of the light emitting diode LDD is grounded through a resistor R6.
4. The distribution processing circuit of claim 1, wherein the anode of the diode MD is connected to the power supply voltage Vcc, and the cathode of the light emitting diode LD is connected to ground through the resistor R2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122103588.1U CN215990747U (en) | 2021-09-02 | 2021-09-02 | Miniature digital logic signal distribution processing circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122103588.1U CN215990747U (en) | 2021-09-02 | 2021-09-02 | Miniature digital logic signal distribution processing circuit |
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| Publication Number | Publication Date |
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| CN215990747U true CN215990747U (en) | 2022-03-08 |
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| CN202122103588.1U Active CN215990747U (en) | 2021-09-02 | 2021-09-02 | Miniature digital logic signal distribution processing circuit |
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2021
- 2021-09-02 CN CN202122103588.1U patent/CN215990747U/en active Active
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Inventor after: Ru Hongli Inventor after: Chen Jishan Inventor before: Ru Hongli Inventor before: Luo Mingyong Inventor before: Chen Jishan |