CN215990746U - Dry and wet node acquisition circuit with protection and line monitoring functions - Google Patents
Dry and wet node acquisition circuit with protection and line monitoring functions Download PDFInfo
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Abstract
The utility model discloses a dry and wet node acquisition circuit with protection and line monitoring, which comprises a matching module and an interface module which are sequentially connected, wherein the line is between the matching module and a dry and wet node, the line between the matching module and the dry and wet node comprises a connection line of the matching module, the matching module is used for being connected with the dry and wet node and transmitting a dry and wet node signal output by the dry and wet node to the interface module, the matching module can form a loop by itself and form a loop together with the connected dry and wet node through the line, and the interface module is used for accessing the dry and wet node signal and linearly converting the dry and wet node signal into a voltage signal capable of representing the state of the line, so that the line can be monitored. The utility model can improve the protection level of the circuit acquisition method and monitor the node signal transmission line in real time, and can judge whether the transmission line has a fault in real time so as to send out corresponding reminding information.
Description
Technical Field
The utility model relates to the technical field of dry and wet node acquisition circuits, in particular to a dry and wet node acquisition circuit with protection and line monitoring functions.
Background
At present, in the field of industrial control, various types of linkage control are common, and dry and wet node signals are common as linkage signals between different devices, so that a dry and wet node acquisition circuit is also a widely applied circuit and is also used as a commonly used interface, and an acquisition end is required to adapt to different types of node signals, and the smoothness (whether the circuit is disconnected or not) of a linkage control circuit can be monitored in real time in occasions with high linkage control effectiveness requirements, so that the node signal transmission is effective; the method is also an important ring for ensuring the linkage effectiveness for removing the external harmful interference possibly introduced by the long-distance transmission node signals. The existing node signal acquisition scheme still needs to be improved in transmission effectiveness, and particularly monitors whether a line is disconnected or not and acquires an acquired signal efficiently.
SUMMERY OF THE UTILITY MODEL
Aiming at the defects of the prior art, the utility model provides a dry and wet node acquisition circuit with protection and line monitoring, which can solve the problem of monitoring whether a line is disconnected or not while acquiring a node signal.
The technical scheme for realizing one purpose of the utility model is as follows: a dry and wet node acquisition circuit with protection and line monitoring comprises a matching module and an interface module which are sequentially connected, wherein the line is a line from the matching module to a dry and wet node, the line from the matching module to the dry and wet node comprises a connection line of the matching module,
the matching module is used for being connected with the dry and wet nodes and transmitting dry and wet node signals output by the dry and wet nodes to the interface module, the matching module can form a loop by itself through the line and form a loop together with the connected dry and wet nodes,
the interface module is used for accessing the dry and wet node signals and linearly converting the dry and wet node signals into voltage signals capable of representing the state of the line, so that the line is monitored.
Further, the matching module comprises a resistor R27, a resistor R28 and a plurality of cable terminals connected in series, wherein the first end of each cable terminal is connected with the interface module, the second end of each cable terminal is grounded, the cable terminals are also connected in series with the resistor R27, the resistor R28 is connected in parallel to the resistor R27, and two ends of the resistor R28 connected in parallel to the resistor R27 are used for being connected with the dry-wet node.
Further, the cable terminal includes a cable terminal P1 and a cable terminal P2, a first end of the cable terminal P1 is connected to the interface module, a second end is grounded, the cable terminal P1 is connected to the cable terminal P2, and the cable terminal P2 is connected to the resistor R27 in series.
Furthermore, the interface module comprises an overvoltage short-circuit prevention sub-module, a filtering sub-module and a bias voltage sub-module, wherein the output end of the overvoltage short-circuit prevention sub-module is connected with the input end of the filtering sub-module in series, the input end of the overvoltage short-circuit prevention sub-module is connected with the matching module, the output end of the filtering sub-module is connected with the isolation module, the connecting points of the overvoltage short-circuit prevention sub-module and the filtering sub-module are connected with the bias voltage sub-module together,
the overvoltage short circuit prevention submodule comprises a self-recovery fuse F1, a resistor R25, a diode D6 and a diode D7, the filtering submodule comprises a capacitor C11, a capacitor C12 and an inductor L1, the capacitor C11, the capacitor C12 and the inductor L1 form a pi-type filter,
the bias voltage submodule comprises a resistor R57 and a direct-current voltage connected with a resistor R57, one end of a self-recovery fuse F1 is connected with a first end of a cable terminal of the matching module, the other end of the self-recovery fuse F11 is connected with one end of a diode D6, one end of a diode D7, one end of a resistor R57, one end 1 of an inductor L and one end of a capacitor C12 after being connected with the resistor R25 in series, the other end of the diode D6 and the other end of the diode D7 are grounded respectively, the other end of the resistor R57 is connected with the direct-current voltage, the other end of the inductor L1 is connected with one end of the capacitor C11, the other end of the capacitor C11 is grounded, the connection position of the inductor L1 and the capacitor C11 serves as an output end of the interface module, and the voltage at the output end serves as a voltage for linearly converting a dry-wet node signal into a voltage signal capable of representing a line condition.
Further, the diode D7 is a zener diode, and the diode D6 is a transient suppression diode, for suppressing the interference voltage on the transmission cable in the slave matching module.
And the isolation module is used for performing electrical isolation and voltage linear conversion on the voltage signal output by the interface module, converting the voltage signal output by the interface module and outputting a final identification signal, so that dry and wet node signal acquisition is completed.
Further, the isolation module includes an isolation type DC-DC circuit and an isolation type signal amplification circuit, the isolation type DC-DC circuit includes a resistor R49, a capacitor C38, a capacitor EC9, a capacitor EC10 and a power module U7, one end of the resistor R49 is connected to a first voltage, the other end of the resistor R49, one end of the capacitor C38 and one end of the capacitor EC9 are connected together and then connected to an input end of the power module U7, the other end of the capacitor C38, the other end of the capacitor EC9 and a ground end of the power module U7 are connected together and grounded, an output end of the power module U7 is connected to one end of the capacitor EC10, and the connection is connected to the resistor R57 in the interface module to output the DC voltage to the resistor R57, the other end of the capacitor EC10 and a low voltage end of the power module U7 are connected together and then grounded, the power module U7 outputs a stable voltage after completely isolating the input voltage, thereby providing the isolated voltage to the interface module, The bias voltage of the voltage is stabilized and,
the isolation type signal amplification circuit comprises a resistor R52, a resistor R54, a resistor R55, a resistor R56, a capacitor C55, a capacitor C56, a capacitor EC11, an operational amplifier U11A, an operational amplifier U12A and a linear photoelectric coupler U10, wherein the input end of the operational amplifier U11A is connected with the output end of the interface module, the other input end of the operational amplifier U11A is respectively connected with one end of the resistor R55, the negative electrode of the capacitor EC 55 and the PDA 55 end of the linear photoelectric coupler U55, the other end of the resistor R55 is connected with one end of the capacitor C55 and then commonly grounded, the other end of the capacitor C55 is connected with the input end of the operational amplifier U11 55, the output end of the operational amplifier U11 55 is respectively connected with the positive electrode of the capacitor EC 55 and one end of the resistor R55, the other end of the resistor R55 is connected with the LEDA end of the linear photoelectric coupler U55, the LEDKK 55 of the linear photoelectric coupler U55 is grounded, and the PDK power supply 55 is connected with the PDU 3611, the two NC ends of the linear photocoupler U10 are in idle connection, the PDK2 end of the linear photocoupler U10 is connected with a third voltage, the PDA2 end of the linear photocoupler U10 is grounded and respectively connected with one end of the resistor R56 and the input end of the operational amplifier U12A, the other end of the resistor R56 is grounded, the other input end of the operational amplifier U12A is connected with the output end of the operational amplifier U12A, the output end of the operational amplifier U12A is sequentially connected with the resistor R54 and the capacitor C56 in series and then grounded, and the connection point between the resistor R54 and the capacitor C56 is the output end of the isolation type signal amplification circuit.
The circuit further comprises an identification module, wherein the identification module is connected with the isolation module and used for reading the output voltage of the isolation module and identifying the circuit condition according to the read voltage so as to output an identification result.
Furthermore, the identification module is a circuit formed by adopting a singlechip.
Further, the single chip microcomputer is an M487SIDAE of NUVOTON, an output voltage signal of the isolation module is connected into an AD input port of the single chip microcomputer, and the single chip microcomputer AD reads the size of an input signal.
The utility model has the beneficial effects that: according to the utility model, the matching module and the isolation module are added on the traditional dry and wet node acquisition circuit, so that the protection level of the acquisition circuit method can be improved, the node signal transmission line can be monitored in real time, and whether the transmission line has a fault or not can be judged in real time, so as to send out corresponding prompt information.
Drawings
FIG. 1 is a schematic diagram of a circuit without an identification module;
FIG. 2 is a circuit schematic of a matching module;
FIG. 2a is one of the schematic connection diagrams with an external device (control device in the figure);
FIG. 2b is one of the schematic connection diagrams with an external device (control device in the figure);
FIG. 3a is a schematic diagram of the line when normal (not open and short);
FIG. 3b is a schematic diagram of a line break;
FIG. 3c is a schematic diagram of a short circuit of the line;
FIG. 3d is a schematic diagram of a dry node to which the matching module is connected when not closed;
FIG. 3e is a schematic diagram of a dry node to which the matching module is connected when closed;
FIG. 3f is a schematic illustration of a wet node to which the matching module is connected when not closed;
FIG. 3g is a schematic diagram of a wet node to which the matching module is connected when closed;
FIG. 4 is a schematic diagram of an identification module formed by a single chip microcomputer and peripheral circuits thereof;
in the figure, 1-match block.
Detailed Description
The utility model is further described below with reference to the drawings and the specific embodiments.
As shown in fig. 1, fig. 2a, fig. 2b, fig. 3a to fig. 3g, a dry and wet node acquisition circuit with protection and line monitoring includes a matching module, an interface module and an isolation module, which are connected in sequence, the matching module is used for being connected with the dry and wet node and transmitting a dry and wet node signal output by the dry and wet node to the interface module, that is, the matching module is used for being connected with the dry and wet node and transmitting a dry and wet node signal output by the dry and wet node to the interface module, and the matching module can form a loop by itself through the line and form a loop together with the connected dry and wet node. The wet and dry nodes are external devices, such as the control devices in fig. 2a and 2b, the control devices in fig. 3d and 3e are dry nodes, and the control devices in fig. 3f and 3g are wet nodes. The interface module is used for accessing the dry and wet node signals and linearly converting the dry and wet node signals into voltage signals capable of representing line conditions, so that the line between the matching module and the dry and wet node is monitored, and the line between the matching module and the dry and wet node comprises a connecting line of the matching module. The isolation module is used for electrically isolating the interface module, converting the voltage signal output by the interface module and outputting a final identification signal, thereby completing the signal acquisition of the dry and wet nodes.
Referring to fig. 2, the matching module includes a resistor R27, a resistor R28, and a plurality of cable terminals connected in series, and the resistor R27, the resistor R28, and the cable terminals form a loop. In fig. 2, the cable terminal P1 has a first end connected to the interface module, a second end connected to ground, a cable terminal P1 connected to the cable terminal P2, a cable terminal P2 connected in series to the resistor R27, and a resistor R28 connected in parallel to the resistor R27. The resistor R28 is also connected between its ends to the wet and dry nodes, i.e. to external devices.
The interface module comprises an overvoltage short-circuit prevention submodule, a filtering submodule and a bias voltage submodule, wherein the output end of the overvoltage short-circuit prevention submodule is connected with the input end of the filtering submodule in series, the input end of the overvoltage short-circuit prevention submodule is connected with a matching module, the output end of the filtering submodule is connected with an isolation module, and the connecting point of the overvoltage short-circuit prevention submodule and the filtering submodule is connected with the bias voltage submodule together. The overvoltage and short circuit prevention submodule comprises a self-recovery fuse F1, a resistor R25, a diode D6 and a diode D7, the filtering submodule comprises a capacitor C11, a capacitor C12 and an inductor L1, the capacitor C11, the capacitor C12 and the inductor L1 form a pi-type filter, the bias voltage submodule comprises a resistor R57 and direct-current voltage connected with a resistor R57, the direct-current voltage of the embodiment is 5V, namely VDD 5V in the figure, namely the resistor R57 is connected to a direct-current voltage source with the voltage of 5V. One end of the self-recovery fuse F1 is connected to the first end of the cable terminal P1 of the matching module, and the other end is connected in series with the resistor R25 and then connected to one end of the diode D6, one end of the diode D7, one end of the resistor R57, one end 1 of the inductor L, and one end of the capacitor C12, respectively. The other end of the diode D6 and the other end of the diode D7 are grounded, the other end of the resistor R57 is connected to the dc voltage, the other end of the inductor L1 is connected to one end of the capacitor C11, and the other end of the capacitor C11 is grounded. The junction of the inductor L1 and the capacitor C11 (at U1 in the figure) is denoted as the output terminal of the interface module.
The diode D7 is a zener diode, and the diode D6 is a transient suppression diode, so that the interference voltage on the transmission cable in the slave matching module can be suppressed. The resistor R25 also has the function of protecting the reverse connection of the polarity of the wet node, and the phenomenon that the polarity of the node line is connected in a wrong way to damage the acquisition circuit is avoided.
The isolation module includes an isolation type DC-DC circuit and an isolation type signal amplification circuit, the isolation type DC-DC circuit includes a resistor R49, a capacitor C38, a capacitor EC9, a capacitor EC10, and a power module U7, one end of the resistor R49 is connected to a first voltage (+ 5V in the drawing), in this embodiment, the first voltage is 5V, and of course, a specific voltage value of the first voltage may be adjusted according to an actual situation. The other end of the resistor R49, one end of the capacitor C38, and one end of the capacitor EC9 are connected to the input terminal (Vin pin in the drawing) of the power module U7, the other end of the capacitor C38, the other end of the capacitor EC9, and the ground terminal (GND pin in the drawing) of the power module U7 are connected to the ground, the output terminal (Vo pin in the drawing) of the power module U7 is connected to one end of the capacitor EC10, and the connection is connected to the resistor R57 in the interface module, so that a 5V dc voltage is output to the resistor R57, that is, the dc voltage is the dc voltage connected to the resistor R57 in the interface module. The other end of the capacitor EC10 is commonly connected to the low voltage terminal (pin 0V in the figure, i.e., pin 3) of the power module U7 and then grounded. The power supply module U7 isolates the input 5V voltage and outputs a stable 5V voltage, thereby providing an electrically isolated and stable bias voltage to the interface module.
The isolation type signal amplifying circuit comprises a resistor R52, a resistor R54, a resistor R55, a resistor R56, a capacitor C55, a capacitor C56, a capacitor EC11, an operational amplifier U11A, an operational amplifier U12A and a linear photoelectric coupler U10. The input (pin 3 in the figure) of the operational amplifier U11A is connected to the output of the interface module, i.e. to the junction U1 in the interface module. The other input end of the operational amplifier U11A is connected to one end of a resistor R55, the negative electrode of a capacitor EC11, and the PDA1 end (pin 4 in the figure) of the linear photocoupler U10, the other end of the resistor R55 is connected to one end of a capacitor C55 and then commonly grounded, and the other end of the capacitor C55 is connected to the input end (pin 3 in the figure) of the operational amplifier U11A. The output terminal (pin 1 in the figure) of the operational amplifier U11A is respectively connected with the positive electrode of a capacitor EC11 and one end of a resistor R52, the other end of the resistor R52 is connected with the LEDA terminal (pin 2 in the figure) of a linear photocoupler U10, the LEDK terminal (pin 1 in the figure) of the linear photocoupler U10 is grounded, the PDK1 terminal (pin 3 in the figure) of the linear photocoupler U10 is connected with the positive power voltage of the operational amplifier U11A (i.e., +12VF in the figure), the two NC terminals (pin 7 and pin 8 in the figure) of the linear photocoupler U10 are in idle connection, i.e., are not connected with anything, the PDK2 terminal (pin 6 in the figure) of the linear photocoupler U10 is connected with a voltage of 5.1V, the 2 terminal (pin 5 in the figure) of the linear photocoupler U10 is grounded with one end of a PDA R56, the input terminal (pin 3 in the figure) of the operational amplifier U12A and the other end of the resistor R56 is grounded, the other input end (pin 2 in the figure) of the operational amplifier U12A is connected with the output end (pin 1 in the figure) of the operational amplifier U12A, the output end of the operational amplifier U12A is also connected in series with the resistor R54 and the capacitor C56 in sequence and then grounded, and the connection point between the resistor R54 and the capacitor C56 is the output end of the isolation type signal amplification circuit (i.e., the node PB11/AD11 in the figure).
The isolation module is used for electrically isolating and linearly converting the voltage signal output by the interface module (i.e. the voltage at U1), and isolating the bias voltage. The isolated DC-DC circuit is capable of providing an isolated interface bias voltage.
The working principle is as follows: in this embodiment, the resistance of the resistor R57 is 4.7K, the resistance of the resistor R25 is 2.2K, the resistance of the resistor R27 is 2.2K, and the resistance of the resistor R28 is 10K.
As shown in fig. 3a, when the line is normal, a 5V bias voltage forms a loop through the resistor R57, the resistor R25, the resistor R27, and the resistor R28, and the voltage U1 at the U1 is a divided voltage of the resistor R25, the resistor R27, and the resistor R28, so that the voltage U1 is 3.8V.
As shown in fig. 3b, when the line is opened, the cable between the cable terminal P1 and the cable terminal P2 is disconnected, and the bias voltage of 5V cannot form a loop, so the voltage U1 is 5V.
As shown in fig. 3c, when the line is short-circuited, the bias voltage of 5V forms a loop through a certain point between the cable terminal P1 and the cable terminal P2, and the voltage U1 at U1 is the divided voltage of the resistor R25, so that the voltage U1 is 1.6V, that is, U1 is R25/(R25+ R57) is 2.2/(2.2+4.7) is 1.6V.
As shown in fig. 3d, when the connected dry node is not closed, the line is in a normal state, so that the voltage U1 is 3.8V.
As shown in fig. 3e, the dry node connected is closed, the resistor R28 is short-circuited, and the dry contact signal can be effectively transmitted, where the voltage U1 is 2.4V,
that is, U1 ═ R25+ R27)/(R57+ R25+ R27 ═ 4.4/9.1 ═ 2.4V.
As shown in fig. 3f, when the connected wet node is not closed, the line is in a normal state, so that the voltage U1 is 3.8V.
As shown in fig. 3g, when the connected wet node is closed, the VCC voltage of the wet node is applied to both ends of the resistor R28 (in this embodiment, the VCC voltage is DC12-48V), the VCC voltage of the wet node forms a loop through the resistor R27, the resistor R25, and the zener diode D7, and the zener diode D7 regulates the VCC voltage to 4.3V, so the voltage U1 is 4.3V.
From the above, the voltage value at the output end of the interface module (i.e. at U1) can reflect the line status, and the corresponding relationship between the voltage U1 and the line status is: the line is normal-U1 is 3.8V; open-circuit-U1 ═ 5V; short circuit-U1 ═ 1.6V; dry node closure-U1 ═ 2.4V; wet node closure — U1 ═ 4.3V. Therefore, the state information of the dry and wet nodes and the circuit can be read only by reading the output voltage U1 at the output end of the interface module, and the collection of the dry and wet nodes is completed.
When the voltage U1 passes through the isolation module, the isolation module linearly amplifies the voltage U1, and the output voltage of the isolation module (i.e., the output terminal of PB11/AD11 in fig. 1) still corresponds to the line condition one by one, so that the line condition can be identified by reading the output voltage of the isolation module, and the purpose of monitoring the wet and dry node acquisition circuit is achieved.
In an optional implementation manner, the isolation circuit further comprises an identification module, wherein the identification module is connected with the isolation module and used for reading the output voltage of the isolation module, identifying the condition of the line according to the read voltage and outputting an identification result. The identification module can adopt a circuit formed based on a single chip microcomputer, refer to fig. 4, adopt the identification module formed by the single chip microcomputer and peripheral circuits thereof, the peripheral circuits contain an external watchdog circuit, the single chip microcomputer U3 in fig. 4 adopts M487SIDAE of NUVOTON, an output voltage signal of the isolation module is accessed into an AD input port of the single chip microcomputer U3, the AD input port of the single chip microcomputer is adopted to read the size of an input signal to identify the condition and the line state of a collection node signal, and then state information in other forms is output according to the functional requirements of equipment where the actual circuit is located. Other specific components of the peripheral circuit shown in fig. 4 are configured to meet other requirements of actual processing, and are not directly related to the circuit monitoring function, and therefore are not described herein again.
According to the utility model, the matching module and the isolation module are added on the traditional dry and wet node acquisition circuit, so that the protection level of the acquisition circuit method can be improved, the real-time monitoring on the node signal transmission line can be realized, and whether the transmission line has a fault or not can be judged in real time so as to send corresponding reminding information, for example, once the transmission line has a fault, an alarm can be sent in real time to remind a maintainer to process.
The embodiments disclosed in this description are only an exemplification of the single-sided characteristics of the utility model, and the scope of protection of the utility model is not limited to these embodiments, and any other functionally equivalent embodiments fall within the scope of protection of the utility model. Various other changes and modifications to the above-described embodiments and concepts will become apparent to those skilled in the art from the above description, and all such changes and modifications are intended to be included within the scope of the present invention as defined in the appended claims.
Claims (10)
1. A dry and wet node acquisition circuit with protection and line monitoring is characterized by comprising a matching module and an interface module which are sequentially connected, wherein the line is a line from the matching module to a dry and wet node, the line from the matching module to the dry and wet node comprises a self-connecting line in the matching module,
the matching module is used for being connected with the dry and wet nodes and transmitting dry and wet node signals output by the dry and wet nodes to the interface module, the matching module can form a loop by itself through the line and form a loop together with the connected dry and wet nodes,
the interface module is used for accessing the dry and wet node signals and linearly converting the dry and wet node signals into voltage signals capable of representing the state of the line, so that the line is monitored.
2. The dry and wet node acquisition circuit with protection and line monitoring as claimed in claim 1, wherein the matching module comprises a resistor R27, a resistor R28 and a plurality of cable terminals connected in series, a first end of each cable terminal is connected with the interface module, a second end of each cable terminal is connected with ground, each cable terminal is further connected with a resistor R27 in series, the resistor R28 is connected with the resistor R27 in parallel, and two ends of the resistor R28 connected with the resistor R27 in parallel are used for being connected with the dry and wet node.
3. The dry and wet node acquisition circuit with protection and line monitoring as claimed in claim 2, wherein the cable terminal comprises a cable terminal P1 and a cable terminal P2, the first end of the cable terminal P1 is connected to the interface module, the second end is grounded, the cable terminal P1 is connected to the cable terminal P2, and the cable terminal P2 is connected in series with a resistor R27.
4. The dry and wet node acquisition circuit with protection and line monitoring as claimed in claim 3, wherein the interface module comprises an overvoltage short-circuit prevention sub-module, a filtering sub-module and a bias voltage sub-module, an output end of the overvoltage short-circuit prevention sub-module is connected in series with an input end of the filtering sub-module, an input end of the overvoltage short-circuit prevention sub-module is connected with the matching module, an output end of the filtering sub-module is connected with the isolation module, a connection point of the overvoltage short-circuit prevention sub-module and the filtering sub-module is commonly connected with the bias voltage sub-module,
the overvoltage short circuit prevention submodule comprises a self-recovery fuse F1, a resistor R25, a diode D6 and a diode D7, the filtering submodule comprises a capacitor C11, a capacitor C12 and an inductor L1, the capacitor C11, the capacitor C12 and the inductor L1 form a pi-type filter,
the bias voltage submodule comprises a resistor R57 and a direct-current voltage connected with a resistor R57, one end of a self-recovery fuse F1 is connected with a first end of a cable terminal of the matching module, the other end of the self-recovery fuse F11 is connected with one end of a diode D6, one end of a diode D7, one end of a resistor R57, one end 1 of an inductor L and one end of a capacitor C12 after being connected with the resistor R25 in series, the other end of the diode D6 and the other end of the diode D7 are grounded respectively, the other end of the resistor R57 is connected with the direct-current voltage, the other end of the inductor L1 is connected with one end of the capacitor C11, the other end of the capacitor C11 is grounded, the connection position of the inductor L1 and the capacitor C11 serves as an output end of the interface module, and the voltage at the output end serves as a voltage for linearly converting a dry-wet node signal into a voltage signal capable of representing a line condition.
5. The dry and wet node acquisition circuit with protection and line monitoring of claim 4 wherein diode D7 is a zener diode and diode D6 is a transient suppressor diode for suppressing interference voltages on the transmission cable in the slave matching module.
6. The dry and wet node acquisition circuit with protection and line monitoring function according to claim 5, further comprising an isolation module, wherein the isolation module is used for performing electrical isolation and voltage linear conversion on the voltage signal output by the interface module, and outputting a final identification signal after performing conversion processing on the voltage signal output by the interface module, so as to complete the dry and wet node signal acquisition.
7. The dry and wet node acquisition circuit with protection and line monitoring as claimed in claim 6, wherein the isolation module comprises an isolation type DC-DC circuit and an isolation type signal amplification circuit, the isolation type DC-DC circuit comprises a resistor R49, a capacitor C38, a capacitor EC9, a capacitor EC10 and a power module U7, one end of the resistor R49 is connected with the first voltage, the other end of the resistor R49, one end of the capacitor C38 and one end of the capacitor EC9 are connected together and then connected with the input end of the power module U7, the other end of the capacitor C38, the other end of the capacitor EC9 and the grounding end of the power module U7 are connected together to ground, the output end of the power module U7 is connected with one end of the capacitor EC10, and the connection is connected with the resistor R57 in the interface module to output the direct current voltage to the resistor R57, the other end of the capacitor EC10 is connected together with the low voltage end of the power module U7 and then connected to ground, the power supply module U7 outputs a regulated voltage after completely electrically isolating the input voltage, thereby providing an isolated, regulated bias voltage to the interface module,
the isolation type signal amplification circuit comprises a resistor R52, a resistor R54, a resistor R55, a resistor R56, a capacitor C55, a capacitor C56, a capacitor EC11, an operational amplifier U11A, an operational amplifier U12A and a linear photoelectric coupler U10, wherein the input end of the operational amplifier U11A is connected with the output end of the interface module, the other input end of the operational amplifier U11A is respectively connected with one end of the resistor R55, the negative electrode of the capacitor EC 55 and the PDA 55 end of the linear photoelectric coupler U55, the other end of the resistor R55 is connected with one end of the capacitor C55 and then commonly grounded, the other end of the capacitor C55 is connected with the input end of the operational amplifier U11 55, the output end of the operational amplifier U11 55 is respectively connected with the positive electrode of the capacitor EC 55 and one end of the resistor R55, the other end of the resistor R55 is connected with the LEDA end of the linear photoelectric coupler U55, the LEDKK 55 of the linear photoelectric coupler U55 is grounded, and the PDK power supply 55 is connected with the PDU 3611, the two NC ends of the linear photocoupler U10 are in idle connection, the PDK2 end of the linear photocoupler U10 is connected with a third voltage, the PDA2 end of the linear photocoupler U10 is grounded and respectively connected with one end of the resistor R56 and the input end of the operational amplifier U12A, the other end of the resistor R56 is grounded, the other input end of the operational amplifier U12A is connected with the output end of the operational amplifier U12A, the output end of the operational amplifier U12A is sequentially connected with the resistor R54 and the capacitor C56 in series and then grounded, and the connection point between the resistor R54 and the capacitor C56 is the output end of the isolation type signal amplification circuit.
8. The dry and wet node acquisition circuit with protection and line monitoring function according to claim 7, further comprising an identification module, wherein the identification module is connected with the isolation module and used for reading the output voltage of the isolation module and identifying the line condition according to the read voltage so as to output an identification result.
9. The dry and wet node acquisition circuit with protection and line monitoring as claimed in claim 8, wherein the identification module is a circuit formed based on a single chip microcomputer.
10. The dry and wet node acquisition circuit with protection and line monitoring as claimed in claim 9, wherein the single chip microcomputer is a NUVOTON M487SIDAE, an output voltage signal of the isolation module is connected to an AD input port of the single chip microcomputer, and the single chip microcomputer AD reads the magnitude of the input signal.
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| CN202122345532.7U CN215990746U (en) | 2021-09-27 | 2021-09-27 | Dry and wet node acquisition circuit with protection and line monitoring functions |
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| CN202122345532.7U CN215990746U (en) | 2021-09-27 | 2021-09-27 | Dry and wet node acquisition circuit with protection and line monitoring functions |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023045068A1 (en) * | 2021-09-27 | 2023-03-30 | 广州市保伦电子有限公司 | Dry and wet node acquisition circuit having protection and line monitoring functions |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2023045068A1 (en) * | 2021-09-27 | 2023-03-30 | 广州市保伦电子有限公司 | Dry and wet node acquisition circuit having protection and line monitoring functions |
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Address after: No. 56 Nanli East Road, Shiqi Town, Panyu District, Guangzhou City, Guangdong Province, 510000 Patentee after: Guangdong Baolun Electronics Co.,Ltd. Address before: No.19 Chuangyuan Road, Zhongcun street, Panyu District, Guangzhou, Guangdong 510000 Patentee before: GUANGZHOU ITC ELECTRONIC TECHNOLOGY Co.,Ltd. |