CN215933600U

CN215933600U - Encapsulation sealing structure for microelectronic integrated chip set

Info

Publication number: CN215933600U
Application number: CN202122097893.4U
Authority: CN
Inventors: 荆昊
Original assignee: Shenzhen Jinggong Electronic Technology Co ltd
Current assignee: Shenzhen Jinggong Electronic Technology Co ltd
Priority date: 2021-09-01
Filing date: 2021-09-01
Publication date: 2022-03-01
Anticipated expiration: 2031-09-01

Abstract

The utility model relates to the technical field of microelectronic packaging, in particular to a packaging and sealing structure for a microelectronic integrated chip set. It includes the casing, the casing top is provided with sealed roof, the cavity has been seted up to sealed roof lower surface, fixed mounting has the base plate in the cavity, both ends edge is provided with the pin electrode around the base plate upper surface is close to, both ends edge is provided with first pin around the base plate lower surface is close to, the bottom plate lower surface is located under the bayonet socket fixed mounting has the second pin, both ends edge is provided with the buckle about the bottom plate upper surface is close to, detachable bottom plate through setting up, the bottom plate passes through the bayonet socket and pegs graft the cooperation with the grafting foot, realize the extension to the grafting foot, under the prerequisite that does not influence chipset encapsulation signal transmission, the dismantlement of pin has been realized, the grafting foot on the base plate adopts to hide to install in the cavity, can avoid first pin because unexpected bending, it is not hard up, influence the problem of casing leakproofness.

Description

Encapsulation sealing structure for microelectronic integrated chip set

Technical Field

The utility model relates to the technical field of microelectronic packaging, in particular to a packaging and sealing structure for a microelectronic integrated chip set.

Background

The package for the microelectronic integrated chip group can protect the chip from the external environment or less from the external environment, and provides a good working condition for the chip, so that the integrated circuit has stable and normal functions. However, when the conventional microelectronic integrated chip package is transported and carried, the package pins have longer portions extending to the outside of the package housing, so that the package can be conveniently inserted and welded.

SUMMERY OF THE UTILITY MODEL

The utility model provides a packaging and sealing structure for a microelectronic integrated chip set, aiming at the technical problems of the packaging and sealing structure for the microelectronic integrated chip set.

In order to achieve the purpose, the utility model adopts the technical scheme that the utility model provides a packaging and sealing structure for a microelectronic integrated chip set, which comprises a shell, wherein a sealing top plate is arranged at the top of the shell, a cavity is formed in the lower surface of the sealing top plate, a substrate is fixedly arranged in the cavity, pin electrodes are arranged on the upper surface of the substrate close to the edges of the front end and the rear end, first pins are arranged on the lower surface of the substrate close to the edges of the front end and the rear end, a bottom plate is clamped and installed at the bottom of the shell, a plurality of plug sockets are uniformly arranged on the upper surface of the bottom plate close to the edges of the front end and the rear end, second pins are fixedly installed on the lower surface of the bottom plate under the plug sockets, and buckles are arranged on the upper surface of the bottom plate close to the edges of the left end and the right end.

As a further improvement of the technical scheme, sliding grooves are formed in the inner walls of the left side and the right side of the cavity, buckling grooves are formed in the tops of the sliding grooves, and the first pins are arranged in the cavity.

As a further improvement of the technical scheme, an elastic lug is arranged on one side of the top of the buckle, the buckle is clamped with the buckle groove through the elastic lug, and the size of the sliding groove is matched with that of the elastic lug.

As a further improvement of the technical solution, the pin electrode penetrates through the substrate and is welded and fixed with the first pin, and the first pin is fixedly mounted on the lower surface of the substrate.

As a further improvement of the technical scheme, the upper surface of the plug socket is provided with a plug groove, a needle groove is formed in the plug groove, and the plug socket penetrates through the bottom plate and is welded and fixed with the second pins.

As a further improvement of the technical scheme, a pin is arranged on the surface of the side wall of the first pin, the first pin is in plug-in fit with the plug-in groove through the pin, the pin is in plug-in fit with the pin groove, and the height of the first pin is lower than the lower surface of the cavity.

As a further improvement of the technical scheme, the height of the plug socket is greater than that of the buckle, and the plug socket is matched with the first pin.

Compared with the prior art, the utility model has the beneficial effects that:

in this encapsulation seal structure for microelectronic integrated chip group, through the detachable bottom plate that sets up, the bottom plate passes through the plug socket and pegs graft the cooperation with the plug pin, realizes extension, the extension to the plug pin, under the prerequisite that does not influence chipset encapsulation signal transmission, has realized dismantling of pin, and the plug pin on the base plate adopts to hide to install in the cavity, can avoid first pin because unexpected bending, not hard up, influences the problem of casing leakproofness.

Drawings

FIG. 1 is a schematic overall structure diagram of an embodiment of the present invention;

FIG. 2 is a schematic sectional view of a housing according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of the overall explosive structure of an embodiment of the present invention;

FIG. 4 is an enlarged schematic view of structure A of FIG. 3 in accordance with an embodiment of the present invention;

FIG. 5 is a schematic view of a substrate structure according to an embodiment of the present invention;

FIG. 6 is an enlarged schematic view of structure B of FIG. 5 in accordance with an embodiment of the present invention;

FIG. 7 is a schematic diagram of a bottom plate structure according to an embodiment of the present invention;

fig. 8 is an enlarged schematic view of structure C of fig. 7 in an embodiment of the present invention.

The various reference numbers in the figures mean:

1. a housing; 101. a cavity; 102. a chute; 103. buckling grooves; 104. sealing the top plate;

2. a substrate; 201. a pin electrode; 202. a first pin; 2021. leading a needle;

3. a base plate; 301. a socket; 3011. inserting grooves; 3012. a needle groove; 302. a second pin; 303. buckling; 3031. an elastic bump.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the description of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations and positional relationships based on those shown in the drawings, and are used only for convenience of description and simplicity of description, and do not indicate or imply that the equipment or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be considered as limiting the present invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.

The embodiment of the utility model provides a packaging and sealing structure for a microelectronic integrated chip set, as shown in fig. 1-8, the packaging and sealing structure comprises a shell 1, a sealing top plate 104 is arranged at the top of the shell 1, a cavity 101 is formed in the lower surface of the sealing top plate 104, a substrate 2 is fixedly installed in the cavity 101, the substrate 2 is matched with the cavity 101 in size, the cavity 101 is sealed through the substrate 2, pin electrodes 201 are arranged on the upper surface of the substrate 2 close to the front end edge and the rear end edge, first pins 202 are arranged on the lower surface of the substrate 2 close to the front end edge and the rear end edge, a bottom plate 3 is installed at the bottom of the shell 1 in a clamping mode, a plurality of plug sockets 301 are uniformly arranged on the upper surface of the bottom plate 3 close to the front end edge and the rear end edge, second pins 302 are fixedly installed on the lower surface of the bottom plate 3 under the plug sockets 301, and buckles 303 are arranged on the upper surface of the bottom plate 3 close to the left end edge and the right end edge.

In order to meet the requirement of clamping between the buckle 303 and the buckle groove 103, the sliding grooves 102 are formed in the inner walls of the left side and the right side of the cavity 101, the buckle groove 103 is formed in the top of the sliding groove 102, the bottom plate 3 and the shell 1 are clamped and mounted, the first pin 202 is arranged in the cavity 101, the first pin 202 is hidden and arranged in the cavity 101, and the first pin 202 is protected by the cavity 101 to prevent collision.

In order to ensure that the buckle 303 and the buckle groove 103 can be normally clamped, one side of the top of the buckle 303 is provided with an elastic bump 3031, in order to realize the clamping connection of the elastic bump 3031 and the buckle groove 103, the elastic bump 3031 protrudes to the outer side of the edge of the bottom plate 3, the buckle 303 is clamped with the buckle groove 103 through the elastic bump 3031, the size of the sliding groove 102 is matched with that of the elastic bump 3031, and when the buckle 303 moves upwards along the cavity 101 along with the bottom plate 3, the elastic bump 3031 moves upwards along the sliding groove 102 until the elastic bump 3031 is clamped into the buckle groove 103.

In order to ensure the sealing performance of the substrate 2 to the cavity 101 and ensure the electrical connection between the pin electrode 201 and the first pin 202, the pin electrode 201 provided by the utility model penetrates through the substrate 2 and is welded and fixed with the first pin 202, the first pin 202 is fixedly arranged on the lower surface of the substrate 2, the first pin 202 is electrically connected with the pin electrode 201, and the pin electrode 201 is electrically connected with a chip arranged on the surface of the substrate 2.

Further, in order to electrically connect the plugging slot 3011 with the second pin 302 and ensure normal transmission of signals through the second pin 302, the plugging slot 3011 is formed on the upper surface of the plugging seat 301 provided by the present invention, the pin slot 3012 is formed in the plugging slot 3011, the plugging seat 301 penetrates through the bottom plate 3 and is welded and fixed with the second pin 302, and the plugging slot 3011 is electrically connected with the second pin 302.

Specifically, in order to meet the requirement that the signal of the plugging slot 3011 and the first pin 202 can be transmitted normally and stably, the surface of the side wall of the first pin 202 is provided with the lead 2021, the first pin 202 is plugged and matched with the plugging slot 3011 through the lead 2021, the lead 2021 is plugged and matched with the pin slot 3012, the stability of signal connection between the first pin 202 and the pin slot 3012 is ensured, the lead 2021 is tightly attached to the pin slot 3012, and the height of the first pin 202 is lower than the lower surface of the cavity 101.

In order to ensure that the socket 301 can be normally and stably inserted and matched with the first pins 202, the height of the socket 301 provided by the utility model is greater than that of the buckles 303, so that when the buckles 303 are clamped into the buckle grooves 103, the substrate 2 is positioned right above the socket 301, the safety of the substrate 2 is ensured, the socket 301 and the first pins 202 can be normally inserted and matched, the socket 301 is matched with the first pins 202, and the socket 301 can be inserted and matched with the first pins 202.

When the utility model is used specifically, the buckle 303 on the bottom plate 3 is aligned with the sliding groove 102 up and down, the first pin 202 is aligned with the inserting groove 3011 up and down, the bottom plate 3 moves along the sliding groove 102 in the cavity 101 towards the direction of the substrate 2 until the elastic bump 3031 is clamped into the buckle groove 103, the bottom plate 3 is clamped and installed in the cavity 101, at the moment, the first pin 202 is inserted and installed in the inserting groove 3011, the guide pin 2021 is inserted and tightly attached to the pin groove 3012, the extension of the first pin 202 is realized through clamping the installed bottom plate 3, the first pin 202 is hidden and installed in the cavity 101 along with the substrate 2, the shell 1 and the bottom plate 3 are stored and transported separately, and the problem that the first pin 202 is bent and loosened to affect the sealing performance of the shell 1 can be avoided.

The foregoing shows and describes the general principles, essential features, and advantages of the utility model. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and the preferred embodiments of the present invention are described in the above embodiments and the description, and are not intended to limit the present invention. The scope of the utility model is defined by the appended claims and equivalents thereof.

Claims

1. A packaging and sealing structure for a microelectronic integrated chip set is characterized in that: including casing (1), casing (1) top is provided with sealed roof (104), cavity (101) have been seted up to sealed roof (104) lower surface, fixed mounting has base plate (2) in cavity (101), both ends edge is provided with pin electrode (201) around base plate (2) upper surface is close to, both ends edge is provided with first pin (202) around base plate (2) lower surface is close to, bottom plate (3) are installed to casing (1) bottom joint, both ends edge evenly is provided with a plurality of sockets (301) around bottom plate (3) upper surface is close to, bottom plate (3) lower surface is located under socket (301) fixed mounting has second pin (302), both ends edge is provided with buckle (303) about bottom plate (3) upper surface is close to.

2. A package sealing structure for a microelectronic integrated chip set according to claim 1, characterized in that: the cavity is characterized in that sliding grooves (102) are formed in the inner walls of the left side and the right side of the cavity (101), buckling grooves (103) are formed in the tops of the sliding grooves (102), and the first pins (202) are arranged in the cavity (101).

3. A package sealing structure for a microelectronic integrated chip set according to claim 2, characterized in that: an elastic bump (3031) is arranged on one side of the top of the buckle (303), the buckle (303) is clamped with the buckle groove (103) through the elastic bump (3031), and the size of the sliding groove (102) is matched with that of the elastic bump (3031).

4. A package sealing structure for a microelectronic integrated chip set according to claim 1, characterized in that: the pin electrode (201) penetrates through the substrate (2) and is fixedly welded with the first pin (202), and the first pin (202) is fixedly installed on the lower surface of the substrate (2).

5. A package sealing structure for a microelectronic integrated chip set according to claim 1, characterized in that: plug socket (301) upper surface has seted up bayonet socket (3011), seted up needle groove (3012) in bayonet socket (3011), bayonet socket (301) run through bottom plate (3) with second pin (302) welded fastening.

6. The package sealing structure for the microelectronic integrated chip set according to claim 5, wherein: the surface of the side wall of the first pin (202) is provided with a guide pin (2021), the first pin (202) is in insertion fit with the insertion groove (3011) through the guide pin (2021), the guide pin (2021) is in insertion fit with the pin groove (3012), and the height of the first pin (202) is lower than the lower surface of the cavity (101).

7. A package sealing structure for a microelectronic integrated chip set according to claim 1, characterized in that: the height of the plug socket (301) is larger than that of the buckle (303), and the plug socket (301) is matched with the first pin (202).