CN215871201U - High-voltage direct-current input double-tube flyback converter stacking circuit - Google Patents
High-voltage direct-current input double-tube flyback converter stacking circuit Download PDFInfo
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- CN215871201U CN215871201U CN202122244272.4U CN202122244272U CN215871201U CN 215871201 U CN215871201 U CN 215871201U CN 202122244272 U CN202122244272 U CN 202122244272U CN 215871201 U CN215871201 U CN 215871201U
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Abstract
The utility model discloses a high-voltage direct-current input double-tube flyback converter stacking circuit, and belongs to the technical field of switching power supplies. The double-tube flyback power amplifier comprises double-tube flyback stack circuits, a multi-path driving isolation circuit of a switch tube and a driving signal power amplification circuit of the switch tube, wherein the double-tube flyback stack circuits comprise capacitors C1 and C2, MOS switch tubes Q1-Q4, main power transformers T1 and T2, diodes D1-D6, resistors R1-R5, capacitors CE1 and CE 2. In a dual-transistor flyback stacked circuit. Under the control of a driving signal, 4 MOS tubes are synchronously switched on and off, the charging and discharging time of the bus capacitors C1 and C2 in each period is balanced, the input high voltage is divided into two, the switching-off voltage of the switching tubes is reduced, the loss is reduced, MOS with lower voltage can be used, the cost is reduced, and the reliability is improved.
Description
Technical Field
The utility model relates to a high-voltage direct-current input double-tube flyback converter stacking circuit, and belongs to the technical field of switching power supplies.
Background
The flyback converter has the advantages of simple structure, convenience in multi-path output, maturity, stability and the like, and is widely applied to various electronic products. In a traditional commercial power and power supply system, alternating current is rectified into direct current, the voltage is within 1000V, and a high-voltage low-current MOS on the market at present can also meet the application requirement; however, in a high-voltage high-power converter, especially a two-level high-voltage frequency conversion cascade power unit, the voltage of a direct-current bus rectified by an input power grid is very high, the fluctuation of 10% of the input voltage and the rising absorption energy of the direct-current bus in the speed reduction process of the frequency converter need to be considered, and the direct-current voltage can reach 3000VDC or even higher. Thus, there is a challenge in designing and demanding the auxiliary power supply in these systems, which require the input of the auxiliary power supply to accommodate not only high dc voltage input, but also widely fluctuating dc bus voltage, and even greater reliability. For this reason, there is a need for a switching power supply configuration that can satisfy both of these situations as an auxiliary power supply for such systems in order to solve the above-described problems. The bipolar advantage of the insulated gate has the advantages of high input impedance, small driving power, good switching characteristic and the like, is an ideal fully-controlled device, and is widely applied to power electronic equipment. The high voltage is divided into a plurality of equal voltages, a series structure of a double-tube reverse excitation topological stacked converter is used, the scheme is an effective scheme with feasibility, the input direct current high voltage is divided into a plurality of equally divided voltages through a resistor and a capacitor at a static moment, an MOS (metal oxide semiconductor) combined driving circuit is provided, the consistency and the balance of driving signals of a switching tube of double-tube reverse excitation and a switching tube of a stacked structure are ensured, and the problem of voltage balance at the moment of high-frequency action of dynamic switching is solved.
Disclosure of Invention
The technical problem to be solved by the utility model is as follows: the stacked circuit of the double-tube flyback converter with the high-voltage direct-current input solves the problem of voltage balance of a dynamic switch at a high-frequency action moment.
The technical problem to be solved by the utility model is realized by adopting the following technical scheme:
a double-tube flyback converter stacking circuit with high-voltage direct-current input comprises double-tube flyback stacking circuits, wherein each double-tube flyback stacking circuit comprises capacitors C1 and C2, MOS switching tubes Q1-Q4, main power transformers T1 and T2, diodes D1-D6, resistors R1-R5 and capacitors CE1 and CE 2;
one end of the capacitor C1 is connected with a direct current bus POS end, the other end of the capacitor C1 is connected with the C2 in series, the other end of the capacitor C2 is connected with a ground end HV GND, two ends of the capacitor C1 are connected with a resistor R1 in parallel, and two ends of the capacitor C2 are connected with a resistor R2 in parallel;
the D pole of the MOS switch tube Q1 is connected with the POS end of the direct-current bus and the cathode of the diode D1, the G pole of the MOS switch tube Q1 is connected with the Q1G end, the S pole of the MOS switch tube Q1 is connected with one end of the primary side N1 of the main power transformer T1 and the cathode of the diode D3, and the S pole of the MOS switch tube Q1 is connected with the Q1E end;
the D pole of the MOS switch tube Q2 is connected with the anode of a diode D1 and the other end of a primary N1 of a main power transformer T1, the G pole of the MOS switch tube Q2 is connected with a Q2G end, the S pole of the MOS switch tube Q2 is connected with the anode of a diode D3, the S pole of the MOS switch tube Q2 is connected with a Q2E end, and the S pole of the MOS switch tube Q2 is connected with a connecting line between C1 and C2;
the D pole of the MOS switch tube Q3 is connected to a connecting line between the C1 and the C2, the D pole of the MOS switch tube Q3 is connected with the cathode of a diode D2, the G pole of the MOS switch tube Q3 is connected with a Q3G end, the S pole of the MOS switch tube Q3 is connected with one end of a primary side N1 of the main power transformer T2 and the cathode of the diode D4, and the S pole of the MOS switch tube Q3 is connected with a Q3E end;
the D pole of the MOS switch tube Q4 is connected with the anode of a diode D2 and the other end of a primary N1 of a main power transformer T2, the G pole of the MOS switch tube Q4 is connected with a Q4G end, the S pole of the MOS switch tube Q4 is connected with a grounding end HV GND of the C2 through a resistor R5, the S pole of the MOS switch tube Q4 is connected with a Q4E end, and the anode of the D4 is connected with the grounding end HV GND of the C2;
one end of a secondary side N2 of the main power transformer T1 is connected with the anode of a diode D5, the cathode of the diode D5 is connected with a VOUTP end, the other end of a secondary side N2 of the main power transformer T1 is connected with one end of a secondary side N2 of a main power transformer T2, and the other end of a secondary side N2 of the main power transformer T2 is connected with a VOUTN end;
one end of a secondary side N3 of the main power transformer T1 is connected with the anode of a diode D6, the cathode of the diode D6 is connected with a Vcc end, the other end of a secondary side N3 of the main power transformer T1 is connected with one end of a secondary side N3 of a main power transformer T2, and the other end of a secondary side N3 of the main power transformer T2 is connected with a ground end HV GND;
and a capacitor CE1 and a resistor R3 are connected between the VOUTP end and the VOUTN end in parallel, and a capacitor CE2 and a resistor R4 are connected between the Vcc end and a ground end HV GND in parallel.
As a preferred example, the dual-transistor flyback stack circuit is connected with a multi-channel driving isolation circuit of a switching transistor, and the multi-channel driving isolation circuit of the switching transistor comprises a driving signal Bus Drive Bus, capacitors C3 and C4, driving signal isolation transformers T3 and T4, zener diodes Z1a, Z1b, Z2a, Z2b, Z3a, Z3b, Z4a and Z4b, diodes D7-D10, triodes Qoff1-Qoff4, turn-on resistors RG1-RG4 and gate-level bleeder resistors Rge1-Rge 4;
the driving signal Bus Drive Bus is respectively connected with one ends of capacitors C3 and C4, the other end of the capacitor C3 is connected with a ground terminal HV GND through a primary side N1 of a driving signal isolation transformer T3 which is connected in series, and the other end of the capacitor C4 is connected with the ground terminal HV GND through a primary side N1 of a driving signal isolation transformer T4 which is connected in series;
one end of a secondary side N2 of the driving signal isolation transformer T3 is connected with a cathode of a voltage stabilizing diode Z1a, a B pole of a triode Qoff1 and an anode of a diode D7, an E pole of the triode Qoff1 is connected with a cathode of a diode D7 and one end of a switching-on and switching-off resistor RG1, the other end of the switching-on and switching-off resistor RG1 is connected with a Q1G end and one end of a gate-level bleeder resistor Rge1, the other end of the gate-level bleeder resistor Rge1 is connected with a Q1E end, a C pole of a triode Qoff1, a cathode of a voltage stabilizing diode Z1B and the other end of a secondary side N2 of the driving signal isolation transformer T3, and an anode of a voltage stabilizing diode Z1a is connected with an anode of a voltage stabilizing diode Z1B;
one end of a secondary side N3 of the driving signal isolation transformer T3 is connected with a cathode of a voltage stabilizing diode Z2a, a B pole of a triode Qoff2 and an anode of a diode D8, an E pole of the triode Qoff2 is connected with a cathode of a diode D8 and one end of a switching-on and switching-off resistor RG1, the other end of the switching-on and switching-off resistor RG1 is connected with a Q2G end and one end of a gate-level bleeder resistor Rge2, the other end of the gate-level bleeder resistor Rge2 is connected with a Q2E end, a C pole of a triode Qoff2, a cathode of a voltage stabilizing diode Z2B and the other end of a secondary side N3 of the driving signal isolation transformer T3, and an anode of a voltage stabilizing diode Z2a is connected with an anode of a voltage stabilizing diode Z2B;
one end of a secondary side N2 of the driving signal isolation transformer T4 is connected with a cathode of a voltage stabilizing diode Z3a, a B pole of a triode Qoff3 and an anode of a diode D9, an E pole of the triode Qoff3 is connected with a cathode of a diode D9 and one end of a switching-on and switching-off resistor RG3, the other end of the switching-on and switching-off resistor RG3 is connected with a Q3G end and one end of a gate-level bleeder resistor Rge3, the other end of the gate-level bleeder resistor Rge3 is connected with a Q3E end, a C pole of a triode Qoff3, a cathode of a voltage stabilizing diode Z3B and the other end of a secondary side N2 of the driving signal isolation transformer T4, and an anode of a voltage stabilizing diode Z3a is connected with an anode of a voltage stabilizing diode Z3B;
one end of a secondary side N3 of the driving signal isolation transformer T4 is connected with a cathode of a voltage stabilizing diode Z4a, a B pole of a triode Qoff4 and an anode of a diode D10, an E pole of the triode Qoff4 is connected with a cathode of a diode D10 and one end of a switching-on and switching-off resistor RG4, the other end of the switching-on and switching-off resistor RG4 is connected with a Q4G end and one end of a gate-level bleeder resistor Rge4, the other end of the gate-level bleeder resistor Rge4 is connected with a Q4E end, a C pole of a triode Qoff4, a cathode of a voltage stabilizing diode Z4B and the other end of a secondary side N3 of the driving signal isolation transformer T4, and an anode of a voltage stabilizing diode Z4a is connected with an anode of a voltage stabilizing diode Z4B;
the ends Q1G-Q4G and Q1E-Q4E in the multi-path drive isolation circuit are correspondingly connected with the ends Q1G-Q4G and Q1E-Q4E in the double-tube flyback stacked circuit.
As a preferred example, the multi-path driving isolation circuit of the switching tube is connected with a driving signal power amplification circuit of the switching tube, and the driving signal power amplification circuit of the switching tube comprises a local controller, a driving resistor RB, a totem pole driving circuit, a resistor R, a primary capacitor Cbias and a secondary capacitor Cdrv;
one end of the driving resistor RB is connected with the OUT end of the local controller, the other end of the driving resistor RB is connected with the input end of the totem-pole driving circuit, and the output end of the totem-pole driving circuit is connected with a driving signal Bus Drive Bus;
one end of the resistor R is connected with one end of the primary capacitor Cbias, a Vcc end of the local controller and a Vcc _ bias end, and the other end of the resistor R is connected with power supply ends Vcc and Vcc _ DRV ends of the totem pole driving circuit;
one end of the secondary capacitor Cdrv is connected with a ground terminal Gnd of the totem pole driving circuit, the other end of the primary capacitor Cbias and the Gnd end of the local controller, and the other end of the secondary capacitor Cdrv is connected with a Vcc _ DRV end;
the output end of the totem pole driving circuit is connected with capacitors C3 and C4 of a multipath driving isolation circuit of a switching tube through a driving signal Bus Drive Bus.
The utility model has the beneficial effects that:
(1) in a dual-transistor flyback stacked circuit. Under the control of a driving signal, 4 MOS tubes are synchronously switched on and off, the charging and discharging time of bus capacitors C1 and C2 in each period is balanced, the input high voltage is divided into two, the switching-off voltage of the switching tubes is reduced, the loss is reduced, MOS with lower voltage can be used, the cost is reduced, and the reliability is improved;
(2) the driving signal power amplifying circuit of the shared switch tube outputs a serial driving power bus, so that the driving delay and the rising and falling time of the front section are ensured to be absolutely consistent;
(3) the same driving signal isolation transformer in the multi-path driving isolation circuit of the switching tube ensures the primary high-frequency insulation isolation, reduces the distributed capacitance between the primary and secondary electrodes and has strong anti-interference capability;
(4) each MOS is controlled through the on-off resistor, so that dynamic voltage sharing of the bus capacitor is realized, the on-off process of the MOS is accelerated while voltage sharing is guaranteed, the switching loss of the MOS is reduced, and the economy is good;
(5) the magnetic isolation is carried out through the drive signal isolation transformer, light attenuation isolation does not exist, the drive delay time is short, and a buffer circuit does not need to be added into the circuit structure, so that the switching frequency of the converter cannot be reduced.
Drawings
Fig. 1 is a schematic structural diagram of a double-tube flyback stacked circuit;
FIG. 2 is a schematic structural diagram of a multi-channel driving isolation circuit of a switching tube;
FIG. 3 is a schematic diagram of a driving signal power amplifying circuit of a switching tube;
fig. 4 is a schematic structural diagram of a typical totem-pole driving circuit.
Detailed Description
In order to make the technical means, the original characteristics, the achieved purpose and the efficacy of the utility model easy to understand, the utility model is further described with reference to the specific drawings.
Example 1
As shown in fig. 1, a high-voltage direct-current input dual-transistor flyback converter stacked circuit includes dual-transistor flyback stacked circuits, which include capacitors C1 and C2, MOS switches Q1 to Q4, main power transformers T1 and T2, diodes D1 to D6, resistors R1 to R5, and capacitors CE1 and CE 2;
one end of a capacitor C1 is connected with a direct current bus POS end, the other end of a capacitor C1 is connected with a capacitor C2 in series, the other end of a capacitor C2 is connected with a ground end HV GND, two ends of a capacitor C1 are connected with a resistor R1 in parallel, and two ends of a capacitor C2 are connected with a resistor R2 in parallel;
the D pole of the MOS switch tube Q1 is connected with the POS end of the direct-current bus and the cathode of the diode D1, the G pole of the MOS switch tube Q1 is connected with the Q1G end, the S pole of the MOS switch tube Q1 is connected with one end of the primary side N1 of the main power transformer T1 and the cathode of the diode D3, and the S pole of the MOS switch tube Q1 is connected with the Q1E end;
the D pole of the MOS switch tube Q2 is connected with the anode of the diode D1 and the other end of the primary N1 of the main power transformer T1, the G pole of the MOS switch tube Q2 is connected with the end Q2G, the S pole of the MOS switch tube Q2 is connected with the anode of the diode D3, the S pole of the MOS switch tube Q2 is connected with the end Q2E, and the S pole of the MOS switch tube Q2 is connected with a connecting line between the ends C1 and C2;
a D pole of an MOS switch tube Q3 is connected to a connecting line between C1 and C2, a D pole of the MOS switch tube Q3 is connected with a cathode of a diode D2, a G pole of the MOS switch tube Q3 is connected with a Q3G end, an S pole of the MOS switch tube Q3 is connected with one end of a primary side N1 of the main power transformer T2 and a cathode of the diode D4, and an S pole of the MOS switch tube Q3 is connected with a Q3E end;
the D pole of the MOS switch tube Q4 is connected with the anode of the diode D2 and the other end of the primary N1 of the main power transformer T2, the G pole of the MOS switch tube Q4 is connected with the end Q4G, the S pole of the MOS switch tube Q4 is connected with the ground terminal HV GND of the C2 through a resistor R5, the S pole of the MOS switch tube Q4 is connected with the end Q4E, and the anode of the D4 is connected with the ground terminal HV GND of the C2;
one end of a secondary side N2 of the main power transformer T1 is connected with the anode of a diode D5, the cathode of the diode D5 is connected with a VOUTP end, the other end of a secondary side N2 of the main power transformer T1 is connected with one end of a secondary side N2 of a main power transformer T2, and the other end of a secondary side N2 of the main power transformer T2 is connected with a VOUTN end;
one end of a secondary side N3 of the main power transformer T1 is connected with the anode of a diode D6, the cathode of the diode D6 is connected with a Vcc end, the other end of a secondary side N3 of the main power transformer T1 is connected with one end of a secondary side N3 of a main power transformer T2, and the other end of a secondary side N3 of the main power transformer T2 is connected with a ground end HV GND;
the capacitor CE1 and the resistor R3 are connected in parallel between the VOUTP end and the VOUTN end, and the capacitor CE2 and the resistor R4 are connected in parallel between the Vcc end and the ground end HV GND.
In a dual-transistor flyback stacked circuit. Under the control of a driving signal, 4 MOS tubes are synchronously switched on and off, the charging and discharging time of the bus capacitors C1 and C2 in each period is balanced, the input high voltage is divided into two, the switching-off voltage of the switching tubes is reduced, the loss is reduced, MOS with lower voltage can be used, the cost is reduced, and the reliability is improved.
Example 2
As shown in fig. 1-2, the dual-transistor flyback stack circuit is the same as that in embodiment 1, the dual-transistor flyback stack circuit is connected with a multi-channel driving isolation circuit of a switching transistor, the multi-channel driving isolation circuit of the switching transistor includes a driving signal Bus Drive Bus, capacitors C3, C4, driving signal isolation transformers T3, T4, zener diodes Z1a, Z1b, Z2a, Z2b, Z3a, Z3b, Z4a, Z4b, diodes D7-D10, triodes Qoff 1-ff 4, on-off resistors qorg 1-RG4, and gate-level bleeder resistors Rge1-Rge 4;
a Drive signal Bus is respectively connected with one ends of capacitors C3 and C4, the other end of the capacitor C3 is connected with a ground terminal HV GND through a primary side N1 of a Drive signal isolation transformer T3 which is connected in series, and the other end of the capacitor C4 is connected with the ground terminal HV GND through a primary side N1 of a Drive signal isolation transformer T4 which is connected in series;
the capacitors C3 and C4 are Drive Bus coupling capacitors of the Drive signal Bus, and decoupling of the series IGBT Drive signal isolation transformer is achieved. And the driving signal isolation transformer realizes high-frequency isolation and driving signal transmission of the series IGBT. Positive and negative voltage clamping of driving signals is carried out on the driving signals coupled to the secondary side, and the amplitude of the driving signals of the series IGBT is ensured to be within a safe range. And the diode drives the MOS to be conducted at the rising edge moment of the driving signal and is also a diode of an emitter clamping circuit of the triode. And turning on a turn-off resistor to control the parameter characteristics of the turn-on switch section of the MOS. The gate-level bleeder resistor prevents the phenomena of gate-level electrostatic breakdown of a MOS (metal oxide semiconductor) switch tube and mistaken switching caused by electrifying a main circuit when a control power supply is lost. The driving signal of the MOS of the circuit can also carry out signal total coupling through a larger-caliber magnetic ring common mode inductor, and drive with higher power and higher dynamic requirements are carried out;
one end of a secondary side N2 of the driving signal isolation transformer T3 is connected with a cathode of a voltage stabilizing diode Z1a, a B pole of a triode Qoff1 and an anode of a diode D7, an E pole of the triode Qoff1 is connected with a cathode of a diode D7 and one end of a switching-on and switching-off resistor RG1, the other end of the switching-on and switching-off resistor RG1 is connected with a Q1G end and one end of a gate-level bleeder resistor Rge1, the other end of the gate-level bleeder resistor Rge1 is connected with a Q1E end, a C pole of a triode Qoff1, a cathode of a voltage stabilizing diode Z1B and the other end of a secondary side N2 of the driving signal isolation transformer T3, and an anode of a voltage stabilizing diode Z1a is connected with an anode of a voltage stabilizing diode Z1B;
one end of a secondary side N3 of the driving signal isolation transformer T3 is connected with a cathode of a voltage stabilizing diode Z2a, a B pole of a triode Qoff2 and an anode of a diode D8, an E pole of the triode Qoff2 is connected with a cathode of a diode D8 and one end of a switching-on and switching-off resistor RG1, the other end of the switching-on and switching-off resistor RG1 is connected with a Q2G end and one end of a gate-level bleeder resistor Rge2, the other end of the gate-level bleeder resistor Rge2 is connected with a Q2E end, a C pole of a triode Qoff2, a cathode of a voltage stabilizing diode Z2B and the other end of a secondary side N3 of the driving signal isolation transformer T3, and an anode of a voltage stabilizing diode Z2a is connected with an anode of a voltage stabilizing diode Z2B;
one end of a secondary side N2 of the driving signal isolation transformer T4 is connected with a cathode of a voltage stabilizing diode Z3a, a B pole of a triode Qoff3 and an anode of a diode D9, an E pole of the triode Qoff3 is connected with a cathode of a diode D9 and one end of a switching-on and switching-off resistor RG3, the other end of the switching-on and switching-off resistor RG3 is connected with a Q3G end and one end of a gate-level bleeder resistor Rge3, the other end of the gate-level bleeder resistor Rge3 is connected with a Q3E end, a C pole of a triode Qoff3, a cathode of a voltage stabilizing diode Z3B and the other end of a secondary side N2 of the driving signal isolation transformer T4, and an anode of a voltage stabilizing diode Z3a is connected with an anode of a voltage stabilizing diode Z3B;
one end of a secondary side N3 of the driving signal isolation transformer T4 is connected with a cathode of a voltage stabilizing diode Z4a, a B pole of a triode Qoff4 and an anode of a diode D10, an E pole of the triode Qoff4 is connected with a cathode of a diode D10 and one end of a switching-on and switching-off resistor RG4, the other end of the switching-on and switching-off resistor RG4 is connected with a Q4G end and one end of a gate-level bleeder resistor Rge4, the other end of the gate-level bleeder resistor Rge4 is connected with a Q4E end, a C pole of a triode Qoff4, a cathode of a voltage stabilizing diode Z4B and the other end of a secondary side N3 of the driving signal isolation transformer T4, and an anode of a voltage stabilizing diode Z4a is connected with an anode of a voltage stabilizing diode Z4B;
the ends Q1G-Q4G and Q1E-Q4E in the multi-path drive isolation circuit are correspondingly connected with the ends Q1G-Q4G and Q1E-Q4E in the double-tube flyback stacked circuit.
The same driving signal isolation transformer in the multi-path driving isolation circuit of the switching tube ensures the primary high-frequency insulation isolation, reduces the distributed capacitance between the primary and secondary electrodes and has strong anti-interference capability;
each MOS is controlled through the on-off resistor, so that dynamic voltage sharing of the bus capacitor is realized, the on-off process of the MOS is accelerated while voltage sharing is guaranteed, the switching loss of the MOS is reduced, and the economy is good;
the magnetic isolation is carried out through the drive signal isolation transformer, light attenuation isolation does not exist, the drive delay time is short, and a buffer circuit does not need to be added into the circuit structure, so that the switching frequency of the converter cannot be reduced.
Example 3
As shown in fig. 1 to 4, the other structures are the same as those in embodiment 2, the multi-path driving isolation circuit of the switching tube is connected to a driving signal power amplification circuit of the switching tube, and the driving signal power amplification circuit of the switching tube includes a local controller, a driving resistor RB, a totem pole or drive Ic, a resistor R, a primary capacitor Cbias, and a secondary capacitor Cdrv;
one end of the driving resistor RB is connected with the OUT end of the local controller, the other end of the driving resistor RB is connected with the input end of the totem-pole driving circuit, and the output end of the totem-pole driving circuit is connected with a driving signal Bus Drive Bus;
one end of the resistor R is connected with one end of the primary capacitor Cbias, a Vcc end of the local controller and a Vcc _ bias end, and the other end of the resistor R is connected with power supply ends Vcc and Vcc _ DRV ends of the totem pole driving circuit;
the driving signal power amplification circuit of the switching tube is connected with a local controller through a gate buffer, and the local controller is a combination of one or more of a PWM (pulse-width modulation) special chip, a DSP (digital signal processor) chip, an ARM (advanced RISC machine) chip and an FPGA (field programmable gate array) chip;
one end of the secondary capacitor Cdrv is connected with the ground terminal Gnd of the totem-pole drive circuit, the other end of the primary capacitor Cbias and the Gnd end of the local controller, and the other end of the secondary capacitor Cdrv is connected with the Vcc _ DRV end;
the output end of the totem pole driving circuit is connected with capacitors C3 and C4 of the multipath driving isolation circuit of the switching tube through a driving signal Bus Drive Bus.
As shown in fig. 4, the totem-pole driving circuit amplifies the driving current of the driving signal sent by the local controller. The totem-pole driving circuit consists of two triodes and a diode. The driving signal power amplifying circuit can be replaced by a discrete triode or an MOS circuit or a driving chip, and outputs a driving signal Bus Drive Bus connected with the IGBT in series.
The driving signal power amplifying circuit of the shared switch tube outputs a serial driving power bus, so that the driving delay and the rising and falling time of the front section are ensured to be absolutely consistent.
The foregoing illustrates and describes the principles, general features, and advantages of the present invention. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, and that various changes and modifications may be made without departing from the spirit and scope of the utility model as defined in the appended claims. The scope of the utility model is defined by the appended claims and equivalents thereof.
Claims (3)
1. A double-tube flyback converter stacked circuit with high-voltage direct current input is characterized by comprising double-tube flyback stacked circuits, wherein each double-tube flyback stacked circuit comprises capacitors C1 and C2, MOS switching tubes Q1-Q4, main power transformers T1 and T2, diodes D1-D6, resistors R1-R5 and capacitors CE1 and CE 2;
one end of the capacitor C1 is connected with a direct current bus POS end, the other end of the capacitor C1 is connected with the C2 in series, the other end of the capacitor C2 is connected with a ground end HV GND, two ends of the capacitor C1 are connected with a resistor R1 in parallel, and two ends of the capacitor C2 are connected with a resistor R2 in parallel;
the D pole of the MOS switch tube Q1 is connected with the POS end of the direct-current bus and the cathode of the diode D1, the G pole of the MOS switch tube Q1 is connected with the Q1G end, the S pole of the MOS switch tube Q1 is connected with one end of the primary side N1 of the main power transformer T1 and the cathode of the diode D3, and the S pole of the MOS switch tube Q1 is connected with the Q1E end;
the D pole of the MOS switch tube Q2 is connected with the anode of a diode D1 and the other end of a primary N1 of a main power transformer T1, the G pole of the MOS switch tube Q2 is connected with a Q2G end, the S pole of the MOS switch tube Q2 is connected with the anode of a diode D3, the S pole of the MOS switch tube Q2 is connected with a Q2E end, and the S pole of the MOS switch tube Q2 is connected with a connecting line between C1 and C2;
the D pole of the MOS switch tube Q3 is connected to a connecting line between the C1 and the C2, the D pole of the MOS switch tube Q3 is connected with the cathode of a diode D2, the G pole of the MOS switch tube Q3 is connected with a Q3G end, the S pole of the MOS switch tube Q3 is connected with one end of a primary side N1 of the main power transformer T2 and the cathode of the diode D4, and the S pole of the MOS switch tube Q3 is connected with a Q3E end;
the D pole of the MOS switch tube Q4 is connected with the anode of a diode D2 and the other end of a primary N1 of a main power transformer T2, the G pole of the MOS switch tube Q4 is connected with a Q4G end, the S pole of the MOS switch tube Q4 is connected with a grounding end HV GND of the C2 through a resistor R5, the S pole of the MOS switch tube Q4 is connected with a Q4E end, and the anode of the D4 is connected with the grounding end HV GND of the C2;
one end of a secondary side N2 of the main power transformer T1 is connected with the anode of a diode D5, the cathode of the diode D5 is connected with a VOUTP end, the other end of a secondary side N2 of the main power transformer T1 is connected with one end of a secondary side N2 of a main power transformer T2, and the other end of a secondary side N2 of the main power transformer T2 is connected with a VOUTN end;
one end of a secondary side N3 of the main power transformer T1 is connected with the anode of a diode D6, the cathode of the diode D6 is connected with a Vcc end, the other end of a secondary side N3 of the main power transformer T1 is connected with one end of a secondary side N3 of a main power transformer T2, and the other end of a secondary side N3 of the main power transformer T2 is connected with a ground end HV GND;
and a capacitor CE1 and a resistor R3 are connected between the VOUTP end and the VOUTN end in parallel, and a capacitor CE2 and a resistor R4 are connected between the Vcc end and a ground end HV GND in parallel.
2. The high-voltage direct-current-input double-tube flyback converter stacked circuit of claim 1, wherein the double-tube flyback stacked circuit is connected with a multi-channel driving isolation circuit of a switching tube, the multi-channel driving isolation circuit of the switching tube comprises a driving signal Bus Drive Bus, capacitors C3 and C4, driving signal isolation transformers T3 and T4, a voltage stabilizing diode Z1a, Z1b, Z2a, Z2b, Z3a, Z3b, Z4a, Z4b, diodes D7-D10, triodes Qoff1-Qoff4, an on-off resistor RG1-RG4 and gate-level bleeder resistors Rge1-Rge 4;
the driving signal Bus Drive Bus is respectively connected with one ends of capacitors C3 and C4, the other end of the capacitor C3 is connected with a ground terminal HV GND through a primary side N1 of a driving signal isolation transformer T3 which is connected in series, and the other end of the capacitor C4 is connected with the ground terminal HV GND through a primary side N1 of a driving signal isolation transformer T4 which is connected in series;
one end of a secondary side N2 of the driving signal isolation transformer T3 is connected with a cathode of a voltage stabilizing diode Z1a, a B pole of a triode Qoff1 and an anode of a diode D7, an E pole of the triode Qoff1 is connected with a cathode of a diode D7 and one end of a switching-on and switching-off resistor RG1, the other end of the switching-on and switching-off resistor RG1 is connected with a Q1G end and one end of a gate-level bleeder resistor Rge1, the other end of the gate-level bleeder resistor Rge1 is connected with a Q1E end, a C pole of a triode Qoff1, a cathode of a voltage stabilizing diode Z1B and the other end of a secondary side N2 of the driving signal isolation transformer T3, and an anode of a voltage stabilizing diode Z1a is connected with an anode of a voltage stabilizing diode Z1B;
one end of a secondary side N3 of the driving signal isolation transformer T3 is connected with a cathode of a voltage stabilizing diode Z2a, a B pole of a triode Qoff2 and an anode of a diode D8, an E pole of the triode Qoff2 is connected with a cathode of a diode D8 and one end of a switching-on and switching-off resistor RG1, the other end of the switching-on and switching-off resistor RG1 is connected with a Q2G end and one end of a gate-level bleeder resistor Rge2, the other end of the gate-level bleeder resistor Rge2 is connected with a Q2E end, a C pole of a triode Qoff2, a cathode of a voltage stabilizing diode Z2B and the other end of a secondary side N3 of the driving signal isolation transformer T3, and an anode of a voltage stabilizing diode Z2a is connected with an anode of a voltage stabilizing diode Z2B;
one end of a secondary side N2 of the driving signal isolation transformer T4 is connected with a cathode of a voltage stabilizing diode Z3a, a B pole of a triode Qoff3 and an anode of a diode D9, an E pole of the triode Qoff3 is connected with a cathode of a diode D9 and one end of a switching-on and switching-off resistor RG3, the other end of the switching-on and switching-off resistor RG3 is connected with a Q3G end and one end of a gate-level bleeder resistor Rge3, the other end of the gate-level bleeder resistor Rge3 is connected with a Q3E end, a C pole of a triode Qoff3, a cathode of a voltage stabilizing diode Z3B and the other end of a secondary side N2 of the driving signal isolation transformer T4, and an anode of a voltage stabilizing diode Z3a is connected with an anode of a voltage stabilizing diode Z3B;
one end of a secondary side N3 of the driving signal isolation transformer T4 is connected with a cathode of a voltage stabilizing diode Z4a, a B pole of a triode Qoff4 and an anode of a diode D10, an E pole of the triode Qoff4 is connected with a cathode of a diode D10 and one end of a switching-on and switching-off resistor RG4, the other end of the switching-on and switching-off resistor RG4 is connected with a Q4G end and one end of a gate-level bleeder resistor Rge4, the other end of the gate-level bleeder resistor Rge4 is connected with a Q4E end, a C pole of a triode Qoff4, a cathode of a voltage stabilizing diode Z4B and the other end of a secondary side N3 of the driving signal isolation transformer T4, and an anode of a voltage stabilizing diode Z4a is connected with an anode of a voltage stabilizing diode Z4B;
the ends Q1G-Q4G and Q1E-Q4E in the multi-path drive isolation circuit are correspondingly connected with the ends Q1G-Q4G and Q1E-Q4E in the double-tube flyback stacked circuit.
3. The high-voltage direct-current-input double-tube flyback converter stacked circuit according to claim 2, wherein the multi-path driving isolation circuit of the switching tube is connected with a driving signal power amplification circuit of the switching tube, and the driving signal power amplification circuit of the switching tube comprises a local controller, a driving resistor RB, a totem-pole driving circuit, a resistor R, a primary capacitor Cbias and a secondary capacitor Cdrv;
one end of the driving resistor RB is connected with the OUT end of the local controller, the other end of the driving resistor RB is connected with the input end of the totem-pole driving circuit, and the output end of the totem-pole driving circuit is connected with a driving signal Bus Drive Bus;
one end of the resistor R is connected with one end of the primary capacitor Cbias, a Vcc end of the local controller and a Vcc _ bias end, and the other end of the resistor R is connected with power supply ends Vcc and Vcc _ DRV ends of the totem pole driving circuit;
one end of the secondary capacitor Cdrv is connected with a ground terminal Gnd of the totem pole driving circuit, the other end of the primary capacitor Cbias and the Gnd end of the local controller, and the other end of the secondary capacitor Cdrv is connected with a Vcc _ DRV end;
the output end of the totem pole driving circuit is connected with capacitors C3 and C4 of a multipath driving isolation circuit of a switching tube through a driving signal Bus Drive Bus.
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