CN215834686U

CN215834686U - Balun structure

Info

Publication number: CN215834686U
Application number: CN202122340396.2U
Authority: CN
Inventors: 宁焕; 林亚梅; 唐聃; 肖倩; 刘季超; 杨占民; 刘世林
Original assignee: Shenzhen Zhenhua Ferrite and Ceramic Electronics Co Ltd
Current assignee: Shenzhen Zhenhua Ferrite and Ceramic Electronics Co Ltd
Priority date: 2021-09-26
Filing date: 2021-09-26
Publication date: 2022-02-15
Anticipated expiration: 2031-09-26

Abstract

The utility model relates to the technical field of microwaves, and provides a balun structure which comprises a base body, a first inductor, a second inductor, a third inductor and a fourth inductor, wherein an unbalanced signal port, a first balanced signal port, a second balanced signal port, a first grounding port and a second grounding port are arranged on the outer surface of the base body. The balun structure provided by the utility model has the beneficial effects that: the first inductor, the second inductor, the third inductor and the fourth inductor are formed by connecting two inductance parts in series, the segmented inductors are more flexibly arranged, the length of the inductors is effectively reduced, the size of the balun structure is further reduced, and the balun structure is small in insertion loss, excellent in amplitude and phase characteristics through testing at ultrahigh frequency, the technical problem that the existing balun structure is not suitable for ultrahigh frequency is solved, and the relative bandwidth is improved.

Description

Balun structure

Technical Field

The utility model relates to the technical field of microwaves, in particular to a balun structure.

Background

Balun circuit (balun) represents a balun that can achieve interconversion between differential signals and single-ended signals and perform impedance matching. As a three-port device, balun is widely used in balanced layout of radio frequency circuits, such as filters, power amplifiers and antenna feed networks, and directly affects the performance and quality of wireless communication.

With the continuous development of electronic systems toward miniaturization, light weight and high performance, higher requirements are put on the size and performance of devices. For example, a magnetic flux coupling transformer balun is a type of balun which is basically composed of a magnetic core and two different wires wound on the magnetic core, and has a large volume, and the balun is most suitable for operating only below 1 GHz. As another example, a classical transformer balun has two independent coil windings wound around the transformer core. For another example, the autotransformer balun has one coil or two or more coils, and the electrical connections of these coils are also wound around the toroidal core. In addition, delay line baluns, self-resonant baluns and the like exist, but the baluns are large in form volume.

Among them, a simple equine phase (Marchand) balun structure is practical only in a high frequency band in the case of satisfying the requirement for a miniaturized size, but is not suitable for an ultrahigh frequency.

SUMMERY OF THE UTILITY MODEL

The utility model aims to provide a balun structure, and aims to solve the technical problem that the existing balun structure is not suitable for ultrahigh frequency.

In order to achieve the purpose, the utility model adopts the technical scheme that: a balun structure comprising:

the device comprises a base body, wherein an unbalanced signal port, a first balanced signal port, a second balanced signal port, a first ground port and a second ground port are arranged on the outer surface of the base body;

a first inductor located inside the base, the first inductor comprising a first inductive portion and a second inductive portion;

a second inductor located inside the base body, the second inductor including a third inductance part and a fourth inductance part, the unbalanced signal port, the first inductance part, the second inductance part, the third inductance part, and the fourth inductance part being connected in series in sequence;

a third inductor located inside the base, the third inductor including a fifth inductive portion coupled to the first inductive portion and a sixth inductive portion coupled to the second inductive portion, the first ground port, the fifth inductive portion, the sixth inductive portion, and the first balanced signal port being connected in series in that order;

a fourth inductor located inside the base body, the fourth inductor including a seventh inductive portion coupled with the third inductive portion and an eighth inductive portion coupled with the fourth inductive portion, the second balanced signal port, the seventh inductive portion, the eighth inductive portion, and the second ground port being connected in series in this order.

In one embodiment, the base includes a first shielding layer, a second shielding layer, and a third shielding layer sequentially distributed along a stacking direction, the first inductor and the third inductor are located between the first shielding layer and the second shielding layer, and the second inductor and the fourth inductor are located between the second shielding layer and the third shielding layer.

In one embodiment, the first inductor portion, the fifth inductor portion, the second inductor portion, and the sixth inductor portion are distributed in a staggered manner along the stacking direction, the first inductor portion and the second inductor portion are connected in series through a first via conductor, and the fifth inductor portion and the sixth inductor portion are connected in series through a second via conductor.

In one embodiment, the third inductor portion, the seventh inductor portion, the fourth inductor portion, and the eighth inductor portion are distributed in a staggered manner along the stacking direction, the third inductor portion and the fourth inductor portion are connected in series through a third hole conductor, and the seventh inductor portion and the eighth inductor portion are connected in series through a fourth hole conductor.

In one embodiment, the first inductor portion, the second inductor portion, the third inductor portion, the fourth inductor portion, the fifth inductor portion, the sixth inductor portion, the seventh inductor portion, and the eighth inductor portion are all planar spiral inductors printed on the dielectric film.

In one embodiment, one of the dielectric diaphragms is printed with a first internal electrode, one end of the first internal electrode extends to the edge of the substrate to be electrically connected with the first balanced signal port, and the other end of the first internal electrode is electrically connected with the sixth inductance part.

In one embodiment, one of the dielectric diaphragms is printed with a second internal electrode, one end of the second internal electrode extends to the edge of the substrate to be electrically connected with the second balanced signal port, and the other end of the second internal electrode is electrically connected with the eighth inductance part.

In one embodiment, the first inductor part, the second inductor part, the third inductor part, the fourth inductor part, the fifth inductor part, the sixth inductor part, the seventh inductor part, and the eighth inductor part are all eighth wavelength lines.

In one embodiment, the substrate is a ceramic substrate.

In one embodiment, the dielectric constant of the ceramic matrix is 6-8.

In one embodiment, the ceramic matrix has a dielectric loss factor tan α ≦ 0.005.

The utility model also provides a manufacturing method of the balun structure, which comprises the following steps:

providing a first membrane, and printing a pattern conductor of a first inductance part on the top surface of the first membrane;

stacking a second membrane with a first through hole on the first membrane, wherein the position of the first through hole corresponds to the position of the first inductance part, and printing a pattern conductor and metal of a fifth inductance part on the second membrane to fill the first through hole;

stacking a third membrane with a second through hole and a third through hole on the second membrane, wherein the second through hole is communicated with the first through hole, the position of the third through hole corresponds to the position of the fifth inductance part, printing a pattern conductor of a second inductance part on the third membrane, filling the second through hole and the third through hole with metal, and conducting the second inductance part with the metallized second through hole;

stacking a fourth membrane with a fourth through hole on the third membrane, wherein the fourth through hole is communicated with the third through hole, printing a pattern conductor of a sixth inductance part on the fourth membrane and filling metal into the fourth through hole, and the sixth inductance part is communicated with the metallized fourth through hole;

stacking a fifth film on the fourth film, and printing an eighth inductor part on the fifth film;

stacking a sixth membrane with a fifth through hole on the fifth membrane, wherein the position of the fifth through hole corresponds to the position of the eighth inductance part, and printing a pattern conductor and metal of a fourth inductance part on the sixth membrane to fill the fifth through hole;

stacking a seventh diaphragm with a sixth through hole and a seventh through hole on the sixth diaphragm, wherein the sixth through hole is communicated with the fifth through hole, the position of the seventh through hole corresponds to the position of the fourth inductance part, printing a pattern conductor of the seventh inductance part on the seventh diaphragm, filling the sixth through hole and the seventh through hole with metal, and conducting the seventh inductance part with the sixth through hole after metallization;

stacking an eighth membrane with an eighth through hole on the seventh membrane, wherein the eighth through hole is communicated with the seventh through hole, a pattern conductor of a third inductance part is printed on the eighth membrane, and metal is filled in the eighth through hole, and the third inductance part is communicated with the eighth through hole after metallization;

the first diaphragm to the eighth diaphragm form a base body, and an unbalanced signal port, a first balanced signal port, a second balanced signal port, a first ground port, and a second ground port are disposed on an outer surface of the base body, where the unbalanced signal port is in conduction with the first inductance part, the first balanced signal port is in conduction with the sixth inductance part, the second balanced signal port is in conduction with the seventh inductance part, the first ground port is in conduction with the fifth inductance part, and the second ground port is in conduction with the eighth inductance part.

The balun structure provided by the utility model has the beneficial effects that: the first inductor, the second inductor, the third inductor and the fourth inductor are formed by connecting two inductance parts in series, the segmented inductors are more flexibly arranged, the length of the inductors is effectively reduced, the size of the balun structure is further reduced, and the balun structure is small in insertion loss, excellent in amplitude and phase characteristics through testing at ultrahigh frequency, the technical problem that the existing balun structure is not suitable for ultrahigh frequency is solved, and the relative bandwidth is improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.

Fig. 1 is an equivalent circuit diagram of a balun structure provided in an embodiment of the present invention;

fig. 2 is an external view of a balun structure provided in an embodiment of the present invention;

FIG. 3 is an internal view of the balun structure of FIG. 2 with the matrix removed;

FIG. 4 is a perspective view from the A direction of FIG. 2;

FIG. 5 is a schematic view of a ninth diaphragm of the balun structure of FIG. 4;

FIG. 6 is a schematic diagram of a first diaphragm of the balun structure of FIG. 4;

FIG. 7 is a schematic diagram of a second diaphragm of the balun structure of FIG. 4;

FIG. 8 is a schematic view of a third diaphragm of the balun structure of FIG. 4;

FIG. 9 is a schematic view of a fourth diaphragm of the balun structure of FIG. 4;

FIG. 10 is a schematic view of a twelfth diaphragm of the balun structure of FIG. 4;

FIG. 11 is a schematic view of a tenth diaphragm of the balun structure of FIG. 4;

FIG. 12 is a schematic view of a thirteenth diaphragm of the balun structure of FIG. 4;

FIG. 13 is a schematic view of a fifth diaphragm of the balun structure of FIG. 4;

FIG. 14 is a schematic view of a sixth diaphragm of the balun structure of FIG. 4;

FIG. 15 is a schematic view of a seventh diaphragm of the balun structure of FIG. 4;

FIG. 16 is a schematic view of an eighth diaphragm of the balun structure of FIG. 4;

FIG. 17 is a schematic view of an eleventh diaphragm of the balun structure of FIG. 4;

FIG. 18 is a schematic view of a fourteenth diaphragm of the balun structure of FIG. 4;

fig. 19 is an insertion loss curve of a balun structure provided by an embodiment of the present invention;

fig. 20 is an amplitude imbalance curve of a balun structure provided in an embodiment of the present invention;

fig. 21 is a phase imbalance curve of the balun structure provided in the embodiment of the present invention;

fig. 22 is a flowchart illustrating a method for manufacturing the balun structure in this embodiment.

Wherein, in the figures, the respective reference numerals:

p1, unbalanced signal port; p2, a first balanced signal port; p3, a second balanced signal port; p4, a first ground port; p5, second ground port; p6, no load end; p7, a first inner electrode; p8, second inner electrode;

l1, a first inductor; l11, a first inductance section; l12, a second inductance section; l2, second inductor; l21, a third inductance section; l22, a fourth inductance section; l3, third inductor; l31, a fifth inductance section; l32, a sixth inductance section; l4, fourth inductor; l41, a seventh inductance section; l42, an eighth inductance section;

c1, a first shielding layer; c2, a second shielding layer; c3, a third shielding layer;

100. a substrate; 110. a first diaphragm; 120. a second diaphragm; 121. a first through hole; 130. a third diaphragm; 131. a second through hole; 132. a third through hole; 140. a fourth diaphragm; 141. a fourth via hole; 150. a fifth diaphragm; 151. a tenth through hole; 160. a sixth diaphragm; 161. a fifth through hole; 170. a seventh diaphragm; 171. a sixth through hole; 172. a seventh via hole; 180. an eighth diaphragm; 181. an eighth through hole; 191. a ninth diaphragm; 192. a tenth diaphragm; 193. an eleventh membrane; 194. a twelfth diaphragm; 1941. a ninth via hole; 195. a thirteenth diaphragm; 196. a fourteenth membrane; 1961. identifying;

210. a first via conductor; 220. a second via conductor; 230. a third hole conductor; 240. and a fourth hole conductor.

Detailed Description

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the utility model and are not to be construed as limiting the utility model.

In the description of the present invention, it is to be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, indicate orientations or positional relationships based on the orientations or positional relationships illustrated in the drawings, and are used merely for convenience in describing the present invention and for simplicity in description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be construed as limiting the present invention.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature.

In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.

In the communication field, a frequency band refers to a frequency range of electromagnetic waves, and the unit is Hz, and the frequency band can be divided into: the Very Low Frequency (VLF) is 3 kHz-30 kHz, and the wavelength of the corresponding electromagnetic wave is 100 km-10 km of very long wave. The Low Frequency (LF) is 30 kHz-300 kHz, and the wavelength of the corresponding electromagnetic wave is 10 km-1 km. The Medium Frequency (MF) is 300 kHz-3000 kHz, and the wavelength of the corresponding electromagnetic wave is 1000 m-100 m. High Frequency (HF)3 MHz-30 MHz, and corresponding electromagnetic wave wavelength 100 m-10 m. The Very High Frequency (VHF) is 30 MHz-300 MHz, and the wavelength of the corresponding electromagnetic wave is 10 m-1 m. The Ultra High Frequency (UHF) is 300 MHz-3000 MHz, and the wavelength of the corresponding electromagnetic wave is 100 cm-10 cm of decimetric wave. Ultrahigh frequency (SHF) is 3 GHz-30 GHz, and the wavelength of corresponding electromagnetic waves is 10 cm-1 cm of centimeter waves. The ultra high frequency (EHF) is 30 GHz-300 GHz, and the wavelength of the corresponding electromagnetic wave is 10 mm-1 mm. To 300 GHz-3000 GHz at high frequency, and the wavelength of the corresponding electromagnetic wave is 1 mm-0.1 mm of the decimeter wave.

With the rapid development of electronic circuit technology and electronic component packaging technology, people have raised higher and higher requirements for the miniaturization of electronic products. The LTCC balun has the advantages of being simple in implementation, low in cost, compact in structure, good in consistency, low in noise coefficient and the like, so that the LTCC balun becomes an important form of the existing passive balun. In the rapid development of microwave technology, the microwave resonator has become one of the leading corners of passive microwave devices, and is widely applied to systems requiring differential circuits, such as a feed network of an antenna, a differential amplifier, a balanced mixer, and the like.

LTCC (low temperature co-fired ceramics) refers to a process of manufacturing a dense green tape with precise thickness from low temperature sintered ceramic powder, using the green tape as a circuit substrate material, manufacturing a required pattern conductor on the green tape by using processes such as laser drilling, micro-hole grouting, and precise conductor paste printing, embedding a plurality of passive elements therein, laminating and sintering at about 900 ℃ to manufacture a passive integrated component of a three-dimensional circuit network, or manufacturing a three-dimensional circuit substrate with built-in passive elements, and mounting ICs and active devices on the surface thereof to manufacture a passive/active integrated functional module.

Example one

Referring to fig. 1 to 4, a balun structure in an embodiment of the present invention will now be described. The balun structure includes a substrate 100, a first inductor L1, a second inductor L2, a third inductor L3, and a fourth inductor L4. The first inductor L1, the second inductor L2, the third inductor L3, and the fourth inductor L4 are all located inside the base 100.

Wherein the outer surface of the base 100 is provided with an unbalanced signal port P1, a first balanced signal port P2, a second balanced signal port P3, a first ground port P4 and a second ground port P5.

Specifically, the unbalanced signal port P1, the first balanced signal port P2, the second balanced signal port P3, the first ground port P4 and the second ground port P5 may be printed or adhered to the outer surface of the base 100.

The first inductor L1 includes a first inductance section L11 and a second inductance section L12. The second inductor L2 is located inside the base 100, the second inductor L2 includes a third inductance section L21 and a fourth inductance section L22, and the unbalanced signal port P1, the first inductance section L11, the second inductance section L12, the third inductance section L21, and the fourth inductance section L22 are connected in series in this order.

The third inductor L3 includes a fifth inductance section L31 and a sixth inductance section L32, and the first ground port P4, the fifth inductance section L31, the sixth inductance section L32, and the first balanced signal port P2 are connected in series in this order. The fourth inductor L4 includes a seventh inductance section L41 and an eighth inductance section L42, and the second balanced signal port P3, the seventh inductance section L41, the eighth inductance section L42, and the second ground port P5 are connected in series in this order.

The first inductor L11 is coupled to the fifth inductor L31, the second inductor L12 is coupled to the sixth inductor L32, the third inductor L21 is coupled to the seventh inductor L41, and the fourth inductor L22 is coupled to the eighth inductor L42.

The balun structure provided by the utility model has the beneficial effects that: the first inductor L1, the second inductor L2, the third inductor L3 and the fourth inductor L4 all comprise two inductance parts which are connected in series, the single length of the first inductor L1 to the fourth inductor L4 is effectively reduced, the space utilization is maximized, and the volume of the balun structure is further reduced.

At a very high frequency of 700MHz to 1100MHz, please refer to FIG. 19, the insertion loss in the pass band is less than or equal to 1.2 dB. The insertion loss is greatest at 1.1935dB for a passband frequency of 1100 MHz. Referring to FIG. 20, the amplitude imbalance is less than or equal to 0.90 dB. The magnitude imbalance is greatest at 0.8265dB for a passband frequency of 1100 MHz. Referring to FIG. 21, the phase imbalance is less than or equal to 1.2. The phase imbalance is at a maximum of 1.2 ° when the passband frequency is 1100 MHz. Therefore, the balun structure is small in insertion loss and excellent in amplitude and phase characteristics, the technical problem that the existing balun structure is not suitable for ultrahigh frequency is solved, the relative bandwidth is improved, and the relative bandwidth reaches more than 44%.

In one embodiment, referring to fig. 4, the first inductor portion L11, the fifth inductor portion L31, the second inductor portion L12, and the sixth inductor portion L32 are distributed in a staggered manner along the height direction Z of the substrate 100, the first inductor portion L11 and the second inductor portion L12 are connected in series through the first via conductor 210, and the fifth inductor portion L31 and the sixth inductor portion L32 are connected in series through the second via conductor 220.

The first inductor portion L11 and the fifth inductor portion L31 are close to each other, and the second inductor portion L12 and the sixth inductor portion L32 are close to each other, so that the coupling degree is enhanced, and the height spatial distribution of the substrate 100 is fully utilized, which is beneficial to the miniaturization of the balun structure.

Similarly, the third inductor L21, the seventh inductor L41, the fourth inductor L22, and the eighth inductor L42 are distributed in a staggered manner along the height direction Z of the base 100, and the third inductor L21 and the fourth inductor L22 are connected in series through the third via conductor 230, and the seventh inductor L41 and the eighth inductor L42 are connected in series through the fourth via conductor 240.

In one embodiment, referring to fig. 4, the substrate 100 includes a plurality of dielectric films sequentially stacked, and the plurality of dielectric films are sequentially stacked to form the substrate 100, which has the advantages of small volume, simple processing process, and low cost.

Here, the stacking direction of the base 100 is the height direction Z of the base 100.

The plurality of dielectric films includes a first shield layer C1, a second shield layer C2, and a third shield layer C3, which are sequentially distributed in the lamination direction. The first inductor L1 and the third inductor L3 are located between the first shielding layer C1 and the second shielding layer C2, which are beneficial to transmit the input energy to the output end through inductive spatial coupling and avoid interference of other active elements. The second inductor L2 and the fourth inductor L4 are located between the second shielding layer C2 and the third shielding layer C3, which are beneficial to transmit the input energy to the output end through inductive spatial coupling and avoid interference of other active elements. The first shielding layer C1 and the third shielding layer C3 can isolate interference of external signals, and the second shielding layer C2 can prevent coupling between the first inductor L1 and the second inductor L2.

Specifically, both sides of the pattern conductor of the first shield layer C1, the second shield layer C2, and the third shield layer C3 respectively extend to the edge of the base 100, thereby being electrically connected to the first ground port P4 and the second ground port P5 distributed on the outer surface of the base 100.

Specifically, referring to fig. 5 and 17, the pattern conductor of the first shielding layer C1 is the same as the pattern conductor of the third shielding layer C3, so that the shielding effect is better, and the first shielding layer C1 and the second shielding layer C2 can be printed by using the same screen, thereby effectively reducing the screen required by the forming process and simplifying the forming process.

Optionally, the first shielding layer C1, the second shielding layer C2, and the third shielding layer C3 are all shielding capacitors, and the three layers together achieve that the volume of the product is reduced under the condition that the volume value is satisfied, and under the condition that the capacitor areas are the same, the volume value of the capacitor with the three-layer structure is about twice the volume value of the capacitor with the two-layer structure.

In one embodiment, referring to fig. 4, the first inductor portion L11, the second inductor portion L12, the third inductor portion L21, the fourth inductor portion L22, the fifth inductor portion L31, the sixth inductor portion L32, the seventh inductor portion L41, and the eighth inductor portion L42 are all planar spiral inductors printed on the dielectric film, so that maximum space utilization can be achieved, and the length of the coupling line can be effectively shortened by using the parasitic capacitance of the planar spiral inductors.

Optionally, referring to fig. 8 and 14, the printed patterns of the second inductor L12 and the fourth inductor L22 are the same, and the same screen can be used to print the second inductor L12 and the fourth inductor L22, so that the number of screens required in the forming process can be effectively reduced, and the forming process can be simplified.

Alternatively, referring to fig. 7 and 15, the printed patterns of the fifth inductor segment L31 and the seventh inductor segment L41 are the same, so that the forming process is simplified.

Alternatively, referring to fig. 9 and 13, the printed patterns of the sixth inductor segment L32 and the eighth inductor segment L42 are the same, and the forming process is simplified in the same manner.

In this embodiment, referring to fig. 4, the first inductor L11, the fifth inductor L31, the second inductor L12, and the sixth inductor L32 are distributed in a staggered manner along the stacking direction of the substrate 100, the first inductor L11 and the second inductor L12 are connected in series by the first via conductor 210, and the fifth inductor L31 and the sixth inductor L32 are connected in series by the second via conductor 220. The third inductor L21, the seventh inductor L41, the fourth inductor L22, and the eighth inductor L42 are arranged in a staggered manner in the stacking direction of the substrate 100, and the third inductor L21 and the fourth inductor L22 are connected in series via the third via conductor 230, and the seventh inductor L41 and the eighth inductor L42 are connected in series via the fourth via conductor 240.

In one possible example, the projections of the first inductance section L11 and the fifth inductance section L31 in the stacking direction are staggered by 1 μm to 10 μm. Specifically, the dielectric diaphragms in which the first inductor L11 and the fifth inductor L31 are located are the same, and referring to fig. 6 and 7, the distance from the left side of the first inductor L11 to the left edge of the dielectric diaphragm is less than or greater than the distance from the left side of the fifth inductor L31 to the left edge of the dielectric diaphragm by 1 μm to 10 μm.

Compared with the design that the first inductance part L11 and the fifth inductance part L31 are opposite, the staggered design is beneficial to weakening the coupling degree between the first inductance part L11 and the fifth inductance part L31, so that the height size of the base body 100 is reduced.

In one possible example, referring to fig. 8 and 9, the projections of the second inductor L12 and the sixth inductor L32 in the stacking direction are staggered by 1 μm to 10 μm to reduce the coupling degree therebetween.

In one possible example, referring to fig. 15 and 16, the projections of the third inductor L21 and the seventh inductor L41 in the stacking direction are staggered by 1 μm to 10 μm to reduce the coupling degree therebetween.

In one possible example, referring to fig. 13 and 14, the projections of the fourth inductor L22 and the eighth inductor L42 in the stacking direction are staggered by 1 μm to 10 μm to reduce the coupling degree therebetween.

In one embodiment, referring to fig. 5, the printed pattern of the first shielding layer C1 is hollowed out, and two sides of the printed pattern of the first shielding layer C1 extend to the edge of the substrate 100 to be electrically connected to the first ground port P4 and the second ground port P5, respectively.

The hollowed-out design of the first shielding layer C1 can effectively reduce the plane size, and is beneficial to miniaturization of the balun structure. In addition, the grounding design of the first shielding layer C1 can reduce the parasitic capacitance of the first inductor L1 to the fourth inductor L4 to the ground, thereby reducing the height of the substrate 100, the volume and the metal silver paste used.

It should be noted that the first inductor L1 to the fourth inductor L4, the first shielding layer C1, the second shielding layer C2, the third shielding layer C3, and the first inner electrode P7 and the second inner electrode P8 which are described below all include three plating layers, and the plating layers are a silver plating layer, a nickel plating layer, and a tin plating layer in sequence from inside to outside, so that the three-layer plating structure can ensure the soldering reliability of the product. Wherein the sintering temperature of the silver paste is 860-900 ℃, the silver content of the silver paste is 85 +/-5%, and the thickness of the silver layer is 10 microns +/-3 microns.

Specifically, the number of the through holes is four, and the four through holes are symmetrically distributed about the center of the first shielding layer C1, so that the printed pattern of the first shielding layer C1 is shaped like a Chinese character 'tian'.

In one embodiment, referring to fig. 11, the printed pattern of the second shielding layer C2 is hollowed out, and two sides of the printed pattern of the second shielding layer C2 extend to the edge of the substrate 100 to be electrically connected to the first ground port P4 and the second ground port P5, respectively. The second shielding layer C2 isolates the first inductor L1 and the third inductor L3 from the second inductor L2 and the fourth inductor L4, which is beneficial to adjusting phase uniformity and improving uniformity of phase imbalance.

Specifically, the printed pattern of the second shield layer C2 has a plurality of hollowed-out holes.

Optionally, the plurality of hollowed-out holes are distributed in a determinant manner. For example, the number of the hollow holes is 32, and each row has 8 hollow holes, and 4 rows are provided in total.

Optionally, the shape of the hollowed-out hole is square, circular, triangular or trapezoidal.

In one embodiment, referring to fig. 17, the printed pattern of the third shielding layer C3 is hollowed out, and two sides of the printed pattern of the third shielding layer C3 extend to the edge of the substrate 100 to be electrically connected to the first ground port P4 and the second ground port P5, respectively.

Alternatively, the printed pattern of the third shield layer C3 is the same as the printed pattern of the first shield layer C1.

In one embodiment, referring to fig. 4, 9 and 10, one of the plurality of dielectric diaphragms is printed with a first inner electrode P7, one end of the first inner electrode P7 extends to the edge of the substrate 100 to be electrically connected to the first balanced signal port P2, and the other end of the first inner electrode P7 is electrically connected to the sixth inductance part L32.

In this way, the sixth inductance section L32 is connected in series with the first balanced signal port P2 through the first inner electrode P7. One end of the printed pattern of the sixth inductor L32 does not necessarily extend to the edge of the dielectric film to be electrically connected to the first balanced signal port P2 located on the outer surface of the substrate 100, and can be flexibly designed according to design requirements, for example, the printed pattern of the sixth inductor L42 is the same as the printed pattern of the eighth inductor L42, so as to reduce the number of screens and simplify the manufacturing process.

In one embodiment, referring to fig. 4, 12 and 13, one of the dielectric diaphragms is printed with a second inner electrode P8, one end of the second inner electrode P8 extends to the edge of the substrate 100 to be electrically connected to the second balanced signal port P3, and the other end of the second inner electrode P8 is electrically connected to the eighth inductor L42.

Similarly, the eighth inductor L42 is connected in series with the second balanced signal port P3 through the second inner electrode P8, and the printed pattern of the eighth inductor L42 can be flexibly designed.

In one embodiment, with reference to fig. 1 and 4, each of the first inductor L11, the second inductor L12, the third inductor L21, the fourth inductor L22, the fifth inductor L31, the sixth inductor L32, the seventh inductor L41, and the eighth inductor L42 is a one-eighth wavelength line.

In this way, the first inductor L1, which is formed by connecting the first inductor L11 and the second inductor L12 in series, is a quarter-wave line. Similarly, the second inductor L2, the third inductor L3, and the fourth inductor L4 are all quarter-wave lines, and can be arranged and coupled in a staggered manner along the stacking direction to transmit energy, so that maximum space utilization is achieved.

In one possible example, referring to fig. 2 and 3, the unbalanced signal port P1, the first balanced signal port P2, the second balanced signal port P3, the first ground port P4, the second ground port P5 and the idle port P6 are formed over the top surface of the base 100, a side surface in the stacking direction, and the bottom surface of the base 100, respectively, and have a substantially angular "C" shape, but the shape is not limited thereto. The ports are staggered with respect to each other.

In one embodiment, referring to fig. 2 and 3, the substrate 100 is a ceramic substrate 100.

In one embodiment, referring to FIG. 2, the dielectric constant of the ceramic substrate 100 is 6 to 8.

In one embodiment, the ceramic substrate 100 has a dielectric loss tangent tan α ≦ 0.005.

Specifically, the sintering temperature of the substrate 100 is 860 ℃ to 900 ℃ by using the LTCC process.

In particular, the sintering temperature may be chosen to be 860 ℃, 870 ℃, 880 ℃, 890 ℃ or 900 ℃.

When the sintering temperature is higher than 900 ℃, the pattern conductor is easily cracked, and when the sintering temperature is lower than 860 ℃, the pattern conductor is not fired and the dielectric constant is not present. In the example, the dielectric constant is controlled to be 6-8, so that the use requirement in the ultrahigh frequency field is met.

In particular, the dielectric constant of the ceramic powder is 6.0, 6.5, 7.0, 7.5 or 8.0.

In particular, the dielectric loss factor tan α is 0.001, 0.002, 0.003, 0.004 or 0.005.

Referring to FIG. 2, the substrate 100 has a length dimension X of 1.8mm to 2.5mm, a width dimension Y of 1.0mm to 1.5mm, and a height dimension Z of 0.5mm to 1.0 mm.

In the embodiment, referring to fig. 19 to 21, the balun structure based on the LTCC process has the following technical effects:

firstly, based on the LTCC process, one quarter-wavelength line is split into two eighth-wavelength lines and the two eighth-wavelength lines are processed in a crossed mode, so that a lower frequency band, lower insertion loss and wider bandwidth can be achieved, and the sensitivity and complexity of a balun structure to processing errors are reduced.

Secondly, based on the balun structure realized by the LTCC process, the amplitude unbalance degree can be regulated and controlled in the form of splitting the coupling line, and the uniformity in a pass band is realized.

Thirdly, based on the balun structure realized by the LTCC process, the first shielding layer C1 and the third shielding layer C3 adopt a grid form, so that the width size can be effectively reduced, and the miniaturization is favorably realized; the second shielding layer C2 is designed to be hollow, the size, the number and the distribution position of the hollow holes can regulate and control the phase imbalance, and the phase imbalance can realize the uniformity in the through belt or the front-high back-low or the front-low back-high.

Example two

Referring to fig. 22, the present invention further provides a method for manufacturing the balun structure, the method includes the following steps:

s100: referring to fig. 6, a first film 110 is provided, and a pattern conductor of the first inductance part L11 is printed on the top surface of the first film 110.

Specifically, one end of the first inductance part L11 extends to the lower right side of the first diaphragm 110 to be connected in series with the unbalanced signal port P1 disposed subsequently, and the other end of the first inductance part L11 is located at the middle of the first diaphragm 110 to be connected in series with the second inductance part L12 via the first via conductor 210 subsequently.

S200: referring to fig. 7, a second film sheet 120 having a first via hole 121 is stacked on the first film sheet 110, the position of the first via hole 121 corresponds to the position of the first inductor L11, and the first via hole 121 is filled with a metal and a pattern conductor of a fifth inductor L31 printed on the second film sheet 120.

The metallized first via 121 is electrically connected to the first inductance part L11 located on the first diaphragm 110.

Alternatively, one end of the fifth inductance section L31 extends to the right middle of the second diaphragm 120 to be connected in series with the first ground port P4 disposed later, and the other end of the fifth inductance section L31 is located at the middle of the second diaphragm 120 to be connected in series with the sixth inductance section L32.

S300: referring to fig. 8, a third film 130 having a second through hole 131 and a third through hole 132 is stacked on the second film 120, the second through hole 131 is communicated with the first through hole 121, the position of the third through hole 132 corresponds to the position of the fifth inductor L31, a patterned conductor of the second inductor L12 is printed on the third film 130, the second through hole 131 and the third through hole 132 are filled with metal, and the second inductor L12 is electrically connected to the metallized second through hole 131.

Wherein the metallized second via 131 and the second via 131 form the first via conductor 210, thereby realizing the second inductor L12 in series with the first inductor L11.

Alternatively, one end of the second inductance part L12 extends to the lower left side of the third diaphragm 130 to be connected in series with the no-load terminal P6.

S400: referring to fig. 9, a fourth diaphragm 140 having a fourth through hole 141 is stacked on the third diaphragm 130, the fourth through hole 141 is communicated with the third through hole 132, the fourth through hole 141 is filled with a metal and a pattern conductor of a sixth inductor L32 is printed on the fourth diaphragm 140, and the sixth inductor L32 is communicated with the metallized fourth through hole 141.

Wherein the metallized fourth and

third vias

141, 132 form a second via conductor 220 to connect the sixth and fifth inductor portions L32, L31 in series.

In one possible example, one end of the sixth inductance section L32 extends to an edge of the fourth diaphragm 140 to be electrically connected with the first balanced signal port P2.

In another possible example, please refer to fig. 10, after step S400, the method further includes: a twelfth diaphragm 194 having a ninth through hole 1941 is stacked on the fourth diaphragm 140, the ninth through hole 1941 being located to correspond to the sixth inductor L32, a first internal electrode P7 is printed on the twelfth diaphragm 194 and the ninth through hole 1941 is metal-filled such that the first internal electrode P7 is connected in series to the sixth inductor L32 through the metalized ninth through hole 1941, and the other end of the first internal electrode P7 extends to the edge of the twelfth diaphragm 194 to be electrically connected to the first balanced signal port P2.

S500: referring to fig. 13, a fifth diaphragm 150 is stacked on the fourth diaphragm 140, and an eighth inductor L42 is printed on the fifth diaphragm 150.

In one possible example, one end of the eighth inductance section L42 extends to an edge of the fifth diaphragm 150 to be electrically connected with the second balanced signal port P3.

In another possible example, referring to fig. 12, before step S500, the method further includes: providing a thirteenth film 195, printing a second internal electrode P8 on the thirteenth film 195, the fifth film 150 having a tenth via hole 151, and filling the tenth via hole 151 with metal, the position of the tenth via hole 151 corresponding to the position of the second internal electrode P8, so that the second internal electrode P8 is connected in series with the eighth inductor L42 through the metalized tenth via hole 151, and the other end of the second internal electrode P8 extends to the edge of the thirteenth film 195 to be electrically connected with the second balanced signal port P3.

S600: referring to fig. 14, a sixth film 160 having a fifth through hole 161 is stacked on the fifth film 150, the position of the fifth through hole 161 corresponds to the position of the eighth inductor L42, and the fifth through hole 161 is filled with a metal and a pattern conductor of the fourth inductor L22 is printed on the sixth film 160.

S700: referring to fig. 15, a seventh film 170 having a sixth through hole 171 and a seventh through hole 172 is stacked on the sixth film 160, the sixth through hole 171 is communicated with the fifth through hole 161, the position of the seventh through hole 172 corresponds to the position of the fourth inductor L22, a pattern conductor of the seventh inductor L41 is printed on the seventh film 170, the sixth through hole 171 and the seventh through hole 172 are filled with metal, and the seventh inductor L41 is electrically connected to the metallized sixth through hole 171.

Wherein the metallized fifth via 161 and sixth via 171 form a fourth via conductor 240, and the seventh inductor L41 is connected in series with the eighth inductor L42 through the fourth via conductor 240.

S800: an eighth film sheet 180 having an eighth through hole 181 is stacked on the seventh film sheet 170, the eighth through hole 181 communicates with the seventh through hole 172, the eighth through hole 181 is filled with a metal and a pattern conductor of a third inductor L21 is printed on the eighth film sheet 180, and the third inductor L21 communicates with the metallized eighth through hole 181.

Wherein the metallized seventh and

eighth vias

172 and 181 form a third hole conductor 230, and the third inductor L21 is connected in series with the fourth inductor L22 through the third hole conductor 230.

S900: the first to eighth diaphragms 110 to 180 constitute a base 100, and an unbalanced signal port P1, a first balanced signal port P2, a second balanced signal port P3, a first ground port P4 and a second ground port P5 are provided on an outer surface of the base 100, where the unbalanced signal port P1 is in conduction with a first inductor L11, the first balanced signal port P2 is in conduction with a sixth inductor L32, the second balanced signal port P3 is in conduction with a seventh inductor L41, the first ground port P4 is in conduction with a fifth inductor L31, and the second ground port P5 is in conduction with an eighth inductor L42.

The balun structure prepared by the method has the beneficial effects that: the first inductor L1, the second inductor L2, the third inductor L3 and the fourth inductor L4 all comprise two inductance parts which are connected in series, the single length of the first inductor L1 to the fourth inductor L4 is effectively reduced, the space utilization is maximized, and the volume of the balun structure is further reduced.

In one embodiment, the above method further comprises the steps of:

s001: referring to fig. 5, before step S100, a ninth film sheet 191 is provided, and the pattern conductor of the first shielding layer C1 is printed on the ninth film sheet 191. In step S100, the first diaphragm 110 is stacked on the ninth diaphragm 191.

Both sides of the pattern conductor of the first shielding layer C1 extend to the middle of the left and right sides of the ninth diaphragm 191, respectively, to be electrically connected to the first ground port P4 and the second ground port P5.

Specifically, the pattern conductor of the first shield layer C1 is a capacitor.

Specifically, the pattern conductor of the first shielding layer C1 has a hollow hole. For example, the pattern conductor of the first shield layer C1 has a field shape.

S002: referring to fig. 11, between steps S400 and S500, the tenth film sheet 192 is stacked, and the pattern conductor of the second shielding layer C2 is printed on the tenth film sheet 192. Tenth diaphragm 192 is located between fourth diaphragm 140 and fifth diaphragm 150.

Both sides of the pattern conductor of the second shielding layer C2 extend to the middle of the left and right sides of the tenth diaphragm 192, respectively, to be electrically connected to the first ground port P4 and the second ground port P5.

Specifically, the pattern conductor of the second shield layer C2 is a capacitor.

Specifically, the pattern conductor of the second shielding layer C2 has a hollow hole. For example, the second shielding layer C2 has a plurality of through holes distributed in a row-column manner.

S003: referring to fig. 17, after step S800, an eleventh film sheet 193 is stacked on the eighth film sheet 180, and a pattern conductor of the third shield layer C3 is printed on the eleventh film sheet 193.

Both sides of the pattern conductor of the third shield layer C3 extend to the middle of the left and right sides of the eleventh diaphragm 193, respectively, to be electrically connected to the first ground port P4 and the second ground port P5.

Specifically, the pattern conductor of the third shield layer C3 is a capacitor.

Specifically, the pattern conductor of the third shielding layer C3 has a hollow hole. For example, the pattern conductor of the first shield layer C1 has a field shape.

Specifically, the pattern conductor of the third shield layer C3 and the pattern conductor of the first shield layer C1 are the same.

Further, referring to fig. 18, after step S003, a fourteenth membrane 196 is stacked on the eleventh membrane 193, and a mark 1961 is printed on the fourteenth membrane 196.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the utility model, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.

Claims

1. A balun structure, comprising:

2. The balun structure of claim 1, wherein: the first inductance part, the fifth inductance part, the second inductance part and the sixth inductance part are distributed in a staggered mode along the height direction of the base body, the first inductance part and the second inductance part are connected in series through a first hole conductor, and the fifth inductance part and the sixth inductance part are connected in series through a second hole conductor.

3. The balun structure of claim 1, wherein: the third inductance portion, the seventh inductance portion, the fourth inductance portion and the eighth inductance portion are distributed in a staggered mode in the height direction of the base body, the third inductance portion and the fourth inductance portion are connected in series through a third hole conductor, and the seventh inductance portion and the eighth inductance portion are connected in series through a fourth hole conductor.

4. The balun structure of claim 1, wherein: the base body comprises a plurality of medium diaphragms which are stacked in sequence, the plurality of medium diaphragms comprise a first shielding layer, a second shielding layer and a third shielding layer which are sequentially distributed along the stacking direction, the first inductor and the third inductor are located between the first shielding layer and the second shielding layer, and the second inductor and the fourth inductor are located between the second shielding layer and the third shielding layer.

5. A balun structure according to claim 4, characterized in that: the first inductor portion, the second inductor portion, the third inductor portion, the fourth inductor portion, the fifth inductor portion, the sixth inductor portion, the seventh inductor portion, and the eighth inductor portion are all planar spiral inductors printed on the dielectric film.

6. A balun structure according to claim 5, characterized in that: the balun structure further comprises at least one of:

the printed patterns of the second inductance part and the fourth inductance part are the same;

the printed patterns of the fifth inductance part and the seventh inductance part are the same;

the printed patterns of the sixth inductance part and the eighth inductance part are the same.

7. A balun structure according to claim 4, characterized in that: the balun structure further comprises at least one of:

the projections of the first inductance part and the fifth inductance part in the stacking direction are staggered by 1-10 mu m;

the projections of the second inductance part and the sixth inductance part in the stacking direction are staggered by 1-10 mu m;

the projections of the third inductance part and the seventh inductance part in the stacking direction are staggered by 1-10 mu m;

the projection of the fourth inductance part and the projection of the eighth inductance part in the stacking direction are staggered by 1-10 μm.

8. A balun structure according to claim 4, characterized in that: the balun structure further comprises at least one of:

the middle part of the printed pattern of the first shielding layer is hollow, and two sides of the printed pattern of the first shielding layer extend to the edge of the substrate so as to be electrically connected with the first grounding port and the second grounding port respectively;

the middle part of the printed pattern of the second shielding layer is hollow, and two sides of the printed pattern of the second shielding layer extend to the edge of the substrate so as to be electrically connected with the first grounding port and the second grounding port respectively;

the middle part of the printed pattern of the third shielding layer is hollow, and two sides of the printed pattern of the third shielding layer extend to the edge of the base body so as to be electrically connected with the first grounding port and the second grounding port respectively.

9. A balun structure according to claim 4, characterized in that:

one of the dielectric diaphragms is printed with a first inner electrode, one end of the first inner electrode extends to the edge of the base body to be electrically connected with the first balanced signal port, and the other end of the first inner electrode is electrically connected with the sixth inductance part;

and/or one of the plurality of dielectric diaphragms is printed with a second internal electrode, one end of the second internal electrode extends to the edge of the base body to be electrically connected with the second balanced signal port, and the other end of the second internal electrode is electrically connected with the eighth inductance part.

10. A balun structure according to any one of claims 1 to 9, characterized in that: the first inductance part, the second inductance part, the third inductance part, the fourth inductance part, the fifth inductance part, the sixth inductance part, the seventh inductance part, and the eighth inductance part are all one eighth wavelength lines;

the ceramic substrate is a ceramic substrate, the dielectric constant of the ceramic substrate is 6-8, and the dielectric loss factor tan alpha of the ceramic substrate is less than or equal to 0.005.