CN215813180U - Integrated optical module test circuit - Google Patents
Integrated optical module test circuit Download PDFInfo
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- CN215813180U CN215813180U CN202120998334.8U CN202120998334U CN215813180U CN 215813180 U CN215813180 U CN 215813180U CN 202120998334 U CN202120998334 U CN 202120998334U CN 215813180 U CN215813180 U CN 215813180U
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Abstract
The utility model discloses an integrated optical module test circuit, which comprises a power supply board card, wherein two sides of the power supply board card are electrically connected with second flat cables, one ends of the two second flat cables, which are far away from each other, are electrically connected with a BERT test circuit board, one ends of the two BERT test circuit boards, which are far away from each other, are electrically connected with first flat cables, one ends of the two first flat cables, which are far away from each other, are electrically connected with an MCU control circuit board, and the power supply board card, the BERT test circuit board and the MCU control circuit board are arranged side by side. Reduce workman's work burden, convenient to use.
Description
Technical Field
The utility model relates to the technical field of optical module testing, in particular to an integrated optical module testing circuit.
Background
With the rapid development of the internet and wireless communication technology, the optical fiber medium gradually replaces copper for communication transmission, and the optical module is one of the core devices in the optical fiber system, and the quality of the optical module directly affects the quality of optical fiber communication.
The optical module all-in-one machine is used for measuring the use parameters of an optical module, and for the existing optical module all-in-one machine, when a circuit fails, a fault part cannot be found quickly due to the fact that a circuit board in the existing optical module all-in-one machine is a whole plate body, the whole circuit board must be disassembled for maintenance or replacement, time is wasted, and cost is increased.
SUMMERY OF THE UTILITY MODEL
The utility model aims to solve the defects in the prior art and provides an integrated optical module test circuit.
In order to achieve the purpose, the utility model adopts the following technical scheme:
an integrated optical module test circuit comprises a power supply board card, wherein both sides of the power supply board card are electrically connected with second flat cables, two ends of the second flat cables, which are far away from each other, are electrically connected with a BERT test circuit board, two ends of the BERT test circuit boards, which are far away from each other, are electrically connected with a first flat cable, two ends of the first flat cables, which are far away from each other, are electrically connected with an MCU control circuit board, the power supply board card, the BERT test circuit board and the MCU control circuit board are arranged side by side, two BERT test circuit boards and two MCU control circuit boards are symmetrically arranged on both sides of the power supply board card, one side of the BERT test circuit board is provided with a plug-in card type test circuit board, the plug-in card type test circuit board and the BERT test circuit board are electrically connected through a CFP2 high-speed connector, and a USB interface for the BERT test is integrated on the MCU control circuit board, the tester comprises a BERT test circuit board, an MCU control circuit board, a CFP2 high-speed connector, a central processing unit and a clock reference, wherein the BERT test circuit board is integrated with a USB interface for module test, the BERT test circuit board is in electric signal transmission connection with a PC end through the USB interface for BERT test, one side of the MCU control circuit board is provided with a Trigger interface, the MCU control circuit board is in electric signal transmission connection with an external oscilloscope through the Trigger interface, the CFP2 high-speed connector comprises a connecting female end integrated on the BERT test circuit board and a connecting male end integrated on a plug-in card type test circuit board, the BERT test circuit board is integrated with the central processing unit and the clock reference, the plug-in card type test circuit board is designed in two types, the plug-in card type test circuit board is provided with extension of an I2C BUS BUS to access 2 QSFP28 or 4 SFP28, and the CFP2 high-speed connector adopts signal definition specified by an optical module protocol and combines with an MSA to define a unique interface of a CFP2 signal.
Preferably, the power board card and the BERT test circuit board are connected through a second flat cable, and the BERT test circuit board and the MCU control circuit board are connected through a first flat cable.
Preferably, one side of the card-inserting type test circuit board, which is far away from the BERT test circuit board, is provided with a plurality of module card-inserting card slots.
Preferably, the number of the module card-inserting slots is four.
Preferably, one side of the BERT test circuit board is provided with a connector interface matched with the CFP2 high-speed connector.
Preferably, a power switch is arranged on the power supply board card, and the power switch can control the switching power supply board card.
Preferably, a power socket is arranged on the power board card, and the power board card electrically connects the power socket with an external power supply through a power line.
Compared with the prior art, the utility model has the beneficial effects that:
1. in the utility model, a QSFP28 card-inserting type test circuit board or an SFP28 card-inserting type test circuit board is inserted and connected on a BERT test circuit board through the selection of a CFP2 high-speed connector and a connector interface and is fixed, so that the connection stability of the card-inserting type test circuit board box BERT test circuit board in the detection process is ensured;
2. according to the utility model, a USB interface for module testing is connected with a PC terminal to provide external current and PC terminal signal transmission for an integrated machine, so that PC program control is realized, a BERT test circuit board is used for reading and writing of an optical module and accessing a protocol layer through a central processing unit, generation of signals with different rates and error code detection are realized through a clock reference on the BERT test circuit board, and a measurement result is connected with an oscilloscope through a Trigger interface to check an electric eye diagram;
3. according to the utility model, the arrangement of the plurality of module card inserting slots enables the plurality of optical modules to be detected simultaneously, so that the working efficiency can be improved, and the workload of workers is reduced.
The utility model has simple structure, the QSFP28 card-inserting type test circuit board or the SFP28 card-inserting type test circuit board is inserted and connected on the BERT test circuit board through the CFP2 high-speed connector and connector interface selection to complete the detection process, and the arrangement of a plurality of module card-inserting slots can simultaneously detect a plurality of optical modules, thereby improving the working efficiency, reducing the workload of workers and being convenient to use.
Drawings
FIG. 1 is a schematic diagram of the overall circuit configuration of the present invention;
FIG. 2 is a schematic diagram of a BERT test circuit board structure according to the present invention;
FIG. 3 is a schematic diagram of the structure of the BERT test circuit board integrated central processing unit of the present invention;
FIG. 4 is a schematic diagram of the integrated clock reference structure of the BERT test circuit board of the present invention;
FIG. 5 is a schematic diagram of a QSFP28 circuit board structure according to the utility model;
FIG. 6 is a schematic diagram of the expanded structure of the QSFP28 circuit board integrated BUS of the present invention;
FIG. 7 is a schematic diagram of the SFP28 circuit board structure according to the present invention.
FIG. 8 is a schematic diagram of a single circuit configuration of SFP28 of the present invention;
FIG. 9 is a schematic diagram of an expanded structure of the SFP28 circuit board integrated BUS of the present invention.
In the figure: 1. a Trigger interface; 2. the MCU control circuit board; 3. a first flat cable; 4. a central processing unit; 5. a clock reference; 6. a second flat cable; 7. a power supply board card; 8. a power switch; 9. a power socket; 10. the module test is used for testing a USB interface; 11. a BERT test circuit board; 12. the BERT test is used for testing a USB interface; 13. a CFP2 high speed connector; 14. a card-insertion type test circuit board; 15. a module card slot; 16. a connector interface.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
Example one
Referring to fig. 1-9, an integrated optical module test circuit includes a power board 7, wherein two sides of the power board 7 are electrically connected with second bus lines 6, two ends of the second bus lines 6 away from each other are electrically connected with BERT test circuit boards 11, two ends of the BERT test circuit boards 11 away from each other are electrically connected with first bus lines 3, two ends of the first bus lines 3 away from each other are electrically connected with MCU control circuit boards 2, the power board 7, the BERT test circuit boards 11 and the MCU control circuit boards 2 are arranged side by side, the two BERT test circuit boards 11 and the two MCU control circuit boards 2 are symmetrically arranged on two sides of the power board 7, one side of the BERT test circuit board 11 is provided with a card insertion type test circuit board 14, the card insertion type test circuit board 14 and the BERT test circuit boards 11 are electrically connected by CFP2 high speed connectors 13, the MCU control circuit board 2 is integrated with a BERT test USB interface 12, the BERT test circuit board 11 is integrated with a USB interface 10 for module test, the BERT test circuit board 11 is connected with a PC end through a USB interface 12 for BERT test in an electric signal transmission manner, one side of the MCU control circuit board 2 is provided with a Trigger interface 1, the MCU control circuit board 2 is connected with an external oscilloscope in an electric signal transmission manner through the Trigger interface 1, the CFP2 high-speed connector 13 comprises a connecting female end integrated on the BERT test circuit board 11 and a connecting male end integrated on the card-inserting type test circuit board 14, the BERT test circuit board 11 is integrated with a central processing unit 4 and a clock reference 5, the card-inserting type test circuit board 14 is designed in two manners, the extensions of I2C BUS BUS are respectively arranged to access 2 QSFP28 or 4 SFP28, the CFP2 high-speed connector 13 adopts signal definition specified by an optical module protocol, and combines MSA to define a unique interface of CFP2 signals.
The MCU control circuit board's main control chip, F340 or EFM8, realize the logic control to the optical module, the reading and writing of MSA agreement, the I2C visit of module, integrate on BERT test mainboard 32, each trench, distribute independent USB control interface separately, power integrated circuit board 7 is an independent 12V changes +5V, change 3.3V, change 1.2V, change 1.0V, change 1.8V power integrated circuit board, realize supplying power to the BERT test circuit board, the optical module plug-in card of two trenches supplies power, realize with a power board, the power is designed into the mode of multichannel power output, realize the power supply of multichannel, the power supply of heavy current, the power supply circuit of power integrated circuit board 7 is with 6 power chips: LMZ31506RUQT, equal unit circuit, realize the heavy current output of the multipath, thus supply power for each functional module of double-slot position concentratedly, design the BERT core circuit, the master control of the optical module, clock circuit, socket (mother) of CFP2 together, become an independent unit, wherein, the master control of the optical module uses the chip of MCU to be F340 or EFM8, these two kinds of MCU master controls can be compatible and replaced, integrate two BERT main chips respectively, the model is in012525-CQ11-06GC, two are on a BERT test circuit board, test circuit board control to this BERT, the MCU used is CY8C5868, its design adopts the miniaturized design of mini, assign a USB control interface.
Example two
The embodiment is improved on the basis of the first embodiment: the power supply board card 7 is connected with the BERT test circuit board 11 through a second flat cable 6, the BERT test circuit board 11 is connected with the MCU control circuit board 2 through a first flat cable 3, one side, far away from the BERT test circuit board 11, of the card insertion type test circuit board 14 is provided with a plurality of module card insertion grooves, the number of the module card insertion grooves is four, one side of the BERT test circuit board 11 is provided with a connector interface 16 matched with a CFP2 high-speed connector 13, the power supply board card 7 is provided with a power switch 8, the power switch 8 can control the switch power supply board card 7, the power supply board card 7 is provided with a power socket 9, and the power supply board card 7 carries out electric connection on the power socket 9 and an external power supply through a power cord.
The power supply uses a DC 12V power adapter instead of the traditional alternating current 220V, and the power switch 29 is placed on the back side for convenient operation.
The working principle is as follows: when the circuit structure of the optical module all-in-one machine is used, a CFP2 high-speed connector 13 and a connector interface 16 select to insert and connect a QSFP28 card-inserting type test circuit board 14 or an SFP28 card-inserting type test circuit board 14 on a BERT test circuit board 11, and fix the same, so that the connection stability of the card-inserting type test circuit board 14 and the BERT test circuit board 11 in the detection process is ensured, a USB interface 10 for module test is connected with a PC end to provide external current and PC end signal transmission for the all-in-one machine, so that PC program control is realized, the BERT test circuit board 11 is used for reading and writing of optical modules and accessing a protocol layer through a central processing unit 4, the generation of signals with different rates and error code detection are realized through a clock reference 5 on the BERT test circuit board 11, the measurement result is connected with an oscilloscope through a Trigger interface 1 to check an electric eye diagram, and the arrangement of a plurality of module card-inserting slots 15 enables a plurality of optical modules to be detected simultaneously, and then can improve work efficiency, reduce workman work burden.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and equivalent alternatives or modifications according to the technical solution of the present invention and the inventive concept thereof should be covered by the scope of the present invention.
Claims (7)
1. An integrated form optical module test circuit, includes power integrated circuit board (7), its characterized in that: the both sides of power integrated circuit board (7) all electric connection have second winding displacement (6), two the equal electric connection of one end that second winding displacement (6) kept away from each other has BERT test circuit board (11), two the equal electric connection of one end that BERT test circuit board (11) kept away from each other has first winding displacement (3), two the equal electric connection of one end that first winding displacement (3) kept away from each other has MCU control circuit board (2), power integrated circuit board (7), BERT test circuit board (11) and MCU control circuit board (2) are and set up side by side and two BERT test circuit board (11) and two MCU control circuit board (2) symmetry set up the both sides at power integrated circuit board (7), one side of BERT test circuit board (11) is provided with plug card formula test circuit board (14), carry out electric connection through CFP2 high speed connector (13) between plug card formula test circuit board (14) and the BERT test circuit board (11), MCU control circuit board (2) is gone up the integration and is had USB interface (12) for BERT test, the integration has USB interface (10) for module test on BERT test circuit board (11), BERT test circuit board (11) carry out signal transmission through USB interface (12) for BERT test and PC end and is connected, one side of MCU control circuit board (2) is provided with Trigger interface (1), MCU control circuit board (2) carry out signal transmission through Trigger interface (1) and peripheral oscilloscope and be connected, CFP2 high speed connector (13) are including integrated connection female end on BERT test circuit board (11) and the integrated male end of connection on plug-in card formula test circuit board (14), integrated central processing unit (4) and clock benchmark (5) on BERT test circuit board (11).
2. The integrated optical module test circuit according to claim 1, wherein the power board (7) and the BERT test circuit board (11) are connected by a second flat cable (6), and the BERT test circuit board (11) and the MCU control circuit board (2) are connected by a first flat cable (3).
3. The integrated optical module test circuit according to claim 1, wherein a side of the card-plug type test circuit board (14) away from the BERT test circuit board (11) is provided with a plurality of module card-plug card slots.
4. The integrated optical module testing circuit according to claim 3, wherein the number of the module card slots is four.
5. An integrated optical module test circuit as claimed in claim 1, wherein one side of the BERT test circuit board (11) is provided with a connector interface (16) adapted to a CFP2 high speed connector (13).
6. An integrated optical module test circuit as claimed in claim 1, wherein a power switch (8) is disposed on the power board (7), and the power switch (8) can control the switching power board (7).
7. The integrated optical module test circuit according to claim 1, wherein a power socket (9) is disposed on the power board (7), and the power board (7) electrically connects the power socket (9) with an external power source through a power line.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120998334.8U CN215813180U (en) | 2021-05-11 | 2021-05-11 | Integrated optical module test circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120998334.8U CN215813180U (en) | 2021-05-11 | 2021-05-11 | Integrated optical module test circuit |
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| Publication Number | Publication Date |
|---|---|
| CN215813180U true CN215813180U (en) | 2022-02-11 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202120998334.8U Active CN215813180U (en) | 2021-05-11 | 2021-05-11 | Integrated optical module test circuit |
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| CN (1) | CN215813180U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117074924A (en) * | 2023-10-13 | 2023-11-17 | 天津信天电子科技有限公司 | Hydraulic controller veneer and single machine test fixture |
-
2021
- 2021-05-11 CN CN202120998334.8U patent/CN215813180U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117074924A (en) * | 2023-10-13 | 2023-11-17 | 天津信天电子科技有限公司 | Hydraulic controller veneer and single machine test fixture |
| CN117074924B (en) * | 2023-10-13 | 2023-12-29 | 天津信天电子科技有限公司 | Hydraulic controller veneer and single machine test fixture |
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