CN215773654U

CN215773654U - Circuit for controlling two LED states through single IO port

Info

Publication number: CN215773654U
Application number: CN202121762562.1U
Authority: CN
Inventors: 汪黎莉; 郑东文
Original assignee: Shenzhen Shengnengjie Technology Co ltd
Current assignee: Shenzhen Shengnengjie Technology Co ltd
Priority date: 2021-07-30
Filing date: 2021-07-30
Publication date: 2022-02-08
Anticipated expiration: 2031-07-30

Abstract

The utility model provides a circuit for controlling two LED states by a single IO port, which comprises: the signal input end is connected with an IO port of the MCU, and the signal input end is connected with the parallel reverse circuit, the signal processing circuit and the second logic reverse circuit; the parallel reverse circuit is connected with the signal processing circuit in parallel, and the circuit after parallel connection is connected with the first logic reverse circuit in series; the first logic reverse line is connected with the cathode of a signal lamp LD1 through a resistor R86; the second logic reverse line is connected with the cathode of the second lamp LD2 through a resistor R92; the anodes of the first signal lamp LD1 and the second signal lamp LD2 are connected with the power supply voltage VDS, and the anodes of the first signal lamp LD1 and the second signal lamp LD2 are connected with the power supply voltage VDS. The utility model solves the problems that the states of two LED lamps controlled by a common IO port are respectively the combination of normally on and normally off, the combination mode is less, and the release of IO port resources is limited.

Description

Circuit for controlling two LED states through single IO port

Technical Field

The utility model relates to the technical field of LED control circuits, in particular to a circuit for controlling two LED states by a single IO port.

Background

In the prior art, the MCU is usually adopted to control the LED lamps by the IO port of the three-state gate of the MCU to display the product state, but the IO port resource in the MCU is limited, the IO port resource is gradually tense along with the continuous increase of the functions of electronic products, although the current technology of two LED lamps controlled by the common IO port is also available, the LED lamp states are respectively the combination of normally on and normally off, the combination mode is less, and the release of the IO port resource is limited.

SUMMERY OF THE UTILITY MODEL

In order to overcome the defects in the prior art, a circuit for controlling the states of two LEDs through a single IO port is provided so as to solve the problems that the states of two LED lamps controlled by a common IO port are respectively the combination of normally on and normally off, the combination mode is less, and the alleviation of IO port resources is limited.

In order to achieve the above object, a circuit for controlling two LED states by a single IO port is provided, which includes:

the signal input end is connected with an IO port of the MCU, and the signal input end is connected with the parallel reverse circuit, the signal processing circuit and the second logic reverse circuit;

the parallel reverse circuit is connected with the signal processing circuit in parallel, and the circuit after parallel connection is connected with the first logic reverse circuit in series;

the first logic reverse line is connected with the cathode of a signal lamp LD1 through a resistor R86;

the second logic reverse line is connected with the cathode of the second lamp LD2 through a resistor R92;

the anodes of the first signal lamp LD1 and the second signal lamp LD2 are connected with the power supply voltage VDS, and the anodes of the first signal lamp LD1 and the second signal lamp LD2 are connected with the power supply voltage VDS.

Further, the parallel reverse line comprises a resistor R87, a resistor R89, a resistor R91 and a transistor Q9, the resistor R87 is connected with the power supply voltage VDS and a collector C of the transistor Q9, the resistor R89 is connected with the signal input end and a base B of the transistor Q9, the resistor R91 is connected with a base B and an emitter E of the transistor Q9, and the emitter E of the transistor Q9 is connected with a common ground GND _ S.

Further, the signal processing circuit comprises a resistor R93, a resistor R94, a resistor R95, a capacitor C88 and a comparator U12, an output end 1 of the comparator U12 is connected to a connection line between the parallel reverse line and the first logic reverse line, an inverting input end 2 of the comparator U12 is connected to a connection point between the resistor R93 and the capacitor C88, and a non-inverting input end 3 of the comparator U12 is connected to a connection point between the resistor R94 and the resistor R95.

Furthermore, a resistor R93 and a capacitor C88 in the signal processing line are connected to form an RC filter circuit, the other end of the resistor R93 is connected to the signal input end, the other end of the capacitor C88 is connected to a common ground GND _ S, a resistor R94 and a resistor R95 are connected in parallel to form a voltage division circuit, the other end of the resistor R94 is connected to a power supply voltage VDS, and the other end of the resistor R95 is connected to the common ground GND _ S.

Further, the first logic inversion circuit and the second logic inversion circuit have the same structure, the first logic inversion circuit comprises a resistor R88, a resistor R90 and a transistor Q8, the second logic inversion circuit comprises a resistor R96, a resistor R97 and a transistor Q10, emitter electrodes E of the transistor Q8 and the transistor Q10 are all connected with a common ground GND _ S, collector electrodes C of the transistor Q8 and the transistor Q10 are respectively connected with the resistor R86 and the resistor R92, and a resistor R90 and a resistor R97 are respectively connected between base electrodes B and collector electrodes C of the transistor Q8 and the transistor Q10.

Furthermore, one end of a resistor R88 in the first logic inversion circuit is connected with a base B of a triode Q8, the other end of a resistor R88 is connected between a collector C of the triode Q9 and a resistor R87, and a resistor R96 in the second logic inversion circuit is connected with a base B of a triode Q10 and the signal input end.

The circuit for controlling two LED states by the single IO port has the advantages that the circuit for controlling two LED states by the single IO port controls four states of normally on/off, normally off/flashing, normally off/normally on and flashing of two LED lamps by using a single common IO port, effectively relieves the problem of shortage of IO resources of an MCU, is simple in circuit, easy to realize and low in cost, and facilitates expansion of product functions.

Drawings

FIG. 1 is a schematic diagram of the circuit structure of the present invention;

FIG. 2 is a schematic structural diagram according to a first embodiment of the present invention;

FIG. 3 is a schematic structural diagram according to a second embodiment of the present invention;

FIG. 4 is a schematic structural diagram of a third embodiment of the present invention;

fig. 5 is a schematic structural diagram of a fourth embodiment of the present invention.

In the drawings, the components represented by the respective reference numerals are listed below:

100. a signal input terminal; 200. parallel reverse lines; 300. a first logic inversion circuit; 400. a signal processing circuit; 500. a second logical inversion line; 600. a signal lamp LD 1; 700. and a second signal lamp LD 2.

Detailed Description

The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The utility model is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.

Referring to fig. 1, the present invention provides a circuit for controlling two LED states by a single IO port, including: signal input terminal 100, parallel inverting circuit 200, signal processing circuit 400, second logic inverting circuit 500, first lamp LD1600 and second lamp LD 2700.

Specifically, the signal input end 100 is connected to an IO port of the MCU, and the signal input end 100 is connected to the parallel reverse line 200, the signal processing line 400, and the second logic reverse line 500; the signal input terminal 100 is used for connecting a common IO port of the MCU and inputting the STATUS _ LED signal into a control circuit of the LED lamp.

A parallel reverse line 200, wherein the parallel reverse line 200 is connected with the signal processing line 400 in parallel, and the parallel circuit is connected with the first logic reverse line 300 in series; the parallel-connection inverter line 200 comprises a resistor R87, a resistor R89, a resistor R91 and a transistor Q9, wherein the resistor R87 is connected with the power supply voltage VDS and a collector C of a transistor Q9, the resistor R89 is connected with the signal input terminal 100 and a base B of the transistor Q9, the resistor R91 is connected with a base B and an emitter E of a transistor Q9, and the emitter E of the transistor Q9 is connected with a common ground GND _ S.

The parallel reverse circuit 200 is used for avoiding the situation that two LED lamps are instantly turned on in the process that the STATUS _ LED signal is switched to a high level from other states, a certain time delay exists on the circuit due to the existence of the capacitor C88 arranged in the signal processing circuit 400, when the STATUS _ LED signal is switched to the high level from other states, the capacitor C88 needs to be charged for a period of time, so that the comparator U12 can still keep the high level in the charging time, and the first lamp LD1 is turned on, and when the parallel reverse circuit 200 exists, when the STATUS _ LED signal is switched to the high level, the circuit can immediately pull down the output voltage of the comparator U12, and the first lamp LD1 is turned off by the turning on.

The signal processing circuit 400 comprises a resistor R93, a resistor R94, a resistor R95, a capacitor C88 and a comparator U12, wherein the output end 1 of the comparator U12 is connected to a connecting line between the parallel reverse line 200 and the first logic reverse line 300, the inverting input end 2 of the comparator U12 is connected to a connecting point between the resistor R93 and the capacitor C88, and the non-inverting input end 3 of the comparator U12 is connected to a connecting point between the resistor R94 and the resistor R95; the resistor R93 and the capacitor C88 in the signal processing circuit 400 are connected to form an RC filter circuit, the other end of the resistor R93 is connected with the signal input end 100, the other end of the capacitor C88 is connected with a common ground GND _ S, the resistor R94 and the resistor R95 are connected in parallel to form a voltage division circuit, the other end of the resistor R94 is connected with the power supply voltage VDS, and the other end of the resistor R95 is connected with the common ground GND _ S.

Comparator U12 is model LM2903 SM.

A first logic reverse circuit 300, wherein the first logic reverse circuit 300 is connected with the cathode of a signal lamp LD1600 through a resistor R86; a second logic inversion circuit 500, wherein the second logic inversion circuit 500 is connected to the cathode of the second LD2700 through a resistor R92; the first logic inversion circuit 300 and the second logic inversion circuit 500 have the same structure, the first logic inversion circuit 300 includes a resistor R88, a resistor R90 and a transistor Q8, the second logic inversion circuit 500 includes a resistor R96, a resistor R97 and a transistor Q10, emitters E of the transistor Q8 and the transistor Q10 are both connected to a common ground GND _ S, collectors C of the transistor Q8 and the transistor Q10 are respectively connected to the resistor R86 and the resistor R92, a resistor R90 and a resistor R97 are respectively connected between a base B and a collector C of the transistor Q8 and the transistor Q10, one end of a resistor R88 in the first logic inversion circuit 300 is connected to the base B of the transistor Q8, the other end of the resistor R88 is connected between a collector C of the transistor Q9 and the resistor R87, and a resistor R96 in the second logic inversion circuit 500 is connected to the base B of the transistor Q10 and the signal input terminal 100.

The first logic inversion circuit 300 and the second logic inversion circuit 500 are used to change the direction of the input signal, and need not necessarily exist, and all that is needed is to display the logic for the LED in this case, and if the first logic inversion circuit 300 and the second logic inversion circuit 500 are removed, the result is only changed logically.

Anodes of the first LD1600 and the second LD2700 lamps, and the anodes of the first LD1600 and the second LD2700 lamps are connected to a power supply voltage VDS.

The first lamp LD1600 and the second lamp LD2700 are light emitting diodes, and when the cathode voltage is higher than the anode voltage, the diodes are cut off, the LED lamps are in a normally off state, and when the anode voltage is higher than the cathode voltage, the diodes are conducted, and the LED lamps are in a normally on state.

As shown in fig. 2, in the first embodiment, when the STATUS _ LED signal inputted from the signal input terminal 100 is at a high level, the transistor Q9 is in a saturated state, the output voltage is a transistor saturation voltage drop (low level), the low level is changed into a high level after being inverted by the first logic inversion circuit 300 to reach the cathode of the first lamp LD1, the first lamp LD1 is normally off, the STATUS _ LED signal is changed into a low level after being inverted by the second logic inversion circuit 500 to reach the cathode of the second lamp LD2, and the second lamp LD2 is normally on.

As shown in fig. 3, in the second embodiment, when the STATUS _ LED signal inputted from the signal input terminal 100 is at a low level, the transistor Q9 is in an off state, the output voltage is pulled up to the power voltage VDC (high level) by the resistor R87, the high level is inverted by the first logic inversion circuit 300 to become a low level to reach the cathode of the first lamp LD1, the first lamp LD1 is normally on, the STATUS _ LED signal is inverted by the second logic inversion circuit 500 to become a high level to reach the cathode of the second lamp LD2, and the second lamp LD2 is normally off.

As shown in fig. 4, in the third embodiment, when the STATUS _ LED signal input from the signal input terminal 100 is a high-frequency square wave and has a frequency greater than the cut-off frequency of the resistor R93 and the capacitor C88, the signal processing circuit 400 operates, the high-frequency signal is changed into an intermediate level (one-half of the supply voltage VDS) by RC filtering and is input to the reverse input pin 2 of the comparator U12, the forward input pin 3 of the comparator U12 is kept at a relatively small voltage value (one-third of the supply voltage VDS) by voltage division, at this time, the reverse input voltage is greater than the forward input voltage, the comparator U12 outputs a low level, the lamp LD1 is normally off, and the lamp LD2 blinks according to the frequency of the STATUS _ LED signal.

As shown in fig. 5, in the fourth embodiment, when the STATUS _ LED signal input from the signal input terminal 100 is a low-frequency square wave or a high-frequency square wave with a frequency less than the cut-off frequency of the resistor R93 and the capacitor C88, the signal processing circuit 400 only performs the reverse function (low-frequency square wave) or does not perform the function, and both the first lamp LD1 and the second lamp LD2 are in the flashing state.

The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the utility model, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.

Claims

1. A circuit for controlling two LED states through a single IO port is characterized by comprising:

the signal input end (100) is connected with an IO port of the MCU, and the signal input end (100) is connected with the parallel reverse line (200), the signal processing line (400) and the second logic reverse line (500);

the parallel reverse line (200), the parallel reverse line (200) and the signal processing line (400) are connected in parallel, and the parallel circuit is connected with the first logic reverse line (300) in series;

a first logic inversion circuit (300), said first logic inversion circuit (300) being connected to the cathode of a lamp LD1(600) through a resistor R86;

a second logical inversion line (500), the second logical inversion line (500) being connected to the cathode of the second lamp LD2(700) through a resistor R92;

the first signal lamp LD1(600) and the second signal lamp LD2(700), the anodes of the first signal lamp LD1(600) and the second signal lamp LD2(700) are connected with a power supply voltage VDS.

2. A line for controlling the status of two LEDs via a single IO port as claimed in claim 1, wherein the parallel-connected inverter line (200) comprises a resistor R87, a resistor R89, a resistor R91 and a transistor Q9, the resistor R87 is connected to the supply voltage VDS and the collector C of the transistor Q9, the resistor R89 is connected to the signal input terminal (100) and the base B of the transistor Q9, the resistor R91 is connected to the base B and the emitter E of the transistor Q9, and the emitter E of the transistor Q9 is connected to the common ground GND _ S.

3. The circuit for controlling the states of two LEDs through a single IO port as claimed in claim 1, wherein the signal processing circuit (400) comprises a resistor R93, a resistor R94, a resistor R95, a capacitor C88 and a comparator U12, wherein the output terminal 1 of the comparator U12 is connected to the connection line between the parallel inverting line (200) and the first logic inverting line (300), the inverting input terminal 2 of the comparator U12 is connected to the connection point between the resistor R93 and the capacitor C88, and the non-inverting input terminal 3 of the comparator U12 is connected to the connection point between the resistor R94 and the resistor R95.

4. A circuit for controlling the status of two LEDs by a single IO port as claimed in claim 3, wherein the resistor R93 of the signal processing circuit (400) is connected to the capacitor C88 to form an RC filter circuit, the other end of the resistor R93 is connected to the signal input terminal (100), the other end of the capacitor C88 is connected to the common ground GND _ S, the resistor R94 and the resistor R95 are connected in parallel to form a voltage divider circuit, the other end of the resistor R94 is connected to the supply voltage VDS, and the other end of the resistor R95 is connected to the common ground GND _ S.

5. The circuit of claim 1, wherein the first logic inversion circuit (300) and the second logic inversion circuit (500) have the same structure, the first logic inversion circuit (300) comprises a resistor R88, a resistor R90 and a transistor Q8, the second logic inversion circuit (500) comprises a resistor R96, a resistor R97 and a transistor Q10, the emitter electrodes E of the transistor Q8 and the transistor Q10 are connected to the common ground GND _ S, the collector electrodes C of the transistor Q8 and the transistor Q10 are connected to the resistor R86 and the resistor R92, and the base electrodes B and the collector electrodes C of the transistor Q8 and the transistor Q10 are connected to the resistor R90 and the resistor R97, respectively.

6. A circuit for controlling the status of two LEDs via a single IO port as claimed in claim 5, wherein the resistor R88 in the first logic inversion circuit (300) has one end connected to the base B of the transistor Q8, the other end of the resistor R88 is connected between the collector C of the transistor Q9 and the resistor R87, and the resistor R96 in the second logic inversion circuit (500) is connected to the base B of the transistor Q10 and the signal input terminal (100).