CN215734276U

CN215734276U - Wireless full-duplex 2.4G repeater

Info

Publication number: CN215734276U
Application number: CN202121983639.8U
Authority: CN
Inventors: 刘滨
Original assignee: Nanjing Puietel Technology Co ltd
Current assignee: Nanjing Puietel Technology Co ltd
Priority date: 2021-08-23
Filing date: 2021-08-23
Publication date: 2022-02-01
Anticipated expiration: 2031-08-23

Abstract

The utility model discloses a wireless full duplex 2_·The 4G repeater comprises a power supply module, and a main control module, a wireless receiving module and a wireless sending module which are respectively electrically connected with the power supply module, wherein the main control module is respectively connected with the wireless receiving module and the wireless sending module and used for processing and transferring data, the wireless receiving module is used for receiving the data, the wireless sending module is used for forwarding the data, and the wireless receiving module and the wireless sending module both adopt 2.4G modules. The wireless receiving module is configured to work at the receiving module through the main control module, and the wireless sending module works at the sending module but not at the sending moduleThe mode conversion is adopted, the problem of packet loss during switching between the sending state and the receiving state is reduced, and the efficiency of relay forwarding is improved.

Description

Wireless full duplex 2·4G repeater

Technical Field

The utility model relates to the technical field of communication, in particular to a wireless full-duplex 2.4G repeater.

Background

The transmission of wireless products is easily restricted by distance and cannot be transmitted in long distance, part of wireless products support skip transmission and relay, but the forwarding efficiency is too low, wireless modules can only work in half duplex mode, cannot transmit during receiving, cannot receive during transmitting, has longer receiving and transmitting conversion time, is easy to lose packets, has higher channel occupancy rate and is easy to conflict, and when more wireless devices exist, the conflict problem of wireless signals is more serious.

SUMMERY OF THE UTILITY MODEL

In order to solve the above problems in the prior art, an object of the present invention is to provide a wireless full-duplex 2.4G repeater, which has solved the above mentioned problems of long receiving and transmitting conversion time, easy packet loss, and low relay forwarding efficiency.

In order to solve the technical problems, the technical scheme adopted by the utility model is as follows: the utility model provides a wireless full-duplex 2.4G repeater, includes power module and host system, wireless receiving module and the wireless sending module of being connected with the power module electricity respectively, host system is connected with wireless receiving module and wireless sending module respectively for the processing and the transfer of data, wireless receiving module is used for the receipt of data, wireless sending module is used for forwardding of data, wireless receiving module and wireless sending module all adopt the 2.4G module.

As a further improvement of the present invention, the main control module includes: the device comprises a main control chip, a download interface circuit, a reset circuit and a filter circuit;

the main control chip comprises a first capacitor and a first resistor, a pin 1 of the main control chip is grounded through the first capacitor, a pin 7 and a pin 20 of the main control chip are respectively connected with 3V3 working voltage, a pin 19 is grounded, and a pin 28 is grounded through the first resistor;

the download interface circuit comprises a wiring terminal, wherein a pin 1 of the wiring terminal is connected with 3V3 working voltage, a pin 2 of the wiring terminal is connected with a pin 26 of the main control chip, a pin 3 of the wiring terminal is connected with a pin 27 of the main control chip, and a pin 4 of the wiring terminal is grounded;

the reset circuit comprises a second resistor and a fifth capacitor, a pin 6 of the main control chip is connected with a 3V3 working voltage through the second resistor, and the pin 6 of the main control chip is grounded through the fifth capacitor;

the filter circuit comprises a second capacitor, a third capacitor and a fourth capacitor, wherein after the second capacitor, the third capacitor and the fourth capacitor are connected in parallel, one end of the filter circuit is connected with a 3V3 working voltage, and the other end of the filter circuit is grounded.

As a further improvement of the present invention, the wireless receiving module includes a second chip, pin 1 of the second chip is connected to a 3V3 working voltage, pin 6 and pin 8 of the second chip are respectively grounded, pin 2, pin 3, pin 4 and pin 5 of the second chip are respectively connected to pin 21, pin 22, pin 23 and pin 24 of the main control chip, pin 7 of the second chip is connected to an a port of the first antenna, and a G port of the first antenna is grounded.

As a further improvement of the present invention, the wireless transmission module includes a third chip, pin 1 of the third chip is connected to a 3V3 working voltage, pin 6 and pin 7 of the third chip are grounded, pin 9 and pin 10 of the third chip are respectively connected to pin 7 of the third chip, pin 2, pin 3, pin 4 and pin 5 of the third chip are respectively connected to pin 15, pin 13, pin 14 and pin 12 of the main control chip, pin 8 of the third chip is connected to an a port of the second antenna, and pin 7 of the third chip is connected to a G port of the second antenna.

As a further improvement of the utility model, the power supply module comprises a non-isolated AC/DC conversion circuit and a linear voltage stabilizing circuit, wherein the non-isolated AC/DC conversion circuit is used for converting 220V alternating current into 5V direct current voltage and outputting the voltage to the linear voltage stabilizing circuit, and the linear voltage stabilizing circuit is used for converting the 5V voltage output by the non-isolated conversion circuit into 3V3 working voltage.

As a further improvement of the utility model, the non-isolated AC/DC conversion circuit comprises a conversion chip, a fuse, an inductor, a thirteenth electrolytic capacitor, an eighth electrolytic capacitor and a ninth capacitor, wherein a pin 1 of the conversion chip is connected with a 220V live wire terminal through the fuse, a pin 2 of the conversion chip is connected with an anode of the thirteenth electrolytic capacitor, a cathode of the thirteenth electrolytic capacitor is connected with a 220V zero wire terminal through the inductor, a cathode of the thirteenth electrolytic capacitor is connected with a pin 3 of the conversion chip, an anode of the eighth electrolytic capacitor is connected with a pin 4 of the conversion chip, a cathode of the eighth electrolytic capacitor is connected with a pin 3 of the conversion chip, one end of the ninth capacitor is connected with the pin 4 of the conversion chip, one end of the ninth capacitor outputs 5V working voltage, and the other end of the ninth capacitor is connected with a cathode of the eighth electrolytic capacitor, the other end of the ninth capacitor is grounded.

As a further improvement of the present invention, the linear voltage stabilizing circuit includes a linear voltage stabilizing chip, an eleventh capacitor, a tenth electrolytic capacitor and a twelfth capacitor, one end of the eleventh capacitor is connected to pin 1 of the linear voltage stabilizing chip, the other end of the eleventh capacitor is connected to pin 3 of the linear voltage stabilizing chip, the other end of the eleventh capacitor inputs a 5V operating voltage, pin 1 of the linear voltage stabilizing chip is grounded, pin 2 of the linear voltage stabilizing chip is connected to the anode of the tenth electrolytic capacitor, the cathode of the tenth electrolytic capacitor is connected to pin 1 of the linear voltage stabilizing chip, one end of the twelfth capacitor is connected to pin 2 of the linear voltage stabilizing chip, one end of the twelfth capacitor outputs a 3V3 operating voltage, and the other end of the twelfth capacitor is connected to the cathode of the tenth electrolytic capacitor and pin 1 of the linear voltage stabilizing chip respectively.

As a further improvement of the present invention, the model number of the main control chip is HC32F030E8PA, the capacity of the second capacitor is 4.7uF, the upper limit of the voltage to be borne is 16V, the capacity of the third capacitor is 0.1uF, the upper limit of the voltage to be borne is 50V, the capacity of the fourth capacitor is 0.17uF, and the upper limit of the voltage to be borne is 50V.

As a further improvement of the utility model, the model number of the conversion chip is LS01-K3B05SS, the capacity of the thirteenth electrolytic capacitor is 10uF, the borne voltage upper limit value is 450V, the capacity of the eighth electrolytic capacitor is 220uF, the borne voltage upper limit value is 16V, the capacity of the ninth capacitor is 0.1uF, and the borne voltage upper limit value is 50V.

As a further improvement of the utility model, the model number of the linear voltage stabilizing chip is SPX1117m3-3.3, the capacity of the eleventh capacitor is 10uF, the borne voltage upper limit value is 16V, the capacity of the tenth electrolytic capacitor is 100uF, the borne voltage upper limit value is 16V, the capacity of the twelfth capacitor is 0.1uF, and the borne voltage upper limit value is 50V.

Compared with the prior art, the utility model has the following beneficial effects:

according to the wireless full-duplex 2.4G repeater, the wireless receiving module is configured to work in the receiving module through the main control module, the wireless sending module works in the sending module, mode conversion does not exist, the problem of packet loss when the sending state and the receiving state are switched is solved, and the efficiency of relay forwarding is improved.

Drawings

FIG. 1 is a block diagram of the overall structure of the present invention;

FIG. 2 is a circuit diagram of a main control chip according to the present invention;

FIG. 3 is a circuit diagram of a download interface according to the present invention;

FIG. 4 is a diagram of a reset circuit according to the present invention;

FIG. 5 is a diagram showing a structure of a filter circuit according to the present invention;

FIG. 6 is a circuit diagram of a wireless receiving module according to the present invention;

FIG. 7 is a circuit diagram of a wireless transmitter module according to the present invention;

FIG. 8 is a block diagram of a non-isolated AC/DC converter circuit according to the present invention;

FIG. 9 is a block diagram of the linear voltage regulator circuit of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Fig. 1 to 9 are schematic structural diagrams illustrating an embodiment of a wireless full-duplex 2.4G repeater according to the present invention, and a main body of the wireless full-duplex 2.4G repeater includes a power module 1, a main control module 2, a wireless receiving module 3, and a wireless transmitting module 4.

The power supply module 1 provides power supply for the main control module 2, the wireless receiving module 3 and the wireless transmitting module 4 respectively. Specifically, the power module 1 includes a non-isolated AC/DC conversion circuit and a linear voltage stabilizing circuit, the non-isolated AC/DC conversion circuit is configured to convert 220V AC power into 5V DC voltage and output the voltage to the linear voltage stabilizing circuit, and the linear voltage stabilizing circuit is configured to convert the 5V voltage output by the non-isolated conversion circuit into 3V3 working voltage.

As shown in fig. 8, the non-isolated AC/DC conversion circuit includes a conversion chip U4, a fuse F1, an inductor L1, a thirteenth electrolytic capacitor C13, an eighth electrolytic capacitor C8, and a ninth capacitor C9. Specifically, a pin 1 of the conversion chip U4 is connected to a 220V live wire terminal AC _ L through a fuse F1, a pin 2 of the conversion chip U4 is connected to an anode of a thirteenth electrolytic capacitor C13, a cathode of the thirteenth electrolytic capacitor C13 is connected to a 220V neutral wire terminal AC _ N through an inductor L1, a cathode of the thirteenth electrolytic capacitor C13 is connected to a pin 3 of the conversion chip U4, an anode of the eighth electrolytic capacitor C8 is connected to a pin 4 of the conversion chip U4, a cathode of the eighth electrolytic capacitor C8 is connected to a pin 3 of the conversion chip U4, one end of the ninth capacitor C9 is connected to a pin 4 of the conversion chip U4, one end of the ninth capacitor C9 outputs a 5V working voltage, the other end of the ninth capacitor C9 is connected to a cathode of the eighth electrolytic capacitor C8, and the other end of the ninth capacitor C9 is grounded. The fuse F1 is used as a circuit protection device, and when the following circuit is damaged or short-circuited, the fuse can be fused to protect the product from safety problems such as fire. The inductor L1 is used for filtering the power grid, and can isolate part of interference on the power grid and prevent the power supply module 1 from increasing interference on the power grid. The thirteenth electrolytic capacitor C13 is used for power supply filtering of the input end of the AC/DC conversion circuit to prevent the voltage from generating large fluctuation, and the eighth electrolytic capacitor C8 and the ninth capacitor C9 are used for power supply filtering of the output end of the AC/DC conversion circuit to ensure the stability of the output voltage. The type of the conversion chip U4 is LS01-K3B05SS, the capacity of a thirteenth electrolytic capacitor C13 is 10uF, the borne voltage upper limit value is 450V, the capacity of an eighth electrolytic capacitor C8 is 220uF, the borne voltage upper limit value is 16V, the capacity of a ninth capacitor C9 is 0.1uF, and the borne voltage upper limit value is 50V.

As shown in FIG. 9, the linear voltage regulating circuit includes a linear voltage regulating chip U5, an eleventh capacitor C11, a tenth electrolytic capacitor C10 and a twelfth capacitor C12. The linear voltage stabilizing chip U5 is a linear power supply chip, and can realize the conversion from a 5V power supply to a 3V3 power supply, the capacitor C11 is used for power supply filtering of the input end of the linear voltage stabilizing chip U5, and the tenth electrolytic capacitor C10 and the twelfth capacitor C12 are used for power supply filtering of the output end of the linear power supply chip, so that the stability of the output 3V3 power supply is ensured. Specifically, one end of the eleventh capacitor C11 is connected to a pin 1 of the linear regulator chip U5, the other end of the eleventh capacitor C11 is connected to a pin 3 of the linear regulator chip U5, the other end of the eleventh capacitor C11 inputs a 5V operating voltage, a pin 1 of the linear regulator chip U5 is grounded GND, a pin 2 of the linear regulator chip U5 is connected to an anode of the tenth electrolytic capacitor C10, a cathode of the tenth electrolytic capacitor C10 is connected to a pin 1 of the linear regulator chip U5, one end of the twelfth capacitor C12 is connected to a pin 2 of the linear regulator chip U5, one end of the twelfth capacitor C12 outputs a 3V3 operating voltage, and the other end of the twelfth capacitor C12 is connected to a cathode of the tenth electrolytic capacitor C10 and a pin 1 of the linear regulator chip U5. The model of the linear voltage-stabilizing chip U5 is SPX1117m3-3.3, the capacity of the eleventh capacitor C11 is 10uF, the borne voltage upper limit value is 16V, the capacity of the tenth electrolytic capacitor C10 is 100uF, the borne voltage upper limit value is 16V, the capacity of the twelfth capacitor C12 is 0.1uF, and the borne voltage upper limit value is 50V.

The main control module 2 is respectively connected with the wireless receiving module 3 and the wireless transmitting module 4, and the main control module 2 is respectively connected with the wireless receiving module 3 and the wireless transmitting module 4 through the SPI interface and is used for processing and transferring data. Specifically, as shown in fig. 2 to 5, the main control module 2 includes a main control chip U1, a download interface circuit, a reset circuit, and a filter circuit. Specifically, the main control chip U1 includes a first capacitor C1 and a first resistor R1, the pin 1 of the main control chip U1 is grounded GND through the first capacitor C1, the pin 7 and the pin 20 of the main control chip U1 are respectively connected to a 3V3 working voltage, the pin 19 is grounded GND, and the pin 28 is grounded GND through the first resistor R1; the download interface circuit comprises a wiring terminal P1, a pin 1 of the wiring terminal P1 is connected with 3V3 working voltage, a pin 2 of the wiring terminal P1 is connected with a pin 26 of a main control chip U1, a pin 3 of the wiring terminal P1 is connected with a pin 27 of a main control chip U1, and a pin 4 of the wiring terminal P1 is grounded GND; the reset circuit comprises a second resistor R2 and a fifth capacitor C5, a pin 6 of the main control chip U1 is connected with a 3V3 working voltage through the second resistor R2, and the pin 6 of the main control chip U1 is grounded GND through the fifth capacitor C5; the filter circuit comprises a second capacitor C2, a third capacitor C3 and a fourth capacitor C4, wherein after the second capacitor C2, the third capacitor C3 and the fourth capacitor C4 are connected in parallel, one end of the filter circuit is connected with a 3V3 working voltage, and the other end of the filter circuit is grounded GND. The type of the main control chip U1 is HC32F030E8PA, the capacity of the second capacitor C2 is 4.7uF, the upper limit of the voltage to be borne is 16V, the capacity of the third capacitor C3 is 0.1uF, the upper limit of the voltage to be borne is 50V, the capacity of the fourth capacitor C4 is 0.17uF, and the upper limit of the voltage to be borne is 50V. The main control chip U1 communicates with the second chip U2 and the third chip U3 through 2 SPI interfaces, respectively, from the main control chip U1 chip end, MOSI is an input signal, and the other three pins are output signals, and through this SPI interface, the main control chip U1 can configure the operating modes of the second chip U2 and the third chip U3, and can read and write data to be transmitted.

As shown in fig. 6, the wireless receiving module 3 is used for receiving data, and a 2.4G module is adopted. The model of the second chip U2 is DL-24D, and specifically, the wireless receiving module 3 includes a second chip U2, pin 1 of the second chip U2 is connected to a 3V3 operating voltage, pin 6 and pin 8 of the second chip U2 are respectively connected to ground GND, pin 2, pin 3, pin 4 and pin 5 of the second chip U2 are respectively connected to pin 21, pin 22, pin 23 and pin 24 of the main control chip U1, pin 7 of the second chip U2 is connected to an a port of the first antenna, and a G port of the first antenna is connected to ground GND. The main control module 2 can configure the working mode of the wireless receiving module 3 through the SPI interface, the main control module 2 performs initialization configuration on the wireless receiving module 3 after being electrified, the wireless receiving module 3 is configured to work in a receiving mode, when data are received, a corresponding receiving data register of the wireless receiving module 3 can be set, and then the main control module 1 reads the received data through the SPI interface so as to complete data receiving work.

As shown in fig. 7, the wireless transmission module 4 is used for forwarding data, and a 2.4G module is adopted. The model of the third chip U3 is DL-14PA, and specifically, the wireless transmission module 4 includes a third chip U3, a pin 1 of the third chip U3 is connected to a 3V3 operating voltage, a pin 6 and a pin 7 of the third chip U3 are grounded to GND, a pin 9 and a pin 10 of the third chip U3 are connected to a pin 7 of the third chip U3, a pin 2, a pin 3, a pin 4, and a pin 5 of the third chip U3 are connected to a pin 15, a pin 13, a pin 14, and a pin 12 of the main control chip U1, a pin 8 of the third chip U3 is connected to an a port of the second antenna, and a pin 7 of the third chip U3 is connected to a G port of the second antenna. The main control module 2 can configure the working mode of the wireless transmission module 4 through the SPI interface, after the power-on, the main control module 2 performs initialization configuration on the wireless transmission module 4 and configures the wireless transmission module 4 to work in a transmission mode, when data needs to be transmitted, the main control module 2 writes the data needing to be transmitted into the wireless transmission module 4 through the SPI interface, and the wireless transmission module 4 automatically completes data transmission work.

With reference to fig. 1 to fig. 9, the wireless full-duplex 2.4G repeater of the present embodiment specifically operates as follows: the main control module 2 configures the wireless receiving module 3 to work in a receiving mode through the SPI interface and always detects whether data are received. Meanwhile, the main control module 2 configures the wireless transmitting module 4 through the SPI interface to work in a transmitting mode, when the main control module 2 finds that the wireless receiving module 3 receives data and ensures that the data is transmitted through the wireless transmitting module 4 after the data is received, the function of forwarding the wireless data is realized. The wireless receiving module 3 and the wireless sending module 4 both adopt 2.4 modules, the wireless receiving module 3 works in the receiving module, and the wireless sending module 4 works in the sending module, so that mode conversion does not exist, the problem of packet loss when the sending state and the receiving state are switched is reduced, and the efficiency of relay forwarding is improved.

Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the utility model, the scope of which is defined in the appended claims and their equivalents.

Claims

1. Wireless full duplex 2_·A 4G repeater, comprising: power module (1) and host system (2), wireless receiving module (3) and wireless sending module (4) of being connected with power module (1) electricity respectively, host system (2) are connected with wireless receiving module (3) and wireless sending module (4) respectively for the processing and the transfer of data, wireless receiving module (3) are used for the receipt of data, wireless sending module (4) are used for retransmitting of data, 2.4G module is all adopted in wireless receiving module (3) and wireless sending module (4).

2. A wireless full duplex 2 according to claim 1_·4G repeater, characterized in that, the master control module (2) includes: the device comprises a main control chip (U1), a download interface circuit, a reset circuit and a filter circuit;

the main control chip (U1) comprises a first capacitor (C1) and a first resistor (R1), a pin 1 of the main control chip (U1) is Grounded (GND) through the first capacitor (C1), a pin 7 and a pin 20 of the main control chip (U1) are respectively connected with a 3V3 working voltage, a pin 19 is Grounded (GND), and a pin 28 is Grounded (GND) through the first resistor (R1);

the download interface circuit comprises a connecting terminal (P1), wherein a pin 1 of the connecting terminal (P1) is connected with 3V3 working voltage, a pin 2 of the connecting terminal (P1) is connected with a pin 26 of a main control chip (U1), a pin 3 of the connecting terminal (P1) is connected with a pin 27 of the main control chip (U1), and a pin 4 of the connecting terminal (P1) is Grounded (GND);

the reset circuit comprises a second resistor (R2) and a fifth capacitor (C5), a pin 6 of the main control chip (U1) is connected to a 3V3 working voltage through the second resistor (R2), and the pin 6 of the main control chip (U1) is Grounded (GND) through the fifth capacitor (C5);

the filter circuit comprises a second capacitor (C2), a third capacitor (C3) and a fourth capacitor (C4), wherein after the second capacitor (C2), the third capacitor (C3) and the fourth capacitor (C4) are connected in parallel, one end of the filter circuit is connected with a 3V3 working voltage, and the other end of the filter circuit is Grounded (GND).

3. A wireless full duplex 2 according to claim 1_·4G repeater, its characterized in that: the wireless receiving module (3) comprises a second chip (U2), a pin 1 of the second chip (U2) is connected with a 3V3 working voltage, a pin 6 and a pin 8 of the second chip (U2) are respectively connected with a Ground (GND), a pin 2, a pin 3, a pin 4 and a pin 5 of the second chip (U2) are respectively connected with a pin 21, a pin 22, a pin 23 and a pin 24 of a main control chip (U1), a pin 7 of the second chip (U2) is connected with an A port of the first antenna, and a G port of the first antenna is connected with the Ground (GND).

4. A wireless full duplex 2 according to claim 1_·4G repeater, its characterized in that: the wireless transmitting module (4) comprises a third chip (U3), a pin 1 of the third chip (U3) is connected with a 3V3 working voltage, a pin 6 and a pin 7 of the third chip (U3) are Grounded (GND), a pin 9 and a pin 10 of the third chip (U3) are respectively connected with a pin 7 of the third chip (U3), a pin 2, a pin 3, a pin 4 and a pin 5 of the third chip (U3) are respectively connected with a pin 15, a pin 13, a pin 14 and a pin 12 of a main control chip (U1), a pin 8 of the third chip (U3) is connected with an A port of a second antenna, and a pin 7 of the third chip (U3) is connected with a G port of the second antenna.

5. A wireless full duplex 2 according to claim 1_·4G repeater, its characterized in that: the power supply module (1) comprises a non-isolated AC/DC conversion circuit and a linear voltage stabilizing circuit, wherein the non-isolated AC/DC conversion circuit is used for converting 220V alternating current into 5V direct current voltage and outputting the voltage to the linear voltage stabilizing circuit, and the linear voltage stabilizing circuit is used for converting the 5V voltage output by the non-isolated conversion circuit into 3V3 working voltage.

6. A wireless full duplex 2 according to claim 5_·4G repeater, its characterized in that: the above-mentionedThe non-isolated AC/DC conversion circuit comprises a conversion chip (U4), a fuse (F1), an inductor (L1), a thirteenth electrolytic capacitor (C13), an eighth electrolytic capacitor (C8) and a ninth capacitor (C9), wherein a pin 1 of the conversion chip (U4) is connected with a 220V live wire terminal (AC _ L) through the fuse (F1), a pin 2 of the conversion chip (U4) is connected with a positive electrode of the thirteenth electrolytic capacitor (C13), a negative electrode of the thirteenth electrolytic capacitor (C13) is connected with a 220V neutral wire terminal (AC _ N) through the inductor (L1), a negative electrode of the thirteenth electrolytic capacitor (C13) is connected with a pin 3 of the conversion chip (U4), a positive electrode of the eighth electrolytic capacitor (C8) is connected with a pin 4 of the conversion chip (U4), a negative electrode of the eighth electrolytic capacitor (C8) is connected with a pin 3 of the conversion chip (U4), and a pin 4 of the ninth capacitor (C4) is connected with a pin 3 of the conversion chip (U9), one end of the ninth capacitor (C9) outputs 5V working voltage, the other end of the ninth capacitor (C9) is connected with the negative electrode of the eighth electrolytic capacitor (C8), and the other end of the ninth capacitor (C9) is Grounded (GND).

7. A wireless full duplex 2 according to claim 5_·4G repeater, its characterized in that: the linear voltage stabilizing circuit comprises a linear voltage stabilizing chip (U5), an eleventh capacitor (C11), a tenth electrolytic capacitor (C10) and a twelfth capacitor (C12), wherein one end of the eleventh capacitor (C11) is connected with a pin 1 of the linear voltage stabilizing chip (U5), the other end of the eleventh capacitor (C11) is connected with a pin 3 of the linear voltage stabilizing chip (U5), the other end of the eleventh capacitor (C11) is inputted with a 5V working voltage, a pin 1 of the linear voltage stabilizing chip (U5) is Grounded (GND), a pin 2 of the linear voltage stabilizing chip (U5) is connected with a positive electrode of a tenth electrolytic capacitor (C10), a negative electrode of the tenth electrolytic capacitor (C10) is connected with a pin 1 of the linear voltage stabilizing chip (U5), one end of the twelfth capacitor (C12) is connected with a pin 2 of the linear voltage stabilizing chip (U5), and one end of the twelfth capacitor (C12) outputs a 3V3 working voltage, the other end of the twelfth capacitor (C12) is respectively connected with the negative electrode of the tenth electrolytic capacitor (C10) and the pin 1 of the linear voltage-stabilizing chip (U5).

8. A wireless full duplex 2 according to claim 2_·4G repeater, its characterized in that: the type of the main control chip (U1) is HC32F030E8PA, the capacity of the second capacitor (C2) is 4.7uF, the borne voltage upper limit value is 16V, the capacity of the third capacitor (C3) is 0.1uF, the borne voltage upper limit value is 50V, the capacity of the fourth capacitor (C4) is 0.17uF, and the borne voltage upper limit value is 50V.

9. A wireless full duplex 2 according to claim 6_·4G repeater, its characterized in that: the type of the conversion chip (U4) is LS01-K3B05SS, the capacity of the thirteenth electrolytic capacitor (C13) is 10uF, the borne voltage upper limit value is 450V, the capacity of the eighth electrolytic capacitor (C8) is 220uF, the borne voltage upper limit value is 16V, the capacity of the ninth capacitor (C9) is 0.1uF, and the borne voltage upper limit value is 50V.

10. A wireless full-duplex 2.4G repeater according to claim 7, wherein: the model of the linear voltage-stabilizing chip (U5) is SPX1117m3-3.3, the capacity of the eleventh capacitor (C11) is 10uF, the borne voltage upper limit value is 16V, the capacity of the tenth electrolytic capacitor (C10) is 100uF, the borne voltage upper limit value is 16V, the capacity of the twelfth capacitor (C12) is 0.1uF, and the borne voltage upper limit value is 50V.