CN215734223U - Low-phase-noise narrow-band frequency synthesizer - Google Patents
Low-phase-noise narrow-band frequency synthesizer Download PDFInfo
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- CN215734223U CN215734223U CN202121974270.4U CN202121974270U CN215734223U CN 215734223 U CN215734223 U CN 215734223U CN 202121974270 U CN202121974270 U CN 202121974270U CN 215734223 U CN215734223 U CN 215734223U
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Abstract
The utility model provides a low-phase-noise narrowband frequency synthesizer, which comprises an input power divider circuit, a first mixer, a second mixer, a third mixer, a first power divider, a second power divider, an output filter circuit, a baseband signal generating circuit, an interpolation phase-locked loop circuit, a first filtering amplifying circuit, a DDS signal generating circuit, a feedback circuit, a dot frequency signal generating circuit, a second filtering amplifying circuit and the like; corresponding output signals can be generated according to input signals through a baseband signal generating circuit, a DDS signal generating circuit, a dot frequency signal generating circuit, an interpolation phase-locked loop circuit, a first mixer, a second mixer, a third mixer and the like; the signal generated by the baseband signal generating circuit is mixed with the signal generated by the dot frequency signal generating circuit after being mixed twice, and finally, the signal is filtered by the output filter circuit to obtain a narrow-band frequency output signal with low phase noise, low stray and rapid frequency modulation.
Description
Technical Field
The utility model relates to the technical field of radio frequency equipment, in particular to a low-phase-noise narrow-band frequency synthesizer.
Background
With the development of electronic technology, electronic components and systems are getting better and more complex. In high speed sampling systems, a very good phase noise sampling clock is required, and it is desirable that the clock be capable of rapid frequency changes to meet the high system requirements for sampling spurs. In 5G, 6G and wifi's production test system, need the local oscillator that the near-end far-end phase all is fine to signal frequency conversion to the lower frequency of the high rate of adjustment of high frequency, supply the sampling to carry out signal quality analysis. When the decimal frequency division phase-locked circuit is applied, although small step frequency hopping can be realized, the requirement of good phase noise is met. But near-end spurs can be caused by the fractional division self-phase locking principle. And the far-end phase noise of the voltage-controlled oscillator is not very good, and the requirement on the near-end and far-end phase noise cannot be met. Therefore, it is desirable to provide a solution to reduce signal phase noise.
SUMMERY OF THE UTILITY MODEL
The utility model aims to provide a low-phase-noise narrow-band frequency synthesizer, which is used for realizing the technical effect of reducing the signal phase noise.
The utility model provides a low-phase-noise narrow-band frequency synthesizer, which comprises an input power divider circuit, a first mixer, a second mixer, a third mixer, a first power divider, a second power divider and an output filter circuit, wherein the input power divider circuit is connected with the first mixer; a baseband signal generating circuit disposed between the first output terminal of the input power dividing circuit and the first input terminal of the first mixer; an interpolation phase-locked loop circuit arranged between the output end of the first mixer and the input end of the first power divider; the first filtering and amplifying circuit is arranged between the first output end of the first power divider and the first input end of the second mixer; the DDS signal generating circuit is arranged between the first output end of the second power divider and the second input end of the second mixer; a feedback circuit disposed between the second output terminal of the second power divider and the second input terminal of the first mixer; the dot frequency signal generating circuit is arranged between the second output end of the input power dividing circuit and the first input end of the third mixer; the second filtering and amplifying circuit is arranged between the output end of the second mixer and the second input end of the third mixer; the input end of the second power divider is connected with the second output end of the first power divider; and the output filter circuit is connected with the output end of the third mixer.
Further, the baseband signal generating circuit comprises a first amplifier connected to the first output terminal of the input power dividing circuit; a comb line generator connected to the first amplifier; the first band-pass filter is connected with the output end of the comb line generator; the second band-pass filter is connected with the output end of the first band-pass filter; the output end of the second band-pass filter is connected with the first input end of the first mixer.
Further, the interpolation phase-locked loop circuit includes a second amplifier; a third band-pass filter connected to an output of the second amplifier; the phase discriminator is connected with the output end of the third band-pass filter and the input end of the input power dividing circuit; the voltage-controlled oscillator is connected with the output end of the phase discriminator; and the output end of the voltage-controlled oscillator is connected with the input end of the first power divider.
Further, the first filtering and amplifying circuit includes: the first attenuator is connected with the first output end of the first power divider; a third amplifier connected to the output of the first attenuator; the output end of the third amplifier is connected with a first low-pass filter; the output end of the first low-pass filter is connected with the first input end of the second mixer.
Further, the DDS signal generating circuit includes a second attenuator connected to the first output terminal of the second power divider; a fourth band-pass filter connected to an output of the second attenuator; the DDS signal generator is connected with the output end of the fourth band-pass filter; the fifth band-pass filter is connected with the output end of the DDS signal generator; a third attenuator connected to an output of the fifth bandpass filter; the output end of the third attenuator is connected with the second input end of the second mixer.
Further, the feedback circuit includes a fourth attenuator connected to the second output terminal of the second power divider; a fourth amplifier connected to an output of the fourth attenuator; the output end of the fourth amplifier is connected with the second input end of the first mixer.
Further, the dot frequency signal generating circuit includes a fifth amplifier connected to the second output terminal of the input power dividing circuit; a sixth band-pass filter connected to an output of the fifth amplifier; a fifth attenuator connected to an output of the sixth band-pass filter; the medium phase-locked oscillator is connected with the output end of the fifth attenuator; the sixth attenuator is connected with the output end of the medium phase-locked oscillator; a sixth amplifier connected to an output of the sixth attenuator; and the output end of the sixth amplifier is connected with the first input end of the third mixer.
Further, the second filtering and amplifying circuit comprises a seventh band-pass filter connected with the output end of the second mixer; a seventh amplifier connected to an output of the seventh bandpass filter; an eighth band-pass filter connected to an output of the seventh amplifier; and the output end of the eighth band-pass filter is connected with the second input end of the third mixer.
Further, the output filter circuit comprises a ninth band-pass filter connected to the output of the third mixer; an eighth amplifier connected to an output of the ninth band-pass filter; a second low pass filter connected to an output of the eighth amplifier.
Further, the input power dividing circuit comprises a seventh attenuator; a third power divider connected to an output terminal of the seventh attenuator; the input end of the seventh attenuator receives an input signal; a first output end of the third second power divider is connected with an input end of the baseband signal generating circuit; and a second output end of the third second power divider is connected with an input end of the dot frequency signal generating circuit.
The beneficial effects that the utility model can realize are as follows: the utility model generates corresponding output signals according to input signals through a baseband signal generating circuit, a DDS signal generating circuit, a dot frequency signal generating circuit, an interpolation phase-locked loop circuit, a first frequency mixer, a second frequency mixer, a third frequency mixer and the like, the signals generated by the baseband signal generating circuit are subjected to frequency mixing twice and then are subjected to frequency mixing with the signals generated by the dot frequency signal generating circuit, and finally, a narrow-band frequency output signal with low phase noise, low stray and rapid frequency modulation can be obtained after filtering processing is carried out through an output filter circuit.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments of the present invention will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
Fig. 1 is a schematic diagram of a topology of a low phase noise narrowband frequency synthesizer according to an embodiment of the present invention;
fig. 2 is a schematic diagram of an implementation of a low-phase-noise narrowband frequency synthesizer according to an embodiment of the present invention.
Icon: 100-low phase noise narrowband frequency synthesizer; 101-input power dividing circuit; 102-a first mixer; 103-a second mixer; 104-a third mixer; 105-a first power divider; 106-a second power divider; 107-output filter circuit; 108-baseband signal generating circuitry; 109-an interpolating phase locked loop circuit; 110-a first filtering and amplifying circuit; 111-DDS signal generating circuit; 112-a feedback circuit; 113-dot frequency signal generating circuit; 114-second filtering and amplifying circuit.
Detailed Description
The technical solutions in the embodiments of the present invention will be described below with reference to the drawings in the embodiments of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present invention, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
Referring to fig. 1, fig. 1 is a schematic diagram illustrating a topology of a low phase noise narrowband frequency synthesizer according to an embodiment of the present invention.
In one implementation, an embodiment of the present invention provides a low-phase-noise narrowband frequency synthesizer 100, where the low-phase-noise narrowband frequency synthesizer 100 includes an input power divider circuit 101, a first mixer 102, a second mixer 103, a third mixer 104, a first power divider 105, a second power divider 106, and an output filter circuit 107; a baseband signal generating circuit 108 provided between the first output terminal of the input power dividing circuit 101 and the first input terminal of the first mixer 102; an interpolation phase-locked loop circuit 109 provided between the output of the first mixer 102 and the input of the first power divider 105; a first filtering and amplifying circuit 110 disposed between the first output terminal of the first power divider 105 and the first input terminal of the second mixer 103; a DDS signal generating circuit 111 disposed between the first output terminal of the second power divider 106 and the second input terminal of the second mixer 103; a feedback circuit 112 disposed between the second output terminal of the second power divider 106 and the second input terminal of the first mixer 102; a dot frequency signal generating circuit 113 provided between the second output terminal of the input power dividing circuit 101 and the first input terminal of the third mixer 104; a second filter amplifier circuit 114 provided between the output terminal of the second mixer 103 and the second input terminal of the third mixer 104; the input end of the second power divider 106 is connected to the second output end of the first power divider 105; the output filter circuit 107 is connected to the output of the third mixer 104.
In the implementation process, the signal generated by the baseband signal generating circuit 108 is mixed twice by the first mixer 102 and the second mixer 103, then mixed with the signal generated by the dot frequency signal generating circuit 113 by the third mixer 104, and finally filtered by the output filter circuit 107 and then output, so that a narrow-band low-phase-noise, low-spurious and fast frequency-modulated frequency output signal can be obtained.
In one embodiment, the baseband signal generating circuit 108 includes a first amplifier U1 connected to a first output terminal of the input power dividing circuit 101; a comb line generator a1 connected to the first amplifier U1; a first band pass filter BPF1 connected to the output of the comb line generator a 1; a second band pass filter BPF2 connected to an output terminal of the first band pass filter BPF 1; the output of the second band pass filter BPF2 is connected to a first input of the first mixer 102.
In the implementation process, one path of output signals input into the power dividing circuit 101 is used as a reference signal of the comb line generator a1, and then a signal output by the comb line generator a1 is processed by the first band-pass filter BPF1 and the second band-pass filter BPF2 to obtain a dot frequency signal.
In one embodiment, the interpolation phase-locked loop circuit 109 includes a second amplifier U2; a third band-pass filter BPF3 connected to an output terminal of the second amplifier U2; the phase detector PD is connected with the output end of the third band-pass filter BPF3 and the input end of the input power dividing circuit 101; the voltage-controlled oscillator LO is connected with the output end of the phase discriminator PD; the output of the voltage controlled oscillator LO is connected to the input of the first power divider 105.
In the implementation process, after the output signal of the first mixer 102 is processed by the second amplifier and the third band-pass filter BPF3, the phase detector PD performs phase detection processing according to the signal input at the input end of the input power dividing circuit 101 and the signal output by the third band-pass filter BPF3, and sends the processed signal to the voltage-controlled oscillator LO, so as to obtain a phase-locked dot frequency signal.
In one embodiment, the first filter amplifier circuit 110 includes: a first attenuator Z1 connected to the first output terminal of the first power divider 105; a third amplifier connected to the output of the first attenuator Z1; the output end of the third amplifier U3 is connected with a first low-pass filter LPF 1; the output of the first low pass filter LPF1 is connected to a first input of the second mixer 103.
In the above implementation process, the first filtering and amplifying circuit 110 may perform attenuation-amplification-filtering processing on one output signal of the first power divider 105, and then serve as one input signal of the second mixer 103.
In one embodiment, the DDS signal generating circuit 111 includes a second attenuator Z2 connected to the first output terminal of the second power divider 106; a fourth band-pass filter BPF4 connected to the output of the second attenuator Z2; a DDS signal generator (DDS) connected to an output of the fourth bandpass filter BPF 4; a fifth bandpass filter BPF5 connected to an output of the DDS signal generator (DDS); a third attenuator Z3 connected to the output of the fifth band-pass filter BPF 5; the output of the third attenuator Z3 is connected to a second input of the second mixer 103.
Through the implementation mode, a circuit where the DDS signal generator is located can obtain a baseband signal with small frequency step and low spurious.
In one embodiment, the feedback circuit 112 includes a fourth attenuator Z4 connected to the second output terminal of the second power divider 106; a fourth amplifier U4 connected to the output of the fourth attenuator Z4; the output of the fourth amplifier U4 is connected to a second input of the first mixer 102.
Through the implementation manner, the first mixer 102 can perform mixing processing according to the signal fed back by the feedback loop 112 and the signal output by the baseband signal generating circuit 108, and can better perform signal with lower discreteness.
In one embodiment, the dot frequency signal generating circuit 113 includes a fifth amplifier U5 connected to the second output terminal of the input power dividing circuit 101; a sixth band-pass filter BPF6 connected to an output terminal of the fifth amplifier U5; a fifth attenuator Z5 connected to the output of the sixth band-pass filter BPF 6; a medium phase-locked oscillator PDRO connected with the output end of the fifth attenuator Z5; a sixth attenuator Z6 connected to the output terminal of the medium phase-locked oscillator PDRO; a sixth amplifier U6 connected to an output terminal of the sixth attenuator Z6; the output of the sixth amplifier U6 is connected to a first input of the third mixer 104.
With the above-described embodiment, the dot frequency signal generating circuit 113 can output a signal of a higher frequency for mixing with the signal output from the second mixer 103.
In one embodiment, the second filtering and amplifying circuit 114 includes a seventh band-pass filter BPF7 connected to the output terminal of the second mixer 103; a seventh amplifier U7 connected to an output terminal of the seventh band pass filter BPF 7; an eighth band-pass filter BPF8 connected to an output terminal of the seventh amplifier U7; the output of the eighth band-pass filter BPF8 is connected to a second input of the third mixer 104.
With the above-described embodiment, the signal output from the second mixer 103 may be subjected to filtering processing so as to obtain a signal of a specific frequency.
In one embodiment, the output filter circuit 107 includes a ninth band pass filter BPF9 connected to the output of the third mixer 104; an eighth amplifier U8 connected to an output terminal of the ninth band pass filter BPF 9; a second low pass filter LPF2 connected to the output of the eighth amplifier U8.
The output signal can be further filtered by the output filter circuit 107, so as to obtain a cleaner output signal.
In one embodiment, the input power dividing circuit 101 includes a seventh attenuator Z7; a third second power divider G1 connected to an output terminal of the seventh attenuator Z7; the input terminal of the seventh attenuator Z7 receives an input signal; a first output end of the third power divider G1 is connected to an input end of the baseband signal generating circuit 108; a second output terminal of the third second power divider G1 is connected to an input terminal of the dot frequency signal generating circuit 113. The magnitude of the signal in the circuit can be adjusted by the seventh attenuator Z7.
In summary, an embodiment of the present invention provides a low-phase-noise narrowband frequency synthesizer, which includes an input power divider circuit, a first mixer, a second mixer, a third mixer, a first power divider, a second power divider, and an output filter circuit; the baseband signal generating circuit is arranged between the first output end of the input power dividing circuit and the first input end of the first mixer; the interpolation phase-locked loop circuit is arranged between the output end of the first mixer and the input end of the first power divider; the first filtering and amplifying circuit is arranged between the first output end of the first power divider and the first input end of the second mixer; the DDS signal generating circuit is arranged between the first output end of the second power divider and the second input end of the second frequency mixer; the feedback circuit is arranged between the second output end of the second power divider and the second input end of the first mixer; the dot frequency signal generating circuit is arranged between the second output end of the input power dividing circuit and the first input end of the third mixer; the second filtering and amplifying circuit is arranged between the output end of the second mixer and the second input end of the third mixer; the input end of the second power divider is connected with the second output end of the first power divider; the output filter circuit is connected with the output end of the third mixer, so that the phase noise in the signal is reduced, and a narrow-band frequency output signal with low phase noise, low stray and quick frequency modulation can be obtained.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A low-phase noise narrow-band frequency synthesizer is characterized by comprising an input power divider circuit, a first mixer, a second mixer, a third mixer, a first power divider, a second power divider and an output filter circuit; a baseband signal generating circuit disposed between the first output terminal of the input power dividing circuit and the first input terminal of the first mixer; an interpolation phase-locked loop circuit arranged between the output end of the first mixer and the input end of the first power divider; the first filtering and amplifying circuit is arranged between the first output end of the first power divider and the first input end of the second mixer; the DDS signal generating circuit is arranged between the first output end of the second power divider and the second input end of the second mixer; a feedback circuit disposed between the second output terminal of the second power divider and the second input terminal of the first mixer; the dot frequency signal generating circuit is arranged between the second output end of the input power dividing circuit and the first input end of the third mixer; the second filtering and amplifying circuit is arranged between the output end of the second mixer and the second input end of the third mixer; the input end of the second power divider is connected with the second output end of the first power divider; and the output filter circuit is connected with the output end of the third mixer.
2. A low phase noise narrowband frequency synthesizer according to claim 1, wherein the baseband signal generating circuit comprises a first amplifier connected to the first output of the input power dividing circuit; a comb line generator connected to the first amplifier; the first band-pass filter is connected with the output end of the comb line generator; the second band-pass filter is connected with the output end of the first band-pass filter; the output end of the second band-pass filter is connected with the first input end of the first mixer.
3. A low phase noise narrowband frequency synthesizer according to claim 1, wherein the interpolation phase locked loop circuit comprises a second amplifier; a third band-pass filter connected to an output of the second amplifier; the phase discriminator is connected with the output end of the third band-pass filter and the input end of the input power dividing circuit; the voltage-controlled oscillator is connected with the output end of the phase discriminator; and the output end of the voltage-controlled oscillator is connected with the input end of the first power divider.
4. A low phase noise narrowband frequency synthesizer according to claim 1, wherein the first filtering and amplifying circuit comprises: the first attenuator is connected with the first output end of the first power divider; a third amplifier connected to the output of the first attenuator; the output end of the third amplifier is connected with a first low-pass filter; the output end of the first low-pass filter is connected with the first input end of the second mixer.
5. A low phase noise narrowband frequency synthesizer according to claim 1, wherein the DDS signal generating circuit comprises a second attenuator connected to the first output of the second power divider; a fourth band-pass filter connected to an output of the second attenuator; the DDS signal generator is connected with the output end of the fourth band-pass filter; the fifth band-pass filter is connected with the output end of the DDS signal generator; a third attenuator connected to an output of the fifth bandpass filter; the output end of the third attenuator is connected with the second input end of the second mixer.
6. A low phase noise narrowband frequency synthesizer according to claim 1, wherein the feedback circuit comprises a fourth attenuator connected to the second output of the second power divider; a fourth amplifier connected to an output of the fourth attenuator; the output end of the fourth amplifier is connected with the second input end of the first mixer.
7. A low phase noise narrowband frequency synthesizer according to claim 1, wherein the dot frequency signal generating circuit comprises a fifth amplifier connected to the second output terminal of the input power dividing circuit; a sixth band-pass filter connected to an output of the fifth amplifier; a fifth attenuator connected to an output of the sixth band-pass filter; the medium phase-locked oscillator is connected with the output end of the fifth attenuator; the sixth attenuator is connected with the output end of the medium phase-locked oscillator; a sixth amplifier connected to an output of the sixth attenuator; and the output end of the sixth amplifier is connected with the first input end of the third mixer.
8. A low phase noise narrowband frequency synthesizer according to claim 1, wherein the second filtering and amplifying circuit comprises a seventh band-pass filter connected to the output of the second mixer; a seventh amplifier connected to an output of the seventh bandpass filter; an eighth band-pass filter connected to an output of the seventh amplifier; and the output end of the eighth band-pass filter is connected with the second input end of the third mixer.
9. A low phase noise narrowband frequency synthesizer according to claim 1, wherein the output filtering circuit comprises a ninth band pass filter connected to the output of the third mixer; an eighth amplifier connected to an output of the ninth band-pass filter; a second low pass filter connected to an output of the eighth amplifier.
10. A low phase noise narrowband frequency synthesizer according to claim 1, wherein the input power splitting circuit comprises a seventh attenuator; a third power divider connected to an output terminal of the seventh attenuator; the input end of the seventh attenuator receives an input signal; a first output end of the third second power divider is connected with an input end of the baseband signal generating circuit; and a second output end of the third second power divider is connected with an input end of the dot frequency signal generating circuit.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113541687A (en) * | 2021-08-20 | 2021-10-22 | 成都西蒙电子技术有限公司 | Low-phase-noise narrow-band frequency synthesizer |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113541687A (en) * | 2021-08-20 | 2021-10-22 | 成都西蒙电子技术有限公司 | Low-phase-noise narrow-band frequency synthesizer |
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