CN215728423U - Controllable power supply voltage sampling circuit - Google Patents
Controllable power supply voltage sampling circuit Download PDFInfo
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- CN215728423U CN215728423U CN202122188076.XU CN202122188076U CN215728423U CN 215728423 U CN215728423 U CN 215728423U CN 202122188076 U CN202122188076 U CN 202122188076U CN 215728423 U CN215728423 U CN 215728423U
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- sampling circuit
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Abstract
The utility model discloses a controllable power supply voltage sampling circuit, which comprises a controller and a power supply voltage, wherein the power supply voltage is connected between a control end and a sampling end of the controller; the sampling circuit also comprises a triode, and the on-off of the triode is controlled by the level of the triode input from the control end, so that the on-off of the sampling circuit is realized. The utility model adopts the triode to control the on and off of the power sampling, realizes the controllable function, and comprises a working mode and a sleep mode when in specific operation, wherein the control end provides a high level to conduct the triode, thereby realizing the sampling, and in the sleep mode, the control end outputs a low level, the triode is cut off, the whole circuit does not operate, and the quiescent current is 0; the power consumption under the static state is greatly reduced; meanwhile, the anti-interference capability is improved due to the controllable function.
Description
Technical Field
The utility model relates to the technical field of power supply sampling, in particular to a controllable power supply voltage sampling circuit.
Background
At present, a power supply voltage sampling circuit on most automobile products is directly acquired after resistor voltage division, and has high static power consumption and weak anti-interference capability.
SUMMERY OF THE UTILITY MODEL
The present invention is directed to a controllable power supply voltage sampling circuit, so as to solve the problems mentioned in the background art.
In order to solve the technical problems, the utility model provides the following technical scheme: the sampling circuit comprises a controller and a power supply voltage, wherein the power supply voltage is connected between a control end and a sampling end of the controller;
the sampling circuit also comprises a triode, and the on-off of the triode is controlled by the level of the triode input from the control end, so that the on-off of the sampling circuit is realized.
Preferably, after the control end of the controller is connected with a capacitor C2, the control end of the controller is connected to the base of a triode Q2 through a resistor R3 and a resistor R4, the emitter of the triode Q2 and a resistor R4 are grounded together, the collector of the triode Q2 is connected to the power supply voltage through a resistor R5 and a resistor R6, and the other way is connected to the base of a triode Q1;
the other path of the supply voltage is connected to the collector of transistor Q1.
Preferably, the emitter of the transistor Q1 is connected to the resistors R7 and R8, and the resistor R8 is connected to the sampling terminal of the controller after being connected to the capacitor C3 in parallel.
Compared with the prior art, the utility model has the beneficial effects that:
the utility model adopts the triode to control the on and off of the power sampling, realizes the controllable function, and comprises a working mode and a sleep mode when in specific operation, wherein the control end provides a high level to conduct the triode, thereby realizing the sampling, and in the sleep mode, the control end outputs a low level, the triode is cut off, the whole circuit does not operate, and the quiescent current is 0; the power consumption under the static state is greatly reduced; meanwhile, the anti-interference capability is improved due to the controllable function.
Drawings
Fig. 1 is a schematic diagram of the circuit of the present invention.
Detailed Description
For convenience of use, the embodiment of the utility model provides a controllable power supply voltage sampling circuit. The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, based on MCU master control as an example, a control terminal of the controllable power supply voltage sampling circuit is connected to a base of a transistor Q2 after being filtered by a capacitor C2 and divided by resistors R3 and R4.
The emitter of the triode Q2 and the resistor R4 are grounded together, and after the collector of the triode Q2 passes through the resistor R5 and the resistor R6, one path is connected to the power supply voltage, and the other path is connected to the base of the triode Q1; the other path of the supply voltage is connected to the collector of transistor Q1.
The emitter of the transistor Q1 is connected to the resistors R7 and R8, and the resistor R8 is connected to the sampling terminal of the controller after being connected in parallel with the capacitor C3.
The working principle is as follows: the circuit has two states: an operational mode and a sleep mode.
1. The working mode is as follows: the MCU outputs high level 5V TO a control end VBAT _ AD _ CTR, at the moment, 5V voltage is filtered through a capacitor C2 and then is divided by resistors R3 and R4 TO enable an NPN triode Q2 TO be conducted, then the resistors R6 and R5 divide voltage of power voltage VBAT TO enable a PNP triode Q1 TO be conducted, then the power voltage VBAT is divided by resistors R7 and R8 after the Q1 is conducted and is filtered through a capacitor C3 TO collect a voltage value for an AD port of the MCU, and the value of the power voltage VBAT can be obtained by reading the voltage value of the sampling end VBAT _ AD _ TO _ MCU;
a sleep mode: the MCU outputs low level 0V to the control end VBAT _ AD _ CTR, the triodes Q2 and Q1 are both cut off, the AD port of the MCU does not read the voltage value, no current is generated in the circuit at the moment, and the quiescent current is 0.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the utility model, the scope of which is defined in the appended claims and their equivalents.
Claims (3)
1. A controllable power supply voltage sampling circuit comprises a controller and a power supply voltage, wherein the power supply voltage is connected between a control end and a sampling end of the controller;
the method is characterized in that: the sampling circuit also comprises a triode, and the on-off of the triode is controlled by the level of the triode input from the control end, so that the on-off of the sampling circuit is realized.
2. A controllable supply voltage sampling circuit according to claim 1, wherein: after the control end of the controller is connected with a capacitor C2, the control end of the controller is connected with the base electrode of a triode Q2 through a resistor R3 and a resistor R4, the emitting electrode of the triode Q2 and a resistor R4 are grounded together, the collector electrode of the triode Q2 is connected with the power supply voltage through a resistor R5 and a resistor R6, and the other path of the collector electrode is connected with the base electrode of a triode Q1;
the other path of the supply voltage is connected to the collector of transistor Q1.
3. A controllable supply voltage sampling circuit according to claim 2, wherein: the emitter of the transistor Q1 is connected to the resistors R7 and R8, and the resistor R8 is connected to the sampling terminal of the controller after being connected in parallel with the capacitor C3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122188076.XU CN215728423U (en) | 2021-09-09 | 2021-09-09 | Controllable power supply voltage sampling circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202122188076.XU CN215728423U (en) | 2021-09-09 | 2021-09-09 | Controllable power supply voltage sampling circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN215728423U true CN215728423U (en) | 2022-02-01 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202122188076.XU Active CN215728423U (en) | 2021-09-09 | 2021-09-09 | Controllable power supply voltage sampling circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN215728423U (en) |
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2021
- 2021-09-09 CN CN202122188076.XU patent/CN215728423U/en active Active
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