CN215601322U - Intelligent fusion terminal testing device - Google Patents
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- CN215601322U CN215601322U CN202121046854.5U CN202121046854U CN215601322U CN 215601322 U CN215601322 U CN 215601322U CN 202121046854 U CN202121046854 U CN 202121046854U CN 215601322 U CN215601322 U CN 215601322U
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- 238000012360 testing method Methods 0.000 title claims abstract description 146
- 230000004927 fusion Effects 0.000 title claims abstract description 48
- 230000011664 signaling Effects 0.000 claims abstract description 27
- 238000004891 communication Methods 0.000 claims description 22
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical group [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 20
- 229910052697 platinum Inorganic materials 0.000 claims description 10
- 238000010586 diagram Methods 0.000 description 8
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- 239000003990 capacitor Substances 0.000 description 3
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- 101100136062 Mycobacterium tuberculosis (strain ATCC 25618 / H37Rv) PE10 gene Proteins 0.000 description 1
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Abstract
The utility model provides an intelligent fusion terminal testing device which comprises a single chip microcomputer and a buckle terminal, wherein the single chip microcomputer comprises a main chip and a testing circuit connected with the main chip, and the main chip and the testing circuit are connected with an interface corresponding to an intelligent fusion terminal to be tested through the buckle terminal; the test circuit includes: the independent RS485 test circuit is used for testing two paths of independent RS485 interfaces of the intelligent fusion terminal to be tested; the adjustable RS485/RS232 test circuit is used for testing two paths of RS485/RS232 adjustable interfaces of the intelligent fusion terminal to be tested; the remote signaling test circuit is used for testing the four remote signaling interfaces of the intelligent fusion terminal to be tested; and the PT100 test circuit is used for testing two paths of PT100 interfaces of the intelligent fusion terminal to be tested. The intelligent fusion terminal testing device does not need manual intervention, and improves the testing speed and the testing accuracy; and the volume is small, the plug and play is realized, and the portability is strong.
Description
Technical Field
The utility model relates to the technical field of intelligent convergence terminal testing, in particular to an intelligent convergence terminal testing device.
Background
The intelligent fusion terminal is a novel electric power instrument of a state net, integrates functions such as power supply and power information acquisition, each acquisition terminal or electric energy meter data collection, equipment state monitoring and communication networking, local analysis decision-making, cooperative computing and the like of a distribution station area, adopts hardware platform, functional software, structural modularization and software and hardware decoupling design, and meets requirements of high-performance concurrency, large-capacity storage and multiple acquisition objects.
Intelligent integration terminal service terminal uses quick-connect formula buckle terminal, and the terminal includes: the system comprises four remote signaling interfaces, four RS485 interfaces, two RS232 interfaces and two PT100 interfaces, wherein the two RS232 interfaces and the two RS485 interfaces share one physical interface, and the specific interface function is switched by a physical key in the fusion terminal. At present, an intelligent fusion terminal has no corresponding test fixture temporarily. The production test of the intelligent fusion terminal is that the function verification is carried out one by one through manually switching the interfaces, the intelligent fusion terminal product is electrified through a power supply tool, a computer is connected with an Ethernet port of the intelligent fusion terminal, a service terminal on the intelligent fusion terminal is led out by using a short wire and then is connected with an electric energy meter, a resistor and the like for testing, different interfaces are required to be manually switched when different functions are tested, all test results are required to be manually judged, misjudgment is easily caused, and the efficiency is extremely low.
In view of this, there is a need in the art for an intelligent convergence terminal testing apparatus to solve the above problems and improve the testing efficiency of the intelligent convergence terminal.
SUMMERY OF THE UTILITY MODEL
Based on the above, the utility model provides the intelligent fusion terminal testing device, so that the testing efficiency of the intelligent fusion terminal is improved.
In order to achieve the purpose, the utility model provides an intelligent fusion terminal testing device which comprises a single chip microcomputer and a buckle terminal, wherein the single chip microcomputer comprises a main chip and a testing circuit connected with the main chip, and the main chip and the testing circuit are connected with an interface corresponding to an intelligent fusion terminal to be tested through the buckle terminal; the test circuit includes:
the independent RS485 test circuit is used for testing two paths of independent RS485 interfaces of the intelligent fusion terminal to be tested;
the adjustable RS485/RS232 test circuit is used for testing two paths of RS485/RS232 adjustable interfaces of the intelligent fusion terminal to be tested;
the remote signaling test circuit is used for testing the four remote signaling interfaces of the intelligent fusion terminal to be tested; and
and the PT100 test circuit is used for testing two paths of PT100 interfaces of the intelligent fusion terminal to be tested.
Preferably, the two paths of independent RS485 interfaces are RS485I interfaces and RS485 II interfaces, and the independent RS485 test circuit comprises: the connecting circuit is used for connecting the RS485I interface and the RS485 II interface; the A end of the RS485I interface is connected with the A end of the RS485 II interface through the connecting circuit, and the B end of the RS485I interface is connected with the B end of the RS485 II interface through the connecting circuit.
Preferably, the RS485/RS232 adjustable interface is an RS485 III interface and an RS485IV interface, wherein the RS485 III and RS 232I are adjustable, and the RS485IV and RS232 II are adjustable; the adjustable RS485/RS232 test circuit comprises: the relay, the first diode, the first triode, the first resistor and the second resistor are used for switching the connection mode of the RS485 III interface and the RS485IV interface; the relay is respectively connected with the RS485 III interface and the RS485IV interface; the first termination VCC5V power of relay, the second end of relay with the collecting electrode of first triode is connected, the base of first triode with the first end of first resistance is connected, the base of first triode still with the first end of second resistance is connected, the projecting pole of first triode with the second end of second resistance meets ground connection back, the second end of first resistance with the main chip is connected, the positive pole of first diode with the second end of relay is connected, the negative pole of first diode with the first end of relay is connected.
Preferably, when the attribute of the RS485/RS232 adjustable interface is an RS485 mode, the end a of the RS485 iii interface is connected with the end a of the RS485iv interface, and the end B of the RS485 iii interface is connected with the end B of the RS485iv interface.
Preferably, when the attribute of the RS485/RS232 adjustable interface is an RS232 mode, the end a of the RS485 iii interface is connected with the end B of the RS485iv interface, and the end B of the RS485 iii interface is connected with the end a of the RS485iv interface.
Preferably, the intelligent integrated terminal testing device further comprises a communication chip for switching the intelligent integrated terminal testing device to a remote signaling testing mode, and the communication chip is connected with the main chip and the RS485I interface respectively.
Preferably, the remote signaling test circuit comprises: the third resistor, the fourth resistor, the fifth resistor, the second triode and the light-emitting diode; the first end of the third resistor is connected with a first 3V3 power supply, the second end of the third resistor is connected with the first end of the fourth resistor in parallel and then connected with the main chip, the second end of the fourth resistor is connected with the base electrode of the second triode, the emitter electrode of the second triode is grounded, the collector electrode of the second triode is connected with the first ends of the four paths of remote signaling interfaces in parallel, the second end of the fourth path of remote signaling interfaces is also connected with the negative electrode of the light emitting diode, and the positive electrode of the light emitting diode is connected with the fifth resistor in series and then connected with a second 3V3 power supply.
Preferably, the PT100 test circuit includes: and the two high-precision resistors are respectively connected with the two paths of PT100 interfaces.
Preferably, the high-precision resistor is a platinum thermal resistor, and the resistance value of the platinum thermal resistor is 200 Ω.
Preferably, the intelligent convergence terminal testing device further comprises a power input interface.
The utility model has the beneficial effects that: the intelligent fusion terminal testing device is provided, manual intervention is not needed, the testing automation of an intelligent fusion terminal interface is completely realized, and the testing speed and the testing accuracy are improved; the intelligent fusion terminal testing device is small in size, plug-and-play and strong in portability.
Drawings
Fig. 1 is a schematic diagram of functional modules of an intelligent convergence terminal testing device according to an embodiment of the present invention;
fig. 2 is a circuit configuration diagram of a main chip of the intelligent convergence terminal testing apparatus according to the embodiment of the present invention;
fig. 3 is a schematic structural diagram of a buckle terminal of the intelligent convergence terminal testing device according to the embodiment of the utility model;
fig. 4 is a circuit diagram of an adjustable RS485/RS232 test circuit of the intelligent convergence terminal test device according to the embodiment of the present invention;
fig. 5 is a circuit diagram of a communication chip of the intelligent convergence terminal testing apparatus according to the embodiment of the present invention;
FIG. 6 is a circuit diagram of a remote signaling test circuit of the intelligent convergence terminal test device according to the embodiment of the utility model;
fig. 7 is a circuit diagram of a power interface of the intelligent convergence terminal test apparatus according to the embodiment of the utility model;
fig. 8 is a circuit diagram of voltage conversion of the intelligent convergence terminal test apparatus according to the embodiment of the utility model.
Detailed Description
To facilitate an understanding of the utility model, the utility model will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
The terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the utility model herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the utility model.
Referring to fig. 1 to 3, an intelligent convergence terminal testing apparatus 100 according to an embodiment of the present invention includes a single chip microcomputer 10 and a buckle terminal J1, the single chip microcomputer 10 includes a main chip U1 and a testing circuit 11 connected to the main chip U1, and the main chip U1 and the testing circuit 11 are connected to an interface corresponding to an intelligent convergence terminal to be tested through the buckle terminal J1. The main chip U1 is the Central Processing Unit (CPU) of the present invention. It should be noted that: the interface of the intelligent fusion terminal to be tested is a quick-connection type buckle terminal corresponding to the buckle terminal J1 and comprises two independent RS485 interfaces, four remote signaling interfaces (YX1-YX4), two PT100 (platinum thermal resistor) interfaces and two RS485/RS232 adjustable interfaces. Wherein the two independent RS485 interfaces are RS485I interface and RS485 II interface. The RS485/RS232 adjustable interface, namely two RS232 interfaces and two RS485 interfaces share one physical interface, namely an RS485 III interface and an RS485IV interface; the specific structure is that RS485 III and RS 232I can be adjusted, and RS485IV and RS232 II can be adjusted.
Referring to fig. 3 again, pins 1 to 4 of the snap terminal J1 are respectively connected to four remote signaling interfaces (YX1-YX 4); a No. 17 pin of the buckle terminal J1 is connected with an A End (EA) of the RS485I interface, and a No. 19 pin is connected with a B End (EB) of the RS485I interface; the No. 21 pin of the buckle terminal J1 is connected with the end A (FA) of the RS485 II interface, and the No. 23 pin is connected with the end B (FB) of the RS485 II interface; a No. 25 pin of the buckle terminal J1 is connected with an A end (GA) of the RS485 III interface, and a No. 27 pin is connected with a B end (GB) of the RS485 III interface; the 18 th pin of the buckle terminal J1 is connected with the A end (HA) of the RS485IV interface, and the 20 th pin is connected with the B end (HB) of the RS485IV interface.
Specifically, the test circuit 11 includes: the device comprises an independent RS485 test circuit for testing two paths of independent RS485 interfaces, an adjustable RS485/RS232 test circuit for testing two paths of RS485/RS232 adjustable interfaces, a remote signaling test circuit for testing four paths of remote signaling interfaces and a PT100 test circuit for testing two paths of PT100 interfaces. The following describes an embodiment of the present invention with reference to a test procedure of the intelligent convergence terminal test apparatus 100 according to the embodiment of the present invention.
Specifically, referring to fig. 3, the independent RS485 test circuit includes a connection circuit, which is a connection wire for connecting the RS485i interface and the RS485 ii interface. The A End (EA) of the RS485I interface is connected with the A end (FA) of the RS485 II interface through a connecting circuit, and the B End (EB) of the RS485I interface is connected with the B end (FB) of the RS485 II interface through a connecting circuit.
Referring to fig. 4, the adjustable RS485/RS232 test circuit includes: the circuit comprises a relay U3, a first diode D1, a first triode Q1, a first resistor R1 and a second resistor R2. Wherein, relay U3 is connected with RS485 III interface and RS485IV interface respectively. The first end of the relay U3 is connected with a VCC5V power supply, the second end of the relay U3 is connected with the collector of a first triode Q1, the base of the first triode Q1 is connected with the first end of a first resistor R1, the base of a first triode Q1 is further connected with the first end of a second resistor R2, the emitter of the first triode Q1 is connected with the second end of a second resistor R2 in parallel and then grounded, the second end of the first resistor R1 is connected with a No. 41 pin (PE10) of a main chip U1, the anode of a first diode D1 is connected with the second end of the relay U3, and the cathode of the first diode D1 is connected with the first end of the relay U3. The relay U3 is used for switching the connection mode of the RS485 III interface and the RS485IV interface, and the relay U3 is controlled to be switched according to the test requirement. When the attribute of the RS485/RS232 adjustable interface is an RS485 mode, the A end (GA) of the RS485 III interface is connected with the A end (HA) of the RS485IV interface, and the B end (GB) of the RS485 III interface is connected with the B end (HB) of the RS485IV interface. When the attribute of the RS485/RS232 adjustable interface is an RS232 mode, the A end (GA) of the RS485 III interface is connected with the B end (HB) of the RS485IV interface, and the B end (GB) of the RS485 III interface is connected with the A end (HA) of the RS485IV interface.
Further, referring to fig. 5, the intelligent integrated terminal testing device 100 further includes a communication chip U2 for switching the intelligent integrated terminal testing device 100 to be tested to a remote signaling testing mode, and the communication chip U2 is connected to the main chip U1 and the RS485i interface respectively. Specifically, the communication chip U2 is provided with 8 pins. The No. 1 pin of the communication chip U2 is connected with the No. 79 pin (PC11) of the main chip U1 through a diode component D2; one end of the diode component D2, which is connected with the No. 1 pin of the communication chip U2, is also connected with the first end of a sixth resistor R6, and the second end of the sixth resistor R6 is connected with a VCC5V power supply; one end of the diode component D2, which is connected with the No. 79 pin (PC11) of the main chip U1, is also connected with the first end of a seventh resistor R7, and the second end of the seventh resistor R7 is connected with a 3V3 power supply; the No. 2 pin and the No. 3 pin of the communication chip U2 are connected in parallel and then connected with the collector of a third triode Q3, the collector of the third triode Q3 is also connected with the first end of a twelfth resistor R12, the second end of the twelfth resistor R12 is connected with a VCC5V power supply, the emitter of the third triode Q3 is connected with the No. 80 pin (PC12) of a main chip U1, the base of the third triode Q3 is connected with the first end of a thirteenth resistor R13, the second end of the thirteenth resistor R13 is connected with the VCC5V power supply, and the two ends of the thirteenth resistor R13 are connected in parallel with a capacitor C14; a pin 4 of the communication chip U2 is connected with a pin 78 (PC10) of the main chip U1 through a fourth triode Q4, a collector of the fourth triode Q4 is further connected with a first end of an eighth resistor R8, a second end of an eighth resistor R8 is connected with a VCC5V power supply, a base of the fourth triode Q4 is connected with a first end of a ninth resistor R9, a second end of the ninth resistor R9 is connected with a 3V3 power supply, and two ends of the ninth resistor R9 are connected in parallel with a capacitor C17; the No. 5 pin of the communication chip U2 is grounded; a No. 6 pin of the communication chip U2 is respectively connected with an A End (EA) of an RS485I interface and a first end of a tenth resistor R10, and a second end of the tenth resistor R10 is connected with a VCC5V power supply; a No. 7 pin of the communication chip U2 is respectively connected with a B End (EB) of an RS485I interface and a first end of an eleventh resistor R11, and a second end of the eleventh resistor R11 is grounded; the No. 8 pin of the communication chip U2 is connected with a VCC5V power supply, and the No. 8 pin of the communication chip U2 is also connected with a capacitor C13 and then grounded. Through the arrangement of the communication chip U2, the intelligent integrated terminal testing device 100 can be switched to a remote signaling testing mode.
Referring to fig. 6, the remote signaling test circuit includes: the LED driving circuit comprises a third resistor R3, a fourth resistor R4, a fifth resistor R5, a second triode Q2 and a light-emitting diode D3; the first end of the third resistor R3 is connected with a 3V3 power supply, the second end of the third resistor R3 is connected with the first end of the fourth resistor R4 in parallel and then connected with a pin 39 (PE8) of the main chip U1, the second end of the fourth resistor R4 is connected with the base electrode of the second triode Q2, the emitter of the second triode Q2 is grounded, the collector of the second triode Q2 is connected with the first ends of the four paths of remote communication interfaces YX1-YX4 in parallel, the second end of the fourth path of remote communication interface (YX4) is further connected with the negative electrode of the light emitting diode D3, and the positive electrode of the light emitting diode D4 is connected with the fifth resistor R5 in series and then connected with the 3V3 power supply.
Referring to fig. 3 again, the PT100 test circuit includes: the two high-precision resistors are respectively connected with the two paths of PT100 interfaces, the high-precision resistors are a first platinum thermal resistor R14 and a second platinum thermal resistor R15, and the resistance values of the first platinum thermal resistor R14 and the second platinum thermal resistor R15 are both 200 omega.
Further, referring to fig. 7, the intelligent convergence terminal testing apparatus 100 further includes a power input interface J2, where the power input interface J2 is a mini USB interface. Referring to fig. 8, the power input interface outputs the power output through the VCC5V to the power chip U5 for processing, so as to provide a power source for the intelligent convergence terminal testing apparatus 100.
The testing process of the intelligent integrated terminal testing device 100 of the utility model is as follows:
s1, the configuration software issues a function test command to the intelligent fusion terminal to be tested through the Ethernet cable, and the intelligent fusion terminal to be tested starts to perform function test.
And S2, carrying out independent RS485 interface test. The A End (EA) of the RS485I interface is connected with the A end (FA) of the RS485 II interface through a connecting circuit, and the B End (EB) of the RS485I interface is connected with the B end (FB) of the RS485 II interface through a connecting circuit; and the intelligent fusion terminal to be tested performs a test of mutually sending test data frames through the RS485I interface and the RS485 II interface, if the data frames are compared to pass, the test is judged to be qualified, and if not, the test is judged to be failed.
And S3, carrying out adjustable RS485/RS232 interface test. The method comprises the steps of sending an instruction to an intelligent fusion terminal testing device 100, adjusting the intelligent fusion terminal testing device to be in an RS485 mode by an adjustable RS485/RS232 testing circuit, connecting an A end (GA) of an RS485 III interface with an A end (HA) of an RS485IV interface, connecting a B end (GB) of the RS485 III interface with a B end (HB) of the RS485IV interface, sending a test data frame mutually through the RS485 III interface and the RS485IV interface for testing, and judging that the test is qualified if data frame comparison is passed, otherwise, judging that the test is failed. After the test is finished, the adjustable RS485/RS232 test circuit adjusts the intelligent fusion terminal test device to be in an RS232 mode, the A end (GA) of the RS485 III interface is connected with the B end (HB) of the RS485IV interface, and the B end (GB) of the RS485 III interface is connected with the A end (HA) of the RS485IV interface; and the intelligent fusion terminal to be tested starts to execute the test of mutually sending test data frames of the RS232, if the data frames are compared to pass, the data frames are judged to be qualified, otherwise, the data frames are judged to fail.
And S4, carrying out remote signaling interface test. The communication chip U2 sends a test instruction to switch the intelligent convergence terminal test device 100 to a remote signaling test mode; the intelligent fusion terminal testing device 100 generates a pulse signal with a period of 1s and transmits the pulse signal to a remote signaling interface of the intelligent fusion terminal to be tested; if the intelligent fusion terminal to be tested detects the remote signaling signal, the remote signaling function can be judged to be normal, otherwise, the remote signaling function is judged to be abnormal.
And S5, carrying out PT100 test. And directly reading the temperature value of the current PT100 interface of the intelligent fusion terminal to be tested. When the corresponding 200 omega resistance value can be inquired according to the graduation table of the temperature and the resistance value of the PT100 platinum resistor, the detected temperature is between 266 ℃ and 267 ℃, if the read value is between 266 ℃ and 267 ℃, the test is judged to be qualified, otherwise, the test is judged to be failed.
And S6, the intelligent fusion terminal to be tested sends the test result back to the configuration software through the message, and the function test of the whole interface is completed.
The above examples only express preferred embodiments of the present invention, and the description thereof is more specific and detailed, but not to be construed as limiting the scope of the utility model. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. An intelligent fusion terminal testing device is characterized by comprising a single chip microcomputer and a buckle terminal, wherein the single chip microcomputer comprises a main chip and a testing circuit connected with the main chip, and the main chip and the testing circuit are connected with an interface corresponding to an intelligent fusion terminal to be tested through the buckle terminal; the test circuit includes:
the independent RS485 test circuit is used for testing two paths of independent RS485 interfaces of the intelligent fusion terminal to be tested;
the adjustable RS485/RS232 test circuit is used for testing two paths of RS485/RS232 adjustable interfaces of the intelligent fusion terminal to be tested;
the remote signaling test circuit is used for testing the four remote signaling interfaces of the intelligent fusion terminal to be tested; and
and the PT100 test circuit is used for testing two paths of PT100 interfaces of the intelligent fusion terminal to be tested.
2. The intelligent fusion terminal testing device of claim 1, wherein the two independent RS485 interfaces are an RS485I interface and an RS485 II interface, and the independent RS485 testing circuit comprises: the connecting circuit is used for connecting the RS485I interface and the RS485 II interface; the A end of the RS485I interface is connected with the A end of the RS485 II interface through the connecting circuit, and the B end of the RS485I interface is connected with the B end of the RS485 II interface through the connecting circuit.
3. The intelligent fusion terminal testing device of claim 1, wherein the RS485/RS232 adjustable interface is an RS485 iii interface and an RS485IV interface, wherein RS485 iii and RS232 i are adjustable, and RS485IV and RS232 ii are adjustable; the adjustable RS485/RS232 test circuit comprises: the relay, the first diode, the first triode, the first resistor and the second resistor are used for switching the connection mode of the RS485 III interface and the RS485IV interface; the relay is respectively connected with the RS485 III interface and the RS485IV interface; the first termination VCC5V power of relay, the second end of relay with the collecting electrode of first triode is connected, the base of first triode with the first end of first resistance is connected, the base of first triode still with the first end of second resistance is connected, the projecting pole of first triode with the second end of second resistance meets ground connection back, the second end of first resistance with the main chip is connected, the positive pole of first diode with the second end of relay is connected, the negative pole of first diode with the first end of relay is connected.
4. The intelligent convergence terminal testing device of claim 3, wherein when the attribute of the RS485/RS232 adjustable interface is an RS485 mode, an A end of the RS485 III interface is connected with an A end of the RS485IV interface, and a B end of the RS485 III interface is connected with a B end of the RS485IV interface.
5. The intelligent convergence terminal testing device of claim 3, wherein when the attribute of the RS485/RS232 adjustable interface is an RS232 mode, an A end of the RS485 III interface is connected with a B end of the RS485IV interface, and the B end of the RS485 III interface is connected with the A end of the RS485IV interface.
6. The intelligent convergence terminal testing device of claim 1, further comprising a communication chip for switching the intelligent convergence terminal testing device to a remote signaling testing mode, wherein the communication chip is connected to the main chip and the RS485i interface respectively.
7. The intelligent convergence terminal testing device of claim 6, wherein the remote signaling testing circuit comprises: the third resistor, the fourth resistor, the fifth resistor, the second triode and the light-emitting diode; the first end of the third resistor is connected with a first 3V3 power supply, the second end of the third resistor is connected with the first end of the fourth resistor in parallel and then connected with the main chip, the second end of the fourth resistor is connected with the base electrode of the second triode, the emitter electrode of the second triode is grounded, the collector electrode of the second triode is connected with the first ends of the four paths of remote signaling interfaces in parallel, the second end of the fourth path of remote signaling interfaces is also connected with the negative electrode of the light emitting diode, and the positive electrode of the light emitting diode is connected with the fifth resistor in series and then connected with a second 3V3 power supply.
8. The intelligent convergence terminal test device of claim 1, wherein the PT100 test circuit comprises: and the two high-precision resistors are respectively connected with the two paths of PT100 interfaces.
9. The intelligent convergence terminal testing device of claim 8, wherein the high-precision resistor is a platinum thermal resistor, and the resistance of the platinum thermal resistor is 200 Ω.
10. The intelligent convergence terminal test device of claim 1 further comprising a power input interface.
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| CN202121046854.5U CN215601322U (en) | 2021-05-14 | 2021-05-14 | Intelligent fusion terminal testing device |
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| CN202121046854.5U CN215601322U (en) | 2021-05-14 | 2021-05-14 | Intelligent fusion terminal testing device |
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| GR01 | Patent grant | ||
| GR01 | Patent grant |