CN215580898U

CN215580898U - Bus capacitor quick discharging device of frequency converter

Info

Publication number: CN215580898U
Application number: CN202122009888.3U
Authority: CN
Inventors: 薛维灵
Original assignee: Guangzhou Chuoli Technology Co ltd
Current assignee: Guangzhou Chuoli Technology Co ltd
Priority date: 2021-08-24
Filing date: 2021-08-24
Publication date: 2022-01-18
Anticipated expiration: 2031-08-24

Abstract

The utility model belongs to the technical field of frequency converters, and discloses a bus capacitor quick discharge device of a frequency converter, which comprises a rectification circuit, a filter circuit, a brake circuit and an inverter circuit which are connected in sequence; the brake circuit comprises a brake resistor and a brake pipe which are connected, the brake pipe is connected with a driving circuit, the driving circuit comprises a latch and a switching power supply, a latch enabling end and a data input end of the latch are respectively connected with the digital signal processor, a data output end of the latch is connected with the brake pipe, and the latch is independently powered by the switching power supply; the brake circuit of the main circuit of the frequency converter serves as the discharge circuit of the bus capacitor, so that when alternating current at the input side of the frequency converter is cut off, the latch is controlled by the digital signal processor to latch the brake pipe into a conducting state, the brake resistor is kept to be connected in parallel at two ends of the bus capacitor for rapid discharge, a discharge device is not required to be additionally added, the hardware cost can be reduced, and the installation space can be saved.

Description

Bus capacitor quick discharging device of frequency converter

Technical Field

The utility model belongs to the technical field of frequency converters, and particularly relates to a bus capacitor quick discharge device of a frequency converter.

Background

A conventional frequency converter main loop for an elevator comprises a rectifying circuit, an inverter circuit and a braking circuit. The input alternating current at the input side is converted into direct current to be input into a direct current bus after passing through a rectifying circuit, and then the direct current on the direct current bus is subjected to three-phase inversion through an inverter circuit and is output to a motor to drive the motor to rotate positively and negatively.

Because the dc bus voltage rectified by the rectifying circuit is a dc voltage with six pulses which fluctuate periodically, the dc bus voltage needs to be filtered for stabilizing the dc bus voltage. Capacitors with proper capacity are usually selected to form a filter circuit, and the filter circuit is connected in parallel at the positive end and the negative end of a direct current bus to filter direct current. For this reason, the filter capacitor connected in parallel to the dc bus is called a bus capacitor. When the motor is dragged reversely by the elevator counterweight and the motor is in a power generation state, the filter capacitor on the direct current bus is charged, so that the voltage of the direct current bus is increased. Therefore, it is necessary to consume the excess electric energy on the dc bus through the braking circuit when the dc bus voltage is too high, so as to limit the continuous rise of the dc bus voltage.

However, when the ac power on the input side of the inverter is cut off, the inverter side stops outputting, and the dc power stored in the bus capacitor also loses the discharge circuit. If the voltage on the bus capacitor does not fall below the human body safety voltage (36V), the frequency converter and elevator component equipment electrically connected with the frequency converter are overhauled and maintained, and the risk of electric shock exists. In order to ensure the safety during maintenance, after the ac power at the input side of the frequency converter is cut off, the voltage-sharing resistor of the bus capacitor is usually used to consume the stored electric energy to discharge the bus capacitor.

However, in practice, it is found that the discharge time of the bus capacitor is proportional to the resistance value of the discharge resistor, and the larger the resistance value is, the longer the discharge time is required. And the voltage-sharing resistor of the bus capacitor consumes the stored electric energy, the power of the voltage-sharing resistor is small (usually 2-3W), the resistance value is large, the voltage on the bus capacitor is reduced to below 36V, at least several minutes are needed, the discharging speed is slow, and the elevator is not beneficial to quick maintenance. If the bus capacitor is rapidly discharged through the external discharging device, the hardware cost of the discharging device and the installation space of the discharging device need to be additionally increased.

SUMMERY OF THE UTILITY MODEL

The utility model aims to overcome the defects in the prior art, and provides a bus capacitor quick discharge device of a frequency converter, which can quickly discharge a bus capacitor when alternating current at the input side of the frequency converter is cut off without additionally increasing a discharge device, so that the hardware cost is reduced and the installation space is saved.

The utility model discloses a bus capacitor quick discharge device of a frequency converter, which comprises a rectification circuit, a filter circuit, a brake circuit and an inverter circuit which are connected in sequence; the brake circuit comprises a brake resistor and a brake pipe which are connected, the brake pipe is connected with a driving circuit, the driving circuit comprises a latch and a switching power supply, a latch enabling end and a data input end of the latch are respectively connected with a digital signal processor, a data output end of the latch is connected with the brake pipe, and the latch is independently powered by the switching power supply.

In one embodiment, the rectifying circuit comprises a first diode, a second diode, a third diode, a fourth diode, a fifth diode and a sixth diode; the first diode and the second diode are connected in series in the forward direction to form a first tube group, the third diode and the fourth diode are connected in series in the forward direction to form a second tube group, the fifth diode and the sixth diode are connected in series in the forward direction to form a third tube group, and the first tube group, the second tube group and the third tube group are respectively connected with the anode and the cathode of a direct current bus after being connected in parallel in the forward direction.

In one embodiment, the filter circuit comprises a first capacitor, a second capacitor, a first resistor and a second resistor; the first capacitor and the first resistor are connected in parallel to form a first filtering part, the second capacitor and the second resistor are connected in parallel to form a second filtering part, and the first filtering part and the second filtering part are connected in series and then are respectively connected with the anode and the cathode of the direct current bus.

In one embodiment, the inverter circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor; the first transistor and the second transistor are connected in series in the forward direction to form a fourth tube group, the third transistor and the fourth transistor are connected in series in the forward direction to form a fifth tube group, the fifth transistor and the sixth transistor are connected in series in the forward direction to form a sixth tube group, and the fourth tube group, the fifth tube group and the sixth tube group are connected in parallel in the forward direction and then are respectively connected with the anode and the cathode of the direct current bus.

In one embodiment, the brake circuit further comprises a seventh diode, a cathode of the seventh diode is connected with an anode of the direct current bus, and an anode of the seventh diode is connected with a collector of the brake pipe.

In one embodiment, the driving circuit further comprises a driving optocoupler, a data output end of the latch is connected with the brake pipe through the driving optocoupler, and the driving optocoupler is independently powered by the switching power supply.

In one embodiment, the driving circuit further comprises a third resistor and a fourth resistor; the latch enabling end of the latch is connected with the digital signal processor through the third resistor, and the data input end of the latch is connected with the digital signal processor through the fourth resistor.

In one embodiment, the driving circuit further includes a fifth resistor and a sixth resistor, one end of the fifth resistor is connected to the data input terminal of the latch, the other end of the fifth resistor is connected to a ground terminal, one end of the sixth resistor is connected to the latch enable terminal of the latch, and the other end of the sixth resistor is connected to the ground terminal.

In one embodiment, the driving circuit further includes a seventh resistor and an eighth resistor, the data output end of the latch is connected to the input end of the driving optocoupler through the seventh resistor, and the output end of the driving optocoupler is connected to the gate of the brake pipe through the eighth resistor.

In one embodiment, the driving circuit further comprises a ninth resistor and a third capacitor, and the ninth resistor and the third capacitor are connected in parallel and then are respectively connected with the gate and the emitter of the brake pipe.

The bus capacitor quick discharge device of the frequency converter has the advantages that the brake circuit of the main circuit of the frequency converter is used as the discharge circuit of the bus capacitor, the brake state and the discharge state of the bus capacitor are switched, the latch is introduced into the drive circuit connected with the brake pipe, when the alternating current at the input side of the frequency converter is cut off, the latch can be quickly controlled by the digital signal processor to latch the brake pipe into a conducting state, the brake resistor is kept to be connected in parallel with the two ends of the bus capacitor for quick discharge, the discharge device is not required to be additionally added, the hardware cost can be reduced, the installation space is saved, and the application range is expanded.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and, together with the description, serve to explain the principles and effects of the utility model.

Unless otherwise specified or defined, the same reference numerals in different figures refer to the same or similar features, and different reference numerals may be used for the same or similar features.

Fig. 1 is a schematic circuit diagram of a bus capacitor fast discharging device of a frequency converter disclosed in this embodiment;

description of reference numerals:

10. a rectifying circuit; 20. a filter circuit; 30. a braking circuit; 40. an inverter circuit; 50. a drive circuit; u1, latch; OE, output enable; LE, latch enable end; D. a data input; q, a data output end; u2, a driving optocoupler; d1, a first diode; d2, a second diode; d3, a third diode; d4, a fourth diode; d5, a fifth diode; d6, a sixth diode; d7, a seventh diode; r1, a first resistor; r2, a second resistor; r3, brake resistance; r4, third resistor; r5, fourth resistor; r6, fifth resistor; r7, sixth resistor; r8, seventh resistor; r9, eighth resistor; r10, ninth resistor; c1, a first capacitance; c2, a second capacitor; c3, a third capacitance; v1, a first transistor; v2, a second transistor; v3, a third transistor; v4, fourth transistor; v5, fifth transistor; v6, sixth transistor; v7, brake pipe.

Detailed Description

In order to facilitate an understanding of the utility model, specific embodiments thereof will be described in more detail below with reference to the accompanying drawings.

Unless specifically stated or otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. In the case of combining the technical solutions of the present invention in a realistic scenario, all technical and scientific terms used herein may also have meanings corresponding to the purpose of achieving the technical solutions of the present invention.

As used herein, unless otherwise specified or defined, "first" and "second" … are used merely for name differentiation and do not denote any particular quantity or order. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

It will be understood that when an element is referred to as being "secured to" another element, it can be directly secured to the other element or intervening elements may also be present; when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present; when an element is referred to as being "mounted on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present.

As shown in fig. 1, the embodiment of the present invention discloses a bus capacitor fast discharging device of a frequency converter, which can be applied to a frequency converter for an elevator or other frequency converters with similar braking circuits. The bus capacitor quick discharge device of the frequency converter comprises a rectifying circuit 10, a filter circuit 20, a braking circuit 30 and an inverter circuit 40 which are connected in sequence; the brake circuit 30 comprises a brake resistor R3 and a brake pipe V7 which are connected, the brake pipe V7 is connected with a driving circuit 50, the driving circuit 50 comprises a latch U1 and a switching power supply, a latch enable end LE and a data input end D of the latch U1 are respectively connected with a Digital Signal Processor (DSP) of the frequency converter, and a data output end Q of the latch U1 is connected with a brake pipe V7.

The rectifying circuit 10, the filter circuit 20, the braking circuit 30 and the inverter circuit 40 are respectively connected with the positive pole P and the negative pole N of the direct current bus in sequence. The switching power supply independently supplies power to the latch U1, separate from the power supply for the DSP. The stopper tube V7 is specifically an Insulated Gate Bipolar Transistor (IGBT), and has three electrodes, which are an emitter, a Gate, and a collector, respectively.

When the input side R/S/T alternating current of the frequency converter is normally supplied, the braking circuit 30 is used for limiting the bus voltage in a braking state; when the input side R/S/T alternating current of the frequency converter is in power failure, the braking circuit 30 is used for quickly discharging the bus capacitor.

Therefore, the brake circuit 30 of the main circuit of the frequency converter can be fully utilized to serve as a discharge circuit of a bus capacitor, switching between the brake state and the bus capacitor discharge state is realized, the latch U1 is introduced into the drive circuit 50 connected with the brake pipe V7, when the R/S/T alternating current on the input side of the frequency converter is powered off, the latch U1 is quickly controlled by the DSP to latch the brake pipe V7 into a conducting state, the latch U1 is independently powered by a switching power supply, the brake resistor R3 is kept to be connected in parallel at two ends of the bus capacitor for quick discharge until the voltage of the bus capacitor is reduced to be lower than the human body safety voltage (36V), no additional discharge device is needed, the hardware cost is reduced, the installation space is saved, and the application range is expanded.

Due to the action of the bus capacitor, when the R/S/T alternating current at the input side of the frequency converter is just powered off, the power supply of the DSP cannot be powered off immediately and stop working, so that a control signal can be output quickly to control the latch U1. And after the power supply of the DSP stops outputting, the control signal output by the DSP is initialized, at the moment, the switch power supply can still supply power to the latch U1, the brake pipe V7 is ensured to be conducted, the switch power supply stops outputting until the voltage of the bus capacitor is reduced to be lower than 36V, and the circuit restores the initialization state.

Therefore, the latch U1 is independently powered by the switching power supply, so that after the R/S/T on the input side of the frequency converter is powered down, the latch U1 is continuously powered on, the brake pipe V7 is kept conducted until the voltage of the bus capacitor is reduced to below 36V, and the reliability of the bus capacitor discharging device can be ensured.

The driving circuit 50 includes a latch U1, the latch U1 includes four functional pins, which are an output enable terminal OE, a latch enable terminal LE, a data input terminal D, and a data output terminal Q, where the latch enable terminal LE is configured to receive a PWM-EN signal sent by the DSP, the data input terminal D is configured to receive a PWM-GB signal sent by the DSP, and the data output terminal Q is configured to output a BRKE signal.

When the PWM-EN signal output by the DSP is at a high level, the BRKE signal output by the latch U1 follows the high-low level change of the PWM-GB signal; when the PWM-EN signal output from the DSP is low, the BRKE signal output from the latch U1 keeps the output state of the PWM-EN signal unchanged from the previous time when the PWM-EN signal was low. When the voltage of the power supply VCC of the latch U1 becomes lower than the operating voltage of the latch U1, the latch U1 resumes initialization, and the output BRKE signal releases the latched state.

In this embodiment, the on-off state of the brake pipe V7 is determined by the BRKE signal output by the latch U1, if the BRKE signal is at a high level, the brake pipe V7 is turned on, and the brake resistor R3 is connected in parallel to two ends of the dc bus for discharging; if the BRKE signal is low, the brake pipe V7 is in an off state, and the brake resistor R3 is disconnected from the two ends of the bus capacitor.

In the present embodiment, the rectifier circuit 10 may be a three-phase full-wave rectifier circuit composed of a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, and a sixth diode D6; the first diode D1 and the second diode D2 are connected in series in the forward direction to form a first tube group, the third diode D3 and the fourth diode D4 are connected in series in the forward direction to form a second tube group, the fifth diode D5 and the sixth diode D6 are connected in series in the forward direction to form a third tube group, and the first tube group, the second tube group and the third tube group are connected in parallel in the forward direction and then are respectively connected with the positive electrode P and the negative electrode N of the direct current bus.

In the present embodiment, the filter circuit 20 is composed of a bus capacitor and a voltage equalizing resistor, and includes a first capacitor C1, a second capacitor C2, a first resistor R1, and a second resistor R2; the first capacitor C1 and the first resistor R1 are connected in parallel to form a first filtering part, the second capacitor C2 and the second resistor R2 are connected in parallel to form a second filtering part, and the first filtering part and the second filtering part are connected in series and then are respectively connected with the positive pole P and the negative pole N of the direct current bus.

In the present embodiment, the inverter circuit 40 includes a first transistor V1, a second transistor V2, a third transistor V3, a fourth transistor V4, a fifth transistor V5 and a sixth transistor V6, which are all IGBT power transistors; the first transistor V1 and the second transistor V2 are connected in series in the forward direction to form a fourth tube group, the third transistor V3 and the fourth transistor V4 are connected in series in the forward direction to form a fifth tube group, the fifth transistor V5 and the sixth transistor V6 are connected in series in the forward direction to form a sixth tube group, and the fourth tube group, the fifth tube group and the sixth tube group are connected in parallel in the forward direction and then are respectively connected with the positive electrode P and the negative electrode N of the direct current bus.

In this embodiment, the braking circuit 30 further includes a seventh diode D7, a cathode of the seventh diode D7 is connected to the positive electrode P of the dc bus, and an anode of the seventh diode D7 is connected to the collector of the braking tube V7.

In this embodiment, the driving circuit 50 further includes a driving optocoupler U2, the data output end Q of the latch U1 is connected to the brake pipe V7 through the driving optocoupler U2, and the driving optocoupler U2 is also independently powered by the switching power supply.

The switching power supply mainly provides VCC power supply for the latch U1 and NVCC and NVEE power supply for the driving optocoupler U2. When the voltage at the two ends of the bus capacitor is lower than 36V, the switching power supply stops outputting, and the output voltages of VCC, NVCC and NVEE are all zero.

The primary side and the secondary side of the driving optocoupler U2 are completely isolated, and the conduction voltage drop of the secondary side of the optocoupler can be ignored. When the BRKE signal is at a high level, the driving signal GB with the NVCC high level is output, the brake pipe V7 is conducted, and the brake resistor R3 is connected in parallel with the two ends of the bus capacitor, so that the bus capacitor is rapidly discharged; when the BRKE signal is at a low level, the driving signal GB with the NVEE low level is output, the brake pipe V7 is turned off, and the brake resistor R3 is disconnected from the two ends of the bus capacitor.

In the present embodiment, the driving circuit 50 further includes a third resistor R4 and a fourth resistor R5; the data input end D of the latch U1 is connected with the DSP through a third resistor R4, and the latch enable end LE of the latch U1 is connected with the DSP through a fourth resistor R5.

In this embodiment, the driving circuit 50 further includes a fifth resistor R6 and a sixth resistor R7, wherein one end of the fifth resistor R6 is connected to the data input terminal D of the latch U1, the other end of the fifth resistor R6 is connected to the ground terminal GND, one end of the sixth resistor R7 is connected to the latch enable terminal LE of the latch U1, and the other end of the sixth resistor R7 is connected to the ground terminal GND.

In this embodiment, the driving circuit 50 further includes a seventh resistor R8 and AN eighth resistor R9, the data output terminal Q of the latch U1 is connected to the input terminal AN of the driving optocoupler U2 through the seventh resistor R8, and the output terminal VOUT of the driving optocoupler U2 is connected to the gate of the brake pipe V7 through the eighth resistor R9.

In this embodiment, the driving circuit 50 further includes a ninth resistor R10 and a third capacitor C3, and the ninth resistor R10 and the third capacitor C3 are connected in parallel and then respectively connected to the gate and the emitter of the brake tube V7.

The working process of the embodiment is as follows:

s1, before power-on of the input side R/S/T: the VCC, NVCC and NVEE output voltages of the switching power supply are zero, the latch U1 is in an initial state, the BRKE output signal is in a low level, the driving signal GB is in a low level, the brake pipe V7 is in a turn-off state, and the brake resistor R3 is disconnected from the two ends of the bus capacitor;

s2, after the input side R/S/T is electrified: the switching power supply normally works, and VCC, NVCC and NVEE output design voltages to independently supply power to the latch U1 and the driving optocoupler U2; the DSP outputs a PWM-EN signal as a high level, and controls the high and low level change of the PWM-GB signal according to whether the voltage value of the direct current bus exceeds a set value;

s3, after the input side R/S/T is powered off: when a power supply of the DSP is not powered down, setting control signals (PWM-EN signals and PWM-GB signals) output by the DSP to be high level at the same time, changing the PWM-EN signals to be low level after millisecond-level delay, and then keeping the PWM-EN signals to be the low level unchanged so as to latch BRKE signals output by the latch U1 to be high level output and not to change along with the PWM-GB signals; when the BRKE signal is at a high level, the driving signal GB is at a high level, the brake pipe V7 is conducted, the brake resistor R3 is connected in parallel to the two ends of the bus capacitor to discharge until the bus voltage is reduced to be lower than 36V, the switching power supply stops outputting, the VCC, NVCC and NVEE output voltages are zero, and the circuit is restored to the initial state before power-on.

In other possible embodiments, the number and the type of the components of the specific circuit may be different from those described above, for example, the input end of the switching power supply may not take power from the dc bus, but instead supply power by the energy storage battery or the energy storage capacitor; the specific model of latch U1 may be replaced by other functionally similar devices having a latch function; the driving optical coupler U2 can be replaced by other types of driving optical couplers which only provide high-level switching-on and zero-level switching-off.

The above embodiments are provided to illustrate, reproduce and deduce the technical solutions of the present invention, and to fully describe the technical solutions, the objects and the effects of the present invention, so as to make the public more thoroughly and comprehensively understand the disclosure of the present invention, and not to limit the protection scope of the present invention.

The above examples are not intended to be exhaustive of the utility model and there may be many other embodiments not listed. Any alterations and modifications without departing from the spirit of the utility model are within the scope of the utility model.

Claims

1. The bus capacitor quick discharge device of the frequency converter is characterized by comprising a rectifying circuit, a filter circuit, a braking circuit and an inverter circuit which are connected in sequence; the brake circuit comprises a brake resistor and a brake pipe which are connected, the brake pipe is connected with a driving circuit, the driving circuit comprises a latch and a switching power supply, a latch enabling end and a data input end of the latch are respectively connected with a digital signal processor, a data output end of the latch is connected with the brake pipe, and the latch is independently powered by the switching power supply.

2. The bus capacitor fast discharging apparatus of an inverter according to claim 1, wherein the rectifying circuit includes a first diode, a second diode, a third diode, a fourth diode, a fifth diode, and a sixth diode; the first diode and the second diode are connected in series in the forward direction to form a first tube group, the third diode and the fourth diode are connected in series in the forward direction to form a second tube group, the fifth diode and the sixth diode are connected in series in the forward direction to form a third tube group, and the first tube group, the second tube group and the third tube group are respectively connected with the anode and the cathode of a direct current bus after being connected in parallel in the forward direction.

3. The bus capacitor fast discharging device of a frequency converter according to claim 2, wherein the filter circuit comprises a first capacitor, a second capacitor, a first resistor and a second resistor; the first capacitor and the first resistor are connected in parallel to form a first filtering part, the second capacitor and the second resistor are connected in parallel to form a second filtering part, and the first filtering part and the second filtering part are connected in series and then are respectively connected with the anode and the cathode of the direct current bus.

4. The device for rapidly discharging the bus capacitor of the frequency converter according to claim 2, wherein the inverter circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a sixth transistor; the first transistor and the second transistor are connected in series in the forward direction to form a fourth tube group, the third transistor and the fourth transistor are connected in series in the forward direction to form a fifth tube group, the fifth transistor and the sixth transistor are connected in series in the forward direction to form a sixth tube group, and the fourth tube group, the fifth tube group and the sixth tube group are connected in parallel in the forward direction and then are respectively connected with the anode and the cathode of the direct current bus.

5. The apparatus for rapidly discharging bus capacitor of a frequency converter according to any one of claims 2 to 4, wherein said braking circuit further comprises a seventh diode, a cathode of said seventh diode is connected to an anode of a DC bus, and an anode of said seventh diode is connected to a collector of said braking tube.

6. The bus capacitor fast discharging device of the frequency converter according to claim 1, wherein the driving circuit further comprises a driving optocoupler, a data output end of the latch is connected to the brake pipe through the driving optocoupler, and the driving optocoupler is independently powered by the switching power supply.

7. The apparatus for rapidly discharging bus capacitor of a frequency converter according to claim 6, wherein said driving circuit further comprises a third resistor and a fourth resistor; the latch enabling end of the latch is connected with the digital signal processor through the third resistor, and the data input end of the latch is connected with the digital signal processor through the fourth resistor.

8. The device for rapidly discharging the bus capacitor of the frequency converter according to claim 6 or 7, wherein the driving circuit further comprises a fifth resistor and a sixth resistor, one end of the fifth resistor is connected to the data input terminal of the latch, the other end of the fifth resistor is connected to a ground terminal, one end of the sixth resistor is connected to the latch enable terminal of the latch, and the other end of the sixth resistor is connected to the ground terminal.

9. The bus capacitor fast discharging device of the frequency converter as claimed in claim 8, wherein the driving circuit further comprises a seventh resistor and an eighth resistor, the data output terminal of the latch is connected to the input terminal of the driving optocoupler through the seventh resistor, and the output terminal of the driving optocoupler is connected to the gate of the brake pipe through the eighth resistor.

10. The apparatus for rapidly discharging bus capacitor of a frequency converter according to claim 9, wherein the driving circuit further comprises a ninth resistor and a third capacitor, and the ninth resistor and the third capacitor are connected in parallel and then are respectively connected to the gate and the emitter of the brake pipe.