CN215580887U

CN215580887U - Grid drive auxiliary power supply

Info

Publication number: CN215580887U
Application number: CN202121109442.1U
Authority: CN
Inventors: 任寓琦
Original assignee: Zhengzhou Yimuxifang Information Technology Co ltd
Current assignee: Zhengzhou Yimuxifang Information Technology Co ltd
Priority date: 2021-05-24
Filing date: 2021-05-24
Publication date: 2022-01-18
Anticipated expiration: 2031-05-24

Abstract

The utility model discloses a grid driving auxiliary power supply, which relates to the technical field of driving power supplies and solves the technical problem that a high-side switching tube of an existing grid driver cannot be conducted for a long time.

Description

Grid drive auxiliary power supply

Technical Field

The utility model relates to the technical field of driving power supplies, in particular to a grid driving auxiliary power supply.

Background

The gate, i.e. the G-pole, also called the gate, is the control pole of both the MOS transistor and the IGBT switching transistor. In a half bridge composed of MOS transistors or IGBTs, a gate driver is commonly used to drive the switching transistor in order to introduce a dead zone or facilitate driving.

In a half bridge composed of MOS transistors or IGBTs, a gate driver is commonly used to drive the switching transistor in order to introduce a dead zone or facilitate driving. In the field of power supplies, especially two topologies of 4-switch switching converters, such as buck-boost and split-pi, a high-side switching tube is often required to be turned on for a long time during operation, and a gate driver is required to have the capability of turning on the high side for a long time, but the gate driver generally uses a bootstrap circuit to supply power to the high-side switch, if the high-side switching tube is turned on for a long time, due to the existence of gate-source leakage current of the switching tube and VBS static current of the gate driver, even if only 1 μ a exists, 1 μ F of bootstrap capacitor is enough to leak 1V of voltage within 1 second, and after the high-side switching tube is turned on for a long enough time, the high-side driving can be turned off and cannot operate, so that the high-side switching converter cannot be turned on for a long time.

SUMMERY OF THE UTILITY MODEL

The present invention is directed to solve the above-mentioned problems of the prior art, and an object of the present invention is to provide a gate driving auxiliary power supply capable of turning on a high-side switch for a long time.

The technical scheme of the utility model is as follows: a grid driving auxiliary power supply comprises a booster circuit and voltage reducing circuits which are equal to half bridges in number and correspond to each other one by one, wherein the output end of the booster circuit is connected with the input end of the voltage reducing circuits, the grounding end of the booster circuit is connected with the source electrode of a low-side switching tube of the half bridge and serves as a first reference ground, the grounding end of the voltage reducing circuits is connected with the source electrode of a high-side switching tube of the half bridge and the drain electrode of the low-side switching tube of the half bridge and serves as a second reference ground, the output end of the voltage reducing circuits is connected with a VB pin of a grid driver, a VS pin of the grid driver is connected with the second reference ground, the grounding pin of the grid driver is connected with the first reference ground, and the output voltage of the booster circuit is higher than the drain voltage of the high-side switching tube.

As a further improvement, the input end of the booster circuit is connected with a preceding stage power supply or the drain electrode of the high-side switching tube.

Further, a voltage difference between the output voltage of the voltage-reducing circuit and the second reference ground is within 20V.

Furthermore, the switching frequency of the voltage reduction circuit is N times of the switching frequency of the half bridge, and N is more than or equal to 2 and less than or equal to 100.

Further, the output end of the voltage boosting circuit is connected with the input end of the voltage reducing circuit through a diode, and the input end of the voltage reducing circuit is connected with the second reference ground through a capacitor.

Further, the boost circuit adopts a boost topology and is controlled by a DC-DC chip LM5002 of Texas instruments.

Further, the voltage reduction circuit adopts buck topology and is controlled by a DC-DC chip LM5007 of Texas instruments.

Further, the gate driver employs a gate driving chip EG2131, a gate driving chip IR2104, a gate driving chip FD6288 or a gate driving chip UCC 27712.

Further, the boost circuit adopts a flyback topology.

Further, the voltage reduction circuit adopts a flyback topology or a linear voltage stabilization topology.

Advantageous effects

Compared with the prior art, the utility model has the advantages that:

in the present invention, no matter how the voltage of the second ground reference GND2 varies within the range, the output voltage of the voltage reduction circuit appears to be merely changed, and the input voltage thereof is still maintained at a very stable set value, so that the pin VB of the high-side driving power supply of the gate driver has a continuous and stable power supply, and the continuous and long-time conduction of the high-side switch Q1 can be realized.

Drawings

FIG. 1 is a schematic structural view of example 1 of the present invention;

FIG. 2 is a schematic structural diagram of example 2 of the present invention;

FIG. 3 is a schematic structural diagram according to embodiment 3 of the present invention;

fig. 4 is a schematic structural diagram of embodiment 4 of the present invention.

Detailed Description

The utility model will be further described with reference to specific embodiments shown in the drawings.

Referring to fig. 1-4, a gate driving auxiliary power supply includes a voltage boosting circuit 1, and voltage dropping circuits 2 corresponding to half-bridges 3 in number one by one, and each half-bridge 3 is correspondingly connected with a gate driver 4. The output end of the boost circuit 1 is connected to the input end of the buck circuit 2, the ground end of the boost circuit 1 is connected to the source of the low-side switching tube Q2 of the half bridge 3 and serves as the first reference ground GND1, and all ground points inside the boost circuit 1 are connected to this point. The ground terminal of the buck circuit 2 is connected to the source of the high-side switch Q1 and the drain of the low-side switch Q2 of the half bridge 3 and serves as a second ground GND2, to which all ground points inside the buck circuit 2 are connected. The output end of the voltage reduction circuit 2 is connected with a VB pin of the gate driver 4, a VS pin of the gate driver 4 is connected with the second reference ground GND2, a grounding pin of the gate driver 4 is connected with the first reference ground GND1, and the output voltage of the voltage boosting circuit 1 is higher than the drain voltage of the high-side switching tube Q1.

Preferably, the voltage difference between the output voltage of the step-down circuit 2 and the second reference ground GND2 is within 20V, the switching frequency of the step-down circuit 2 is N times of the switching frequency of the

half bridge

3, and 2 & ltoreq N & ltoreq 100.

In one embodiment, the input terminal of the voltage boosting circuit 1 is connected to the previous stage power supply, as shown in fig. 1.

In one embodiment, the input terminal of the voltage boost circuit 1 is connected to the drain of the high-side switch Q1, as shown in fig. 2, under the condition that the input voltage and the duty cycle of the voltage boost circuit 1 are allowed.

In one embodiment, the output terminal of the voltage boosting circuit 1 is connected to the input terminal of the voltage dropping circuit 2 through a diode D1, and the input terminal of the voltage dropping circuit 2 is connected to the second ground reference GND2 through a capacitor C1, as shown in fig. 3. When the half bridge is alternately switched, the voltage of the second ground reference GND2 greatly fluctuates with respect to the first ground reference GND1, and a diode D1 and a capacitor C1 are added between the output end of the voltage boosting circuit 1 and the input end of the voltage reducing circuit 2, so that the voltage reducing circuit 2 can stably operate. Of course, the capacitor C1 may be omitted if a capacitor is already connected inside the input terminal of the voltage-reducing circuit 2.

To illustrate the principle by way of example in fig. 2, all voltages mentioned hereinafter are, unless otherwise specified, voltages for the first ground reference GND 1.

The input voltage of half bridge 3 in fig. 2 is 60V, and the input of booster circuit 1 is also provided, and the output voltage of booster circuit 1 is set to 75V as the input voltage of buck circuit 2. The output voltage of the step-down circuit 2 is set to 12V with respect to the second ground reference GND 2.

During the switching process, when the high-side switch Q1 is turned off and the low-side switch Q2 is turned on, if the internal resistance of the low-side switch Q2 is small and the current flowing through the low-side switch Q is divided into a small voltage, the voltage of the second ground reference GND2 is considered to be close to the voltage of the first ground reference GND1, which is 0V. In this case, the input voltage of the step-down circuit is 75V and the output voltage thereof is 12V.

When the high-side switch Q1 is turned on and the low-side switch Q2 is turned off, if the internal resistance of the high-side switch Q1 is small and the current flowing through the high-side switch Q1 has a low divided voltage, the voltage of the second ground reference GND2 is approximately 60V, which is very close to the input voltage of the half-bridge. In this case, the input voltage of the step-down circuit is 15V and the output voltage thereof is 12V.

Thus, no matter how the voltage of the second ground reference GND2 varies within the range, the voltage of the output voltage of the voltage reduction circuit 2 will be maintained at a stable set value, though it appears that the input voltage of the voltage reduction circuit is merely changed. Thus, the high-side driving power supply VB pin of the gate driver 4 has a continuous and stable power supply, and the high-side switching transistor Q1 can be continuously turned on for a long time.

If a plurality of half bridges or full bridges need to be driven in the same circuit, a plurality of voltage reduction circuits can share one voltage increase circuit under the condition that the power of the voltage increase circuit allows.

As shown in fig. 4, the boost circuit 1 adopts a boost topology, controlled by a DC-DC chip LM5002 of texas instruments, for boosting a voltage of 60V to 75V, which is enabled or disabled by the high and low levels of the EN pin.

Since two pairs of high-low side switching tubes of the full bridge 5 need to be driven separately, two sets of voltage reduction circuits and gate drivers are provided, namely the first voltage reduction circuit 21 and the second voltage reduction circuit 22, and the first gate driver 41 and the second gate driver 42.

The first and second voltage-dropping circuits 21 and 22 adopt buck topology, controlled by the DC-DC chip LM5007 of texas instruments, for dropping the voltage to 12V for their reference ground, respectively.

The ground reference of the first voltage-reducing circuit 21 is connected to a node where the source of the high-side switch Q1 and the drain of the low-side switch Q2 are connected, which is the second ground reference GND2, and all ground points inside the first voltage-reducing circuit 21 are connected to this node.

Accordingly, the ground reference of the second step-down circuit 22 is connected to a node where the source of the high-side switch Q3 and the drain of the low-side switch Q4 are connected, which is the third ground reference GND3, and all ground points inside the second step-down circuit 22 are connected to this node.

A diode is connected between the output end of the voltage boosting circuit 1 and the input ends of the first voltage reducing circuit 21 and the second voltage reducing circuit 22, the cathode of the diode is connected with the input end of the voltage reducing circuit, and the anode of the diode is connected with the output end of the voltage boosting circuit 1.

The first gate driver 41 and the second gate driver 42 employ a gate driver chip EG2131 which is high in performance and high in reliability.

The VS pin of the first gate driver 41 is connected to the second ground reference GND2, and the ground pin of the first gate driver 41 is connected to the first ground reference GND 1.

Correspondingly, the VS pin of the second gate driver 42 is connected to the third ground reference GND3, and the ground pin of the second gate driver 42 is connected to the first ground reference GND1

Of course, the gate driver 4 may also adopt the gate driving chip IR2104 or the gate driving chip FD6288 or the gate driving chip UCC27712, the voltage boosting circuit 1 may also adopt a flyback topology, and the voltage reducing circuit 2 may also adopt a flyback topology or a linear voltage stabilizing topology.

The above is only a preferred embodiment of the present invention, and it should be noted that it is obvious to those skilled in the art that several variations and modifications can be made without departing from the structure of the present invention, which will not affect the effect of the implementation of the present invention and the utility of the patent.

Claims

1. A grid driving auxiliary power supply is characterized by comprising a boosting circuit (1) and a voltage reducing circuit (2) which corresponds to half bridges (3) in number one by one, wherein the output end of the boosting circuit (1) is connected with the input end of the voltage reducing circuit (2), the grounding end of the boosting circuit (1) is connected with the source electrode of a low-side switching tube (Q2) of the half bridges (3) and serves as a first reference ground (GND1), the grounding end of the voltage reducing circuit (2) is connected with the source electrode of a high-side switching tube (Q1) and the drain electrode of a low-side switching tube (Q2) of the half bridges (3) and serves as a second reference ground (GND2), the output end of the voltage reducing circuit (2) is connected with a VB pin of a grid driver (4), a VS pin of the grid driver (4) is connected with the second reference ground (GND2), and the grounding pin of the grid driver (4) is connected with the first reference ground (1), the output voltage of the boosting circuit (1) is higher than the drain voltage of the high-side switching tube (Q1).

2. A gate-driven auxiliary power supply as claimed in claim 1, wherein the input terminal of the boosting circuit (1) is connected to a previous stage power supply or to the drain of the high-side switching transistor (Q1).

3. A gate drive auxiliary power supply according to claim 1, characterized in that the voltage difference between the output voltage of the step-down circuit (2) and the second reference ground (GND2) is within 20V.

4. A gate drive auxiliary power supply as claimed in claim 1, characterized in that the switching frequency of the step-down circuit (2) is N times the switching frequency of the half-bridge (3), 2 ≦ N ≦ 100.

5. A gate drive auxiliary power supply according to claim 1, characterized in that the output terminal of the voltage boost circuit (1) is connected to the input terminal of the voltage buck circuit (2) through a diode (D1), and the input terminal of the voltage buck circuit (2) is connected to the second ground reference (GND2) through a capacitor (C1).

6. A gate drive auxiliary power supply according to claim 1, characterized in that said boost circuit (1) employs a boost topology, controlled by a texas instrument DC-DC chip LM 5002.

7. A gate-driven auxiliary power supply as claimed in claim 1, wherein said voltage-reducing circuit (2) is controlled by a DC-DC chip LM5007 of texas instruments using buck topology.

8. The gate driving auxiliary power supply of claim 1, wherein the gate driver (4) is implemented by a gate driving chip EG2131, a gate driving chip IR2104, a gate driving chip FD6288 or a gate driving chip UCC 27712.

9. A gate-driven auxiliary power supply as claimed in claim 1, characterized in that said booster circuit (1) employs a flyback topology.

10. A gate-driven auxiliary power supply as claimed in claim 1, characterized in that said voltage reduction circuit (2) employs a flyback topology or a linear regulator topology.