CN2155102Y - Semiconductor switch for power condenser control - Google Patents
Semiconductor switch for power condenser control Download PDFInfo
- Publication number
- CN2155102Y CN2155102Y CN 93213073 CN93213073U CN2155102Y CN 2155102 Y CN2155102 Y CN 2155102Y CN 93213073 CN93213073 CN 93213073 CN 93213073 U CN93213073 U CN 93213073U CN 2155102 Y CN2155102 Y CN 2155102Y
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- door
- pulse
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- output
- control
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Abstract
The utility model relates to a silicon controlled shockless current switch used for the switching on or cutting off of a power supply and a reactive power compensating capacitor in a power supply network in a workshop. The utility model is composed of two reversed polarity silicon controlled elements which are connected in parallel, a voltage dependent resistor which is connected with the controlled elements in parallel and a control circuit of the voltage dependent resistor. The utility model has the characteristics of strong anti-interference ability, accelerated speed of power discharge of a power capacitor and self-protective function of an SCR element.
Description
The utility model relates to a kind of semiconductor switch, and it is mainly used in the break-make control of the non-impact current of three-phase power capacitor or high-power resistance load.
The reactive power compensation capacitor of present domestic workshop supply network adopts general automatic switch such as contactor to control switching on and off of itself and power supply, the moment of connecting circuit is equivalent to short circuit, impulse current is all unfavorable to control circuit and supply network, thereby the life-span of having reduced equipment.Though this class technical problem has been had the scheme of some solutions, but still the charge discharge process of power capacitor is slow when existing open circuit, deficiencies such as anti-interference difference.
The purpose of this utility model is intended to overcome the prior art deficiency and a kind of strong interference immunity is provided, and makes the power capacitor velocity of discharge fast, the power capacitor control semiconductor switch of self-protection SCR element.
The utility model adopts two one-way SCR element SCR
1, SCR
2After reversed polarity was connected in parallel, Z was in parallel with piezo-resistance.One-way SCR element Be Controlled circuit is controlled.Control circuit produces control impuls respectively when no-voltage and during zero current.
In control circuit of the present utility model, master control door (5), or door (8), with door (16), main pulse generator (1), transistor driving stage (6), transformer (7) is connected in series, the output of master control door (5) connects the input of strobe pulse voltage generator (4) again, the output of the output of strobe pulse voltage generator (4) and main pulse generator (1) through the differential door be connected to the door (17) two inputs on, be connected in series with door (17) and false impulse generator (2), its output differential door (10) of connecting respectively, (18) be connected on after or door (8), (9) input, or door (9) connect with strobe pulse voltage generator (3), its output be connected on and the other end of (16) on.Or the other end of door (9) is connected on the output (D) of the differential door (19) that is connected with the signal input end of master control door (5).
Protective circuit of the present utility model be by or door (11), (12) NAND gate (13), (14), pulse generator (5 ') and reset button (15) connect to form.When false impulse vacancy that pulse in the control impuls of SCR produces, this circuit produces protection pulse blocking master pulse door.
Owing to be parallel with piezo-resistance with protection SCR element with the SCR element in the main circuit, and the charge discharge process of power capacitor when having accelerated open circuit, the velocity of discharge is accelerated.
Control circuit of the present utility model all can adopt integrated circuit, and has the strobe pulse gate control, and the anti-interference of impulse circuit is improved greatly, and the circuit element kind reduces, and has simplified circuit structure.
The utility model has also installed pulse protection circuit additional, when lacking pulse, owing to adopted flip-over type control circuit again; and make protective circuit form the protection pulse and with the trigger upset of protective circuit and locking itself; make the sealing of pulse master control door, circuit is quit work, SCR has been subjected to protection.
Description of drawings:
Fig. 1 is a main circuit diagram;
Fig. 2 is a zero pulse generator circuit diagram;
Fig. 3 is pulse control circuit figure;
Fig. 4 is driving stage and transformer output-stage circuit figure;
Fig. 5 is pulse protection circuit figure;
The sequential chart that Fig. 6 produces for pulse.
Below in conjunction with accompanying drawing the utility model is described further:
In the main circuit diagram, K is contactor (adopting the three-phase circuit switch in three-phase circuit), last terminated line voltage as shown in Figure 1; RD is a fast acting fuse, as the usefulness of circuit protection; SCR
1, SCR
2Be the silicon controlled member, its specification is decided by the load size of cut-offfing; Z is a piezo-resistance, and its puncture voltage should be a bit larger tham the peak value of supply voltage; C
1Be the protection that overflows of the temporary overvoltage protection of SCR and voltage change ratio value use capacitor, its value be 1 μ F, this electric capacity cooperation inductance coil L(2mH) work.C in the circuit is the power capacitor that is used for power network rate of doing work factor compensation usefulness, is the load (also can be used for ohmic load) of SCR, the control utmost point 1 in the circuit ', 2 ', 3 ', 4 ' accordingly receive on two secondary level windings of pulse output transformer.When adding control impuls, because the variation of the instantaneous value of AC power only adds the SCR conducting of forward voltage in the control utmost point of this antiparallel SCR element.Therefore at the different directions of voltage, two SCR take turns conducting, and load current is mutually continuous.When voltage is zero, the control impuls that has zero pulse to form is added on two SCR elements simultaneously, (90 °) then are added on the SCR element by the control impuls that auxilliary pulse produces when 5ms thereafter, so to capacitive load or ohmic load, so long as there are above-mentioned two group pulses to act on the SCR element simultaneously, main circuit current can continuous conducting.When above-mentioned two group pulses did not all have, SCR was off-state, leaves the crest voltage of supply voltage on the capacitor.This voltage remains on the C, passes through C
1It is then slower to discharge, and when external voltage when other direction is increased by O, promptly reach the puncture voltage of Z with the voltage addition on the C, and also strengthen gradually with the discharging current of increasing gradually of external voltage, differ minimum with normal current, thereby the velocity of discharge has been accelerated.And supply voltage is when other direction outside, and voltage and supply voltage on the C offset, and the voltage that acts on Z is less than puncture voltage, thereby can not charge to C again.2～3 weeks through AC supply voltage are discharge off.
Zero pulse generator shown in Figure 2 is by input transformer T
1And R-S trigger composition, its output is added with the differentiated pulse of capacitance coupling circuit with the output pulse front edge.Its operation principle is: positive and negative two half cycles of alternating voltage are added to the two ends of R-S trigger respectively, and the voltage that makes the R-S input is being triggered the R end during to the forward transition by O; And trigger the S end when the negative terminal transition by O.On two semiconductor collector electrodes of trigger, be added with isolation capacitance, also and the resistance of connecting as its output circuit.Two output pulses that form with diode or that door is exported two ends all are added on the input of the two poles of the earth triode amplifying stage, and its output is promptly exported the O spike train with driving force.Transformer T
1Be isolating transformer, the polarity of each winding is worked as U as shown in FIG.
ANA certain half cycle establish R end by the series arm of the O diode of alternating voltage on base stage, capacitor to the time on the occasion of transition to the transistor base injection current, make the triode rapid triggering output of R end, the output positive pulse be added to before the driving amplifier or the door end, and as supply voltage U
ANIn the time of oppositely, the C of the input of R
2Prepare lower half work through its parallel resistor discharge, when half-wave was born in the interchange of power supply, the S end was input as positive voltage, and its process is held with R, and this moment is voltage pulse output also.That is: at the output output O of O pulse generator spike train.T
1The secondary winding of transformer is by damping resistance R
1, R
2, R
3, R
4Be added to the input of R-S after the dividing potential drop.
P among the figure, N, M are respectively direct current positive-negative power and mid point (following each figure together).
Pulse control circuit shown in Figure 3 is made up of main pulse generator (1), false impulse generator (2), strobe pulse voltage generator (3), strobe pulse voltage generator (4), master control door (5), transistor driving stage (6), output transformer (7) or door (8), (9), differential door (10), (18), (19).(1), (2), (4) are again the flip-over type monostable multivibrator among the figure; (3) be again the flip-over type monostable multivibrator; (6) be the transistor driving stage; (10), the differential door formed by the resistance capacitance differential circuit of (18), (19), (20); Transformer (7) is connected on the collector electrode of driving tube.The O spike train that is produced by zero pulse generator shown in Figure 2 enters the wide strobe pulse of (4) generation pi/2 through master control door (5) PL end, during this pulsewidth, open the storbing gate (CD) of (2), (2) are ready to, the Q of (2) behind differential, form pulse through or door (9) enter (3) and make (3) produce continual Q output voltage gatings (1) to make it to enter continuous strobe state.The master signal of master control door (5) enters the K end, and the pulse behind differential enters or door (9) simultaneously, thereby the storbing gate of (1) is opened.After (1) forms main pulse
Through differential door (20), through the pulse daley that its storbing gate (17) makes (2) produce pi/2, Q
2Output enters behind differential or door (8) to (1), form auxilliary pulse through (1) again so postpone the pulse of pi/2, in (1), synthesize the control impuls row behind main pulse and the auxilliary spike train overlaid, remove to control SCR through driver device (6), transformer (7), make it to do non-impact current and connect.
Sequential chart (shown in Figure 6) from the pulse generation, as can be seen: the control impuls that false impulse produces also can produce pulse again through (2), but because of the strobe pulse that has (4) to produce is a pi/2, therefore the impossible more than generation pulse of recirculation before next O pulse is come, and could continue to produce control impuls by (1) after can only producing strobe pulse by the O pulse, though therefore the closed-loop path is formed in (1), (2), it is strict with the O impulsive synchronization.When the control signal of master control door (5) did not have, the strobe pulse of (4) had stopped, and (2) quit work, and (1) does not form control impuls yet, and all circuit quits work.(4) strobe pulse is wide to be adjusted to
Promptly stop after the output, then can not form the closed circuit of (1), (2) at all, and simple exporting by the O pulse and after assisting impulse summation.Above-mentioned two kinds of adjustment states all can reliably working.
(5) of (1) of pulse control circuit, (2), (3), (4) and pulse protection circuit are MC14538 type integrated circuit; its input is for there being the CD tagger to be storbing gate; wherein (1), (2), (4) are connected into flip-over type again; to guarantee the correct time phase place of pulse; and (3) provide gate voltage in order to produce main pulse, therefore are connected into flip-over type circuit again.(4) be connected into no longer flip-over type circuit, in order that guarantee the strict synchronism of control circuit and the interference of eliminating external circuit to greatest extent.
Driving stage and transformer output-stage circuit as shown in Figure 4, this driving stage is control wave (1.2ms the is wide) power amplification in addition of (1) in the acceptance pattern 3, through transformer T
2Secondary level add to the control utmost point of two SCR of Fig. 1, T
2The primary winding of transformer is received on the collector electrode of driving stage, and transformer has 4 windings; Directly receive winding W on the power supply by resistance
1Be to make magnetic state unshakable in one's determination be in unidirectional extremity, primary winding W
2Have centre tap, put thus through electric capacity and low resistance current-limiting resistance and receive power supply common point M.The collector electrode of one termination driving stage of former winding, the other end is received on the power supply by diode and series resistance thereof.Its two secondary level is received the control utmost point of SCR through resistance, diode and the anti-interference capacitor in parallel with resistance.W behind power connection
1Iron core is magnetized W to a direction
2Mid point electric capacity also be recharged.And as triode B
3B when accepting pulse signal
3Unexpected conducting capacitor C
9Pass through B
4, W
2Second winding discharge, W
3, W
4Because reduce one times to former winding voltage no-load voltage ratio this moment, give cutting edge of a knife or a sword electric current full to the brim, with smooth triggering SCR.As capacitor C
9Discharge makes W
2W when mid-point voltage is lower than supply voltage
2The first half also begins conducting, and when transformer voltage ratio begins to strengthen, the auxiliary winding output current quickens to reduce, so output current is the pulse current with sharp cutting edge of a knife or a sword, helps the triggering of SCR.W
3, W
4String has diode to add the SCR control utmost point to prevent reverse impulse, and the resistance of series connection is used to adjust maximum pulse current value C
10, C
11And parallel resistance reduces and anti-interference usefulness for preventing the SCR puncture voltage.The transformer of An Paiing like this, its magnetic state are extremely jumped extremely to another by one when work, and flux change is bigger, can effectively reduce core volume.
Pulse protection circuit figure shown in Figure 5, the control signal of this circuit is taken among Fig. 3
(in this figure Q
2A), through or (5 ') among Fig. 5 (MC14538) are triggered Q behind the door
5Be electronegative potential, if no control signal input protection circuit or door (12), thief then NAND gate (13) is output as high potential, this current potential is delivered to the master control door (5) (S end) of control circuit Fig. 3, makes master control door (5) permission open-minded, as
［ each of three-phase circuit during pulse
(be Q
2B, Q
2C) add simultaneously or door (21) (5) are exported continuously
Electronegative potential, and NAND gate (13) through or the control signal of door (11) input be high potential, thereby NAND gate (13) is still the output high potential, i.e. S-1.Among three-phase, have one to lack mutually
When (not having the auxilliary pulse of generation) during pulse and having control signal to make whole circuit be in operating state, NAND gate (13) output 0 signal S-O closes master control door (5), and all pulse control circuits are in halted state, the not conducting of silicon controlled member.NAND gate (14) at this moment becomes high potential output, with the state locking of protective circuit, presses reset button (15) and recover the preparation state when no control signal.Provide light indicating signal after the protective circuit action.
Among the pulse sequence figure of Fig. 6, a is the control signal that the added silicon controlled switch of master control door is connected; B is through it (1) formed main pulse of Fig. 3 by the O pulse; C is the gate voltage of figure three they (3) formed consecutive pulses generators (1); D is the strobe pulse ripple of auxilliary pulse generator (2); E is the pulse that (2) produce; F is
Differentiated pulse; G is
The auxilliary pulse that produces through (1); H is the used control impuls of SCR that produces after main pulse, the auxilliary superimposed pulses.
Electronic component of the present utility model all can adopt integrated circuit.
Claims (3)
1, semiconductor switch is used in a kind of power capacitor control, and it is characterized in that: it is to adopt two one-way SCR element SCR
1, SCR
2After reversed polarity was connected in parallel, Z was in parallel with piezo-resistance, and one-way SCR element Be Controlled circuit is controlled, and control circuit produces control impuls respectively when no-voltage and during zero current.
2, semiconductor switch according to claim 1, it is characterized in that: in the control circuit, master control door (5), or door (8), with door (16), main pulse generator (1), transistor driving stage (6), transformer (7) is connected in series, the output of master control door (5) connects the input of strobe pulse voltage generator (4) again, the output of the output of strobe pulse voltage generator (4) and main pulse generator (1) through the differential door be connected to the door (17) two inputs on, be connected in series with door (17) and false impulse generator (2), its output differential door (10) of connecting respectively, (18) be connected on after or door (8), (9) input, or door (9) connect with strobe pulse voltage generator (3), its output be connected on and the other end of (16) on.
3, semiconductor switch according to claim 1 and 2 is characterized in that: protective circuit be by or door (11), (12) NAND gate (13), (14), pulse generator (5 ') and reset button (15) connect to form.When false impulse vacancy that pulse in the control impuls of SCR produces, this circuit produces protection pulse blocking master pulse door.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 93213073 CN2155102Y (en) | 1993-05-20 | 1993-05-20 | Semiconductor switch for power condenser control |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 93213073 CN2155102Y (en) | 1993-05-20 | 1993-05-20 | Semiconductor switch for power condenser control |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN2155102Y true CN2155102Y (en) | 1994-02-02 |
Family
ID=33794247
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 93213073 Expired - Fee Related CN2155102Y (en) | 1993-05-20 | 1993-05-20 | Semiconductor switch for power condenser control |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN2155102Y (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1058821C (en) * | 1995-11-13 | 2000-11-22 | 李恭敢 | Combination solid switch for connecting or disconnecting power capacitor |
-
1993
- 1993-05-20 CN CN 93213073 patent/CN2155102Y/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1058821C (en) * | 1995-11-13 | 2000-11-22 | 李恭敢 | Combination solid switch for connecting or disconnecting power capacitor |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C19 | Lapse of patent right due to non-payment of the annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |