CN215494584U

CN215494584U - IC bus intelligent control device for address allocation

Info

Publication number: CN215494584U
Application number: CN202122283528.2U
Authority: CN
Inventors: 周康; 董岩; 石凯
Original assignee: Beijing China Networking Alliance Technology Co ltd
Current assignee: Beijing China Networking Alliance Technology Co ltd
Priority date: 2021-09-22
Filing date: 2021-09-22
Publication date: 2022-01-11
Anticipated expiration: 2031-09-22

Abstract

The utility model belongs to the technical field of bus control, and discloses an IC bus intelligent control device for address allocation.A control device, a bus coupler and a power conversion device are arranged in a shell, the control device is connected with the bus coupler and the power conversion device through a connecting circuit, a controller and a memory are arranged in the control device, and a voltage converter and a voltage stabilizer which are connected are arranged in the power conversion device; and a power interface and a power switch are embedded on the left side of the shell and are connected with the power conversion device through a connecting circuit. The voltage stabilizer can stabilize the power supply voltage, avoids the damage of devices inside the equipment due to too large voltage fluctuation, can pre-store the address allocation parameters through the memory, can intelligently coordinate and control the address allocation of the whole device through the controller, and can effectively improve the data processing speed and the working efficiency.

Description

IC bus intelligent control device for address allocation

Technical Field

The utility model belongs to the technical field of IC bus intelligent control of address allocation, and particularly relates to an IC bus intelligent control device for address allocation.

Background

Currently, address bus control devices have evolved from the mid-eighties. Over the past decade, bus control technology is considered as a necessary trend of industrial control development due to its great technical advantages, and will gradually replace the traditional control method of PLC point-to-point wiring.

The system is a working platform which integrates the functions of system programming, configuration, maintenance, monitoring and the like by taking a bus technology as a core, taking an intelligent I/O or intelligent sensor and an intelligent instrument based on a bus as a control main body and taking a computer as a monitoring command center.

The technical basis of the bus is a full-digital, bidirectional and multi-station communication system, which is applied to the following components: the industrial bus in the field of computer control has the potential of huge business opportunities due to the field bus, and all large companies worldwide invest considerable manpower, material resources and financial resources to develop and research. The field bus technology is the fierce competition field of the international companies, the process Control system is developed from the fourth generation of DCS to the FCS (Fieldbus Control System) system, a large amount of detection and Control information is collected, processed and used on site, and a plurality of Control functions are moved from a Control room to field devices. Because of international competition of large companies in the field of fieldbus technology, a unified standard is not formed yet, and at present, interconnection in a fieldbus network complies with the 0SI reference model. The existing IC bus device for address allocation has low data processing speed, can not intelligently control the address allocation of a plurality of connected bus devices, and reduces the working efficiency.

Through the above analysis, the problems and defects of the prior art are as follows:

the existing IC bus device for address allocation has low data processing speed, can not intelligently control the address allocation of a plurality of connected bus devices, and reduces the working efficiency.

SUMMERY OF THE UTILITY MODEL

In order to solve the problems in the prior art, the utility model provides an IC bus intelligent control device for address allocation.

The utility model is realized in this way, an IC bus intelligent control device for address allocation is provided with: a housing;

the control device is connected with the bus coupler and the power conversion device through a connecting line, the controller and the memory are arranged in the control device, and the voltage converter and the voltage stabilizer which are connected are arranged in the power conversion device;

the left side of the shell is embedded with a power interface and a power switch, the outer side of the power interface is connected with a power line through a connecting joint, and the power interface and the power switch are connected with a power conversion device through a connecting circuit.

Furthermore, a plurality of bus connection ports are embedded in the side face of the shell, a status indicator lamp is embedded at the upper end of each bus connection port, and the status indicator lamps are connected with the bus connection ports through connecting lines.

Furthermore, the bus coupler is connected with a plurality of bus connection ports through a plurality of paths of parallel data lines, and the plurality of paths of parallel data lines are connected with identification and address pins of the bus coupler.

Further, the voltage stabilizer is connected with a control device through a connecting stranded wire, and the control device is connected with the bus coupler through an IC communication wire.

Furthermore, the IC communication line is an IC bus consisting of a serial clock line and a serial data line.

Furthermore, a plurality of support legs are fixed to the bottom of the shell through screws, and anti-skidding rubber pads are fixed to the bottoms of the support legs.

By combining all the technical schemes, the utility model has the advantages and positive effects that:

the voltage stabilizer can stabilize the power supply voltage, avoids the damage of devices inside the equipment due to too large voltage fluctuation, can pre-store the address allocation parameters through the memory, can intelligently coordinate and control the address allocation of the whole device through the controller, and can effectively improve the data processing speed and the working efficiency. The connection state of the bus connection port can be displayed through the state indicator lamp.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present application, and it is obvious for those skilled in the art that other drawings can be obtained from the drawings without creative efforts.

Fig. 1 is a schematic diagram of an IC bus intelligent control device for address allocation according to an embodiment of the present invention.

FIG. 2 is a schematic diagram of an IC communication line according to an embodiment of the present invention.

Fig. 3 is a schematic structural diagram of a bus connection port according to an embodiment of the present invention.

In the figure: 1. a power switch; 2. a power line; 3. a housing; 4. a power conversion device; 5. a bus coupler; 6. a control device; 7. connecting stranded wires; 8. a plurality of parallel data lines; 9. an IC communication line; 10. a serial clock line; 11. a serial data line; 12. a bus connection port; 13. a status indicator light; 14. a support leg; 15. an antiskid rubber pad.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail with reference to the following embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the utility model and are not intended to limit the utility model.

In view of the problems in the prior art, the present invention provides an IC bus intelligent control device for address allocation, and the present invention is described in detail below with reference to the accompanying drawings.

As shown in fig. 1 to fig. 3, the IC bus intelligent control apparatus for novel address allocation according to an embodiment of the present invention includes: the power supply comprises a power switch 1, a power line 2, a shell 3, a power conversion device 4, a bus coupler 5, a control device 6, a connecting stranded wire 7, a multi-path parallel data line 8, an IC communication line 9, a serial clock line 10, a serial data line 11, a bus connecting port 12 and a status indicator lamp 13.

A control device 6, a bus coupler 5 and a power conversion device 4 are arranged in the shell 3, the control device 6 is connected with the bus coupler 5 and the power conversion device 4 through a connecting line, a controller and a memory are arranged in the control device 6, and a voltage converter and a voltage stabilizer which are connected are arranged in the power conversion device 4; the left side of the shell 1 is embedded with a power interface and a power switch 1, the outer side of the power interface is connected with a power line 2 through a connecting joint, and the power interface and the power switch 1 are connected with a power conversion device 4 through a connecting circuit.

Preferably, a plurality of bus connection ports 12 are fitted to a side surface of the housing 3, a status indicator lamp 13 is fitted to an upper end of each bus connection port 12, and the status indicator lamp 13 is connected to the bus connection port 12 through a connection line. A plurality of support legs 14 are fixed at the bottom of the shell 3 through screws, and anti-skid rubber pads 15 are fixed at the bottoms of the support legs 14.

Preferably, the bus coupler 5 is connected to a plurality of bus connection ports 12 via a plurality of parallel data lines 8, the plurality of parallel data lines 8 being connected to identification and address pins of the bus coupler 5.

Preferably, the voltage stabilizer is connected with the control device through a connecting stranded wire, and the control device is connected with the bus coupler through an IC communication wire.

Preferably, the IC communication line 9 is an IC bus consisting of a serial clock line 10 and a serial data line 11.

When the utility model is used, a plurality of bus connection ports 12 can be connected with a plurality of external bus devices, and the connection state of the bus connection port 12 at the corresponding position can be displayed and viewed through the state indicator lamp 13. Can carry out steady voltage through the stabiliser to supply voltage and handle, avoid voltage fluctuation to cause the damage of the inside device of equipment too greatly, can prestore the setting to the address allocation parameter through the memory, can carry out intelligent coordination control to the address allocation of whole device through the controller, can effectively improve data processing speed and work efficiency.

In the description of the present invention, "a plurality" means two or more unless otherwise specified; the terms "upper", "lower", "left", "right", "inner", "outer", "front", "rear", "head", "tail", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are only for convenience in describing and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, should not be construed as limiting the utility model. Furthermore, the terms "first," "second," "third," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.

The above description is only for the purpose of illustrating the present invention and the appended claims are not to be construed as limiting the scope of the utility model, which is intended to cover all modifications, equivalents and improvements that are within the spirit and scope of the utility model as defined by the appended claims.

Claims

1. An IC bus intelligent control device for address allocation, characterized in that the IC bus intelligent control device for address allocation is provided with:

a housing;

2. The intelligent control device for the IC bus as claimed in claim 1, wherein a plurality of bus connection ports are embedded in the side surface of the housing, and a status indicator lamp is embedded in the upper end of each bus connection port and connected with the bus connection ports through connection lines.

3. The IC bus intelligent control device of claim 2, wherein the bus coupler is connected to the plurality of bus connection ports via a plurality of parallel data lines, the plurality of parallel data lines being connected to identification and address pins of the bus coupler.

4. The IC bus intelligent control device of claim 1, wherein the voltage regulator is connected to the control device via a connection strand, and the control device is connected to the bus coupler via an IC communication line.

5. The IC bus intelligent control device of claim 4, wherein the IC communication line is an IC bus consisting of a serial clock line and a serial data line.

6. The intelligent control device of claim 1, wherein a plurality of support legs are fixed to the bottom of the housing by screws, and anti-skid rubber pads are fixed to the bottoms of the support legs.