CN215452939U

CN215452939U - Radio frequency power amplification circuit and 5G full-band radio frequency signal acquisition equipment

Info

Publication number: CN215452939U
Application number: CN202122033685.8U
Authority: CN
Inventors: 王东锋; 练海文; 阮水生
Original assignee: Shenzhen Qianhai Zhongdian Huian Technology Co ltd
Current assignee: Shenzhen Qianhai Zhongdian Huian Technology Co ltd
Priority date: 2021-08-26
Filing date: 2021-08-26
Publication date: 2022-01-07
Anticipated expiration: 2031-08-26

Abstract

The utility model discloses a radio frequency power amplifying circuit and 5G full-band radio frequency signal acquisition equipment, wherein the radio frequency power amplifying circuit comprises a receiving link and a transmitting link, a central processing module is used for processing signals transmitted by a server and transmitting the signals to a baseband module, the baseband module is used for coding and modulating the signals and transmitting the signals to a receiving and transmitting conversion module, and the signals are transmitted to a terminal through the receiving and transmitting conversion module, a numerical control attenuator, a surface filter, a primary power amplifier, an isolator, a final power amplifier, a first band-pass filter, a first radio frequency connector and a first antenna in sequence; further comprising: and the singlechip is respectively connected with the central processing module and the final power amplifier and is used for switching on the final power amplifier when the central processing module transmits a signal. Therefore, the radio frequency power amplifying circuit can improve the working efficiency and the linearity, reduce the energy consumption and save the cost.

Description

Radio frequency power amplification circuit and 5G full-band radio frequency signal acquisition equipment

Technical Field

The embodiment of the utility model relates to the technical field of communication, in particular to a radio frequency power amplifying circuit and 5G full-band radio frequency signal acquisition equipment.

Background

With the continuous mature development of 5G business, the demand of 5G multiband micro-power information acquisition equipment is gradually clear. At the front end of the transmitting circuit, the modulated signal power is small. In order to obtain a sufficiently large output power, a power amplifier must be used to meet the transmission requirements. The 5G signal has a higher frequency band, so that the signal penetration capability is much lower than that of the 4G signal terminal. The traditional radio frequency power amplifier cannot effectively solve the problem of signal penetration capacity by 5G, and has low working efficiency, poor linearity, large heat productivity and high energy consumption. Therefore, more information acquisition equipment needs to be built to solve the problem of poor signal penetration capability, so that the construction and operation and maintenance costs are greatly increased.

At present, the micro-power mobile phone in the industry acquires multiple devices and obtains better linear indexes by adopting a single-chip power backspacing mode, but the working efficiency of the power amplifier is greatly reduced, the energy consumption is increased, the heat productivity of the devices is large, the heat dissipation area needs to be increased, and therefore the size of the devices is larger.

SUMMERY OF THE UTILITY MODEL

The utility model aims to provide a radio frequency power amplifying circuit and 5G full-band radio frequency signal acquisition equipment so as to improve the working efficiency and linearity of the radio frequency power amplifying circuit, reduce energy consumption and save cost.

To achieve the above object, an embodiment of an aspect of the present invention provides a radio frequency power amplifying circuit, including:

the system comprises a receiving link and a transmitting link, wherein the receiving link is used for transmitting signals from a terminal to a server, and the transmitting link is used for transmitting signals from the server to the terminal; the transmitting link comprises a central processing module, a baseband module, a transmitting-receiving conversion module, a numerical control attenuator, a surface filter, a first-stage power amplifier, an isolator, a final-stage power amplifier, a first band-pass filter, a first radio frequency connector and a first antenna which are sequentially connected, wherein the central processing module is used for processing a signal transmitted by a server and transmitting the signal to the baseband module, the baseband module is used for encoding and modulating the signal and transmitting the signal to the transmitting-receiving conversion module, and the signal is sequentially transmitted to a terminal through the transmitting-receiving conversion module, the numerical control attenuator, the surface filter, the first-stage power amplifier, the isolator, the final-stage power amplifier, the first band-pass filter, the first radio frequency connector and the first antenna;

further comprising: and the singlechip is respectively connected with the central processing module and the final power amplifier and is used for switching on the final power amplifier when the central processing module transmits a signal.

Optionally, the transmission link further includes a first circulator, a first coupler, a power divider, and a power detector, which are connected in sequence, where a first end of the first circulator is connected to the output end of the final power amplifier, a second end of the first circulator is connected to the input end of the first band-pass filter, and a third end of the first circulator is connected to the input end of the first coupler; an output end of the first coupler is connected with a first end of the power divider, and a second end of the power divider is connected with an input end of the power detector; the single chip microcomputer is respectively connected with the output ends of the numerical control attenuator and the power detector, and is used for increasing signal gain through the numerical control attenuator when the signal power detected by the power detector is lower than a preset value; and the digital control attenuator is also used for reducing the signal gain when the signal power detected by the power detector is greater than a preset value.

Optionally, the radio frequency power amplifying circuit further includes: the FPGA chip is respectively connected with the third end of the power divider and the transceiving conversion module, and is used for carrying out digital pre-distortion processing on the signals and transmitting the processed signals to the transceiving conversion module.

Optionally, the final power amplifier comprises a main power amplifier and an auxiliary power amplifier, an input end of the auxiliary power amplifier is connected with a first quarter-wavelength line, and an input end of the main power amplifier is connected with the first quarter-wavelength line; the output end of the main power amplifier is connected with the output end of the auxiliary power amplifier through a second quarter-wave line; the final-stage power amplifier comprises a first control end, a second control end and a power supply end, and the single chip microcomputer is respectively connected with the first control end, the second control end and the power supply end.

Optionally, the receiving link includes a second antenna, a second rf connector, a second band pass filter, a second circulator, a second coupler, a receiving circuit module, a transceiving conversion module, a baseband module, and a central processing module, which are connected in sequence, the terminal transmits a signal, which sequentially passes through the second antenna, the second rf connector, the second band pass filter, the second circulator, the second coupler, the receiving circuit module, the transceiving conversion module, the baseband module, and the central processing module transmits to the server.

Optionally, the first antenna and the second antenna are shared, the first rf connector and the second rf connector are shared, the second band pass filter and the first band pass filter are shared, the first circulator and the second circulator are shared, and the second coupler and the first coupler are shared.

Optionally, the baseband frequency band of the baseband module is one of 758-.

In order to achieve the above object, an embodiment of another aspect of the present invention provides a 5G full-band rf signal acquisition device, including four rf power amplifying circuits as described above;

the baseband module comprises a first connecting end, a second connecting end, a third connecting end and a fourth connecting end, wherein the first connecting end is connected with a first radio-frequency power amplifying circuit, the second connecting end is connected with a second radio-frequency power amplifying circuit, the third connecting end is connected with a third radio-frequency power amplifying circuit, the fourth connecting end is connected with a fourth radio-frequency power amplifying circuit, the first radio-frequency power amplifying circuit is used for amplifying signals with a frequency range of N28, the second radio-frequency power amplifying circuit is used for amplifying signals with a frequency range of N1, the third radio-frequency power amplifying circuit is used for amplifying signals with a frequency range of N41, and the fourth radio-frequency power amplifying circuit is used for amplifying signals with a frequency range of N78.

Optionally, the signal with the frequency band N28 is 758 and 803MHZ signal; the signal with the frequency band of N1 is a signal with 2110-2170 MHZ; the signal with the frequency band of N41 is 2496-2690 MHZ; the signals with the frequency band N78 are signals of 3300-3600 MHz.

Optionally, the second rf power amplifier circuit, the third rf power amplifier circuit, and the fourth rf power amplifier circuit share one transceiver module.

According to the radio frequency power amplifying circuit and the 5G full-band radio frequency signal acquisition equipment provided by the embodiment of the utility model, the radio frequency power amplifying circuit comprises a receiving link and a transmitting link, wherein the receiving link is used for transmitting signals from a terminal to a server, and the transmitting link is used for transmitting signals from the server to the terminal; the transmitting link comprises a central processing module, a baseband module, a transmitting-receiving conversion module, a numerical control attenuator, a surface filter, a first-stage power amplifier, an isolator, a final-stage power amplifier, a first band-pass filter, a first radio frequency connector and a first antenna which are sequentially connected, wherein the central processing module is used for processing a signal transmitted by a server and transmitting the signal to the baseband module, the baseband module is used for encoding and modulating the signal and transmitting the signal to the transmitting-receiving conversion module, and the signal is sequentially transmitted to a terminal through the transmitting-receiving conversion module, the numerical control attenuator, the surface filter, the first-stage power amplifier, the isolator, the final-stage power amplifier, the first band-pass filter, the first radio frequency connector and the first antenna; further comprising: and the singlechip is respectively connected with the central processing module and the final power amplifier and is used for switching on the final power amplifier when the central processing module transmits a signal. Therefore, the radio frequency power amplifying circuit can improve the working efficiency and the linearity, reduce the energy consumption and save the cost.

Drawings

Fig. 1 is a schematic diagram of a radio frequency power amplifying circuit according to an embodiment of the present invention;

fig. 2 is a schematic diagram of an rf power amplifying circuit according to an embodiment of the present invention;

fig. 3 is a schematic diagram of an rf power amplifying circuit according to another embodiment of the present invention;

fig. 4 is a schematic diagram of a final power amplifier in the rf power amplifying circuit according to the embodiment of the present invention;

fig. 5 is a schematic diagram of a radio frequency power amplifying circuit according to yet another embodiment of the present invention;

fig. 6 is a schematic diagram of a radio frequency power amplifying circuit according to yet another embodiment of the present invention;

fig. 7 is a schematic block diagram of a 5G full-band radio frequency signal acquisition device according to an embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the utility model and are not limiting of the utility model. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

Fig. 1 is a schematic diagram of a radio frequency power amplifying circuit according to an embodiment of the present invention. As shown in fig. 1, the rf power amplifying circuit includes:

a receiving link 100 and a transmitting link 200, wherein the receiving link 100 is used for transmitting signals from a terminal 300 to a server 400, and the transmitting link 200 is used for transmitting signals from the server 400 to the terminal 300; wherein, the transmitting link 200 includes a central processing module 10, a baseband module 11, a transceiving conversion module 12, a digitally controlled attenuator 13, a surface filter 14, a first-stage power amplifier 15, an isolator 16, a last-stage power amplifier 17, a first band-pass filter 18, a first radio frequency connector 19 and a first antenna 20, which are connected in sequence, the central processing module 10 is configured to process signals transmitted by the server 400, and transmits the signal to the baseband module 11, the baseband module 11 is configured to code modulate the signal and transmit the signal to the transceiving conversion module 12, the signal is transmitted to a terminal 300 through the transceiving conversion module 12, the digitally controlled attenuator 13, the surface filter 14, the first-stage power amplifier 15, the isolator 16, the final-stage power amplifier 17, the first band-pass filter 18, the first radio frequency connector 19 and the first antenna 20 in sequence;

further comprising: a single chip 21, wherein the single chip 21 is respectively connected to the central processing module 10 and the final power amplifier 17, and is configured to switch on the final power amplifier 17 when the central processing module 10 transmits a signal.

It can be understood that, when the server 400 transmits a signal to the terminal 300, the server 400 transmits the signal, the central processing unit 10 processes the signal and transmits the signal to the baseband module 11, the baseband module 11 performs coding modulation on the signal and transmits the signal to the transceiving conversion module 12, the transceiving conversion module 12 converts the signal from the baseband signal to an analog signal and transmits the signal to the digitally controlled attenuator 13, the digitally controlled attenuator 13 performs gain on the analog signal and transmits the signal after the gain to the surface filter 14, the surface filter 14 filters the signal after the gain and transmits the signal after the filtering to the primary power amplifier 15, the primary power amplifier 15 performs power amplification on the signal after the filtering and transmits the signal after the power amplification to the isolator 16, the isolator 16 isolates the output signal from the input signal and protects the signal, the signal passing through the isolator 16 is transmitted to the final power amplifier 17. It should be noted that the single chip 21 is configured to receive the signal processed by the central processing module 10, and control the power supply of the final power amplifier 17 to be turned on when receiving the signal. Accordingly, the final power amplifier 17 performs power amplification on the signal again, and transmits the signal after power amplification again to the first band-pass filter 18, and the first band-pass filter 18 allows the signal of the designated frequency band to pass through, filters signals of other frequency bands, and finally transmits the signal to the terminal 300 through the first rf connector 19 and the first antenna 20.

The final power amplifier is powered on only when the server 400 has a transmission signal, so that the whole radio frequency power amplifying circuit is more power-saving, energy consumption is saved, and cost is saved.

When the terminal 300 transmits a signal to the server 400, the terminal 300 reaches the server 400 through the reception link 100. The detailed contents of the receiving chain 100 will be explained later.

Optionally, as shown in fig. 2, the transmitting chain 200 further includes a first circulator 22, a first coupler 23, a power divider 24, and a power detector 25, which are connected in sequence, a first end of the first circulator 22 is connected to the output end of the final power amplifier 17, a second end of the first circulator 22 is connected to the input end of the first band-pass filter 18, and a third end of the first circulator 22 is connected to the input end of the first coupler 23; an output end of the first coupler 23 is connected to a first end of the power divider 24, and a second end of the power divider 24 is connected to an input end of the power detector 25; the single chip microcomputer 21 is respectively connected with the output ends of the numerical control attenuator 13 and the power detector 25, and the single chip microcomputer 21 is used for increasing signal gain through the numerical control attenuator 13 when the signal power detected by the power detector 25 is lower than a preset value; and is further configured to reduce the signal gain through the digitally controlled attenuator 13 when the signal power detected by the power detector 25 is greater than a preset value.

That is, after the final power amplifier 17 passes through the first circulator 22, a part of the amplified signal is transmitted to the terminal 300 through the first band-pass filter 18, the first rf connector 19 and the first antenna 20, and the other part of the amplified signal is transmitted to the power divider 24 after being coupled through the first coupler 23, the signal passing through the power divider 24 is transmitted to the power detector 25 for power detection, and the detected power is converted into a voltage signal and transmitted to the single chip 21, and the single chip 21 controls the digital control attenuator 13 to amplify or attenuate the signal according to the voltage signal. For example, a voltage value is prestored in the single chip 21 in advance, the voltage value corresponds to a certain signal power value, when the single chip 21 detects that the voltage value given by the power detector 25 is smaller than the prestored voltage value, it indicates that the power value of the signal amplified by the amplifying circuit does not meet the preset power value, and further the signal to be transmitted needs to be amplified and gained, and the single chip 21 can control the amplification gain multiple of the numerical control attenuator 13 to amplify the signal to be transmitted; when the single chip microcomputer 21 detects that the voltage value given by the power detector 25 is greater than the pre-stored voltage value, it indicates that the power value of the signal amplified by the amplifying circuit exceeds the preset power value, and further the transmitted signal needs to be attenuated by gain attenuation, and the single chip microcomputer 21 can control the amplification gain multiple of the numerical control attenuator 13 to attenuate the transmitted signal; on the transmission chain 200, the transmission is thus carried out with a preset power value that is fulfilled to the effect that the transmission signal is transmitted.

Optionally, as shown in fig. 3, the radio frequency power amplifying circuit further includes: the FPGA chip 26 is connected to the third end of the power divider 24 and the transceiving conversion module 12, and the FPGA chip 26 is configured to perform digital predistortion processing on the signal and transmit the processed signal to the transceiving conversion module 26.

It can be understood that, after the signal amplified by the final power amplifier 17 sequentially passes through the first circulator 22, the first coupler 23 and the power divider 24, a part of the signal output by the power divider 24 is sent to the power detector 25 for power detection, another part of the signal is sent to the FPGA chip 26 through the power divider 24, the FPGA chip 26 decodes the signal and performs digital pre-distortion processing to improve the linearity of the signal, and the signal with good linearity sequentially passes through the conversion of the transceiving conversion module 12, the gain of the numerical control attenuator 13, the filtering of the surface filter 14, the amplification of the primary power amplifier 15, the isolation of the isolator 16, the amplification of the final power amplifier 17, the filtering of the first band-pass filter 18, the first radio frequency connector 19 and the first antenna 20 and is sent to the terminal 300. Making the linearity of the signal ultimately to the terminal 300 better.

Alternatively, as shown in fig. 4, the final power amplifier 17 includes a main power amplifier 171 and an auxiliary power amplifier 172, a first quarter-wavelength line 173 is connected to an input terminal of the auxiliary power amplifier 172, and the first quarter-wavelength line 173 is connected to an input terminal of the main power amplifier 171; the output end of the main power amplifier 171 is connected to the output end of the auxiliary power amplifier 172 through a second quarter-wave line 174; the final power amplifier 17 includes a first control terminal, a second control terminal and a power supply terminal, and the single chip 21 is connected to the first control terminal, the second control terminal and the power supply terminal respectively.

It should be noted that, the first control terminal VGS-C of the main power amplifier 171 of the final power amplifier 17 is connected to the single chip microcomputer 21, the second control terminal VGS-P of the auxiliary power amplifier 172 is connected to the single chip microcomputer 21, the VDS1-C and VDS1-P of the main power amplifier 171 and the VDS2 of the auxiliary power amplifier 172 are both connected to power supply terminals, when the single chip microcomputer 21 receives a signal processed by the central processing module 10, the single chip microcomputer 21 controls the power supply terminal of the final power amplifier 17 to be turned on, and at the same time controls the first control terminal VGS-C of the main power amplifier 171 to access a control signal, so that the main power amplifier 171 operates. When the voltage received by the power detector 25 and received by the single chip 21 is lower than a preset voltage value and the main power amplifier 171 is already working to saturation, the second control terminal VGS-P can be controlled to access the control signal, and the main power amplifier 171 and the auxiliary power amplifier 172 work together, so that the working efficiency can be improved.

The main principle for improving the working efficiency is as follows: the main power amplifier 171 operates in class B or class AB, and the auxiliary power amplifier 172 operates in class C. Instead of working alternately, the main pa 171 is working (working after power-up), and the auxiliary pa 172 is working until the set peak value (this pa is also called peak amp-field). The impedance transformation is performed on the 90 ° first quarter-wave line 174 after the main power amplifier, so as to reduce the impedance of the main power amplifier 171 when the auxiliary power amplifier 172 operates, and ensure that the impedance of the active load formed by the circuit after and when the auxiliary power amplifier 172 operates becomes low, so that the output current of the main power amplifier 171 becomes high. Since the main power amplifier 171 is followed by the first quarter wave line 174, a 90 ° phase shift is also required before the auxiliary power amplifier 172 to connect the first quarter wave line 173 in order to bring the two power amplifier outputs into phase. The main power amplifier 171 operates in class B, and when the input signal is relatively small, only the main power amplifier 171 is in an operating state; when the output voltage of the tube reaches the peak saturation point, the theoretical efficiency can reach 78.5%. If the excitation is doubled at this time, the tube saturates at half the peak and the efficiency reaches a maximum of 78.5%, at which time the auxiliary power amplifier 172 also starts to operate with the main amplifier (class C, threshold set to half the excitation signal voltage). The introduction of the auxiliary power amplifier 172 reduces the load from the perspective of the main power amplifier 171, because the auxiliary power amplifier 172 acts on the load as a negative impedance in series, so that even though the output voltage of the main power amplifier 171 is saturated and constant, the output power continues to increase (the current flowing through the load becomes larger) due to the reduction of the load. When the peak value of the excitation is reached, the auxiliary power amplifier 172 also reaches the maximum point of the efficiency thereof, so that the efficiency of the two power amplifiers together is far higher than that of a single class B power amplifier. The maximum efficiency of a single class B power amplifier, 78.5%, occurs at the peak, and the efficiency of 78.5% now occurs at half the peak. This system architecture achieves high efficiency (maximum output efficiency per amplifier).

Therefore, in the transmission link 200, the control end of the final power amplifier 17 can be controlled by the single chip 21 to control the operation of the final power amplifier 17, so as to improve the working efficiency of the power amplification circuit, and meanwhile, when no transmission signal exists, the power-off of the final power amplifier 17 can be controlled, so as to save energy consumption. In addition, the FPGA chip is used for processing the signals, so that the linearity of the signals is better.

Optionally, as shown in fig. 5, the receiving link 100 includes a second antenna 27, a second radio frequency connector 28, a second band pass filter 29, a second circulator 30, a second coupler 31, a receiving circuit module 32, a transceiving conversion module 12, a baseband module 11, and a central processing module 10, which are connected in sequence, where the terminal 300 transmits a signal, and the signal is transmitted to the server 400 through the second antenna 27, the second radio frequency connector 28, the second band pass filter 29, the second circulator 30, the second coupler 31, the receiving circuit module 32, the transceiving conversion module 12, the baseband module 11, and the central processing module 10 in sequence.

It should be noted that when the terminal 300 sends a signal to the server 400, the signal enters the second band-pass filter 29 through the second antenna 27 and the second rf connector 29, the second band-pass filter 29 processes the signal, only allows signals of a certain frequency band to pass through, signals in other frequency bands are suppressed and then transmitted to the second circulator 30, and after passing through the second circulator 30, the signals are transmitted to the second coupler 31 for coupling, and finally transmitted to the receiving circuit module 32, the receiving circuit module 32 outputs analog signals and then transmits the analog signals to the transceiving conversion module 12, the transceiving conversion module 12 converts the analog signals into baseband signals and transmits the baseband signals to the baseband module 11, the baseband module 11 performs coding modulation on the signals and then transmits the baseband signals to the central processing module 10, and finally the signals are transmitted to the server 400 by the central processing module 10, so that the server 400 receives the signals sent by the terminal 300. Wherein, the receiving circuit module 32 includes a third band-pass filter, a first low-noise amplifier, a fourth band-pass filter and a second low-noise amplifier, and the signal passes through the second antenna 27, the second radio frequency connector 28, the second band-pass filter 29, the second circulator 30, after the second coupler 31, reaches the transceiving conversion module 12 through the third band-pass filter, the first low-noise amplifier, the fourth band-pass filter and the second low-noise amplifier.

Alternatively, as shown in fig. 6, the first antenna 20 and the second antenna 27 are shared, the first rf connector 19 and the second rf connector 27 are shared, the second band-pass filter 29 and the first band-pass filter 18 are shared, the first circulator 22 and the second circulator 30 are shared, and the second coupler 31 and the first coupler 23 are shared.

It should be noted that the operation principle of the power amplifier circuit in this embodiment is the same as that in the foregoing embodiment, and is not described here again. The power amplifying circuit is simplified as a whole through sharing of the devices, and cost is saved.

Optionally, the band-carrying frequency band of the baseband module 11 is one of 758-.

It should be noted that, the mobile radio and television operator 5G frequency band specifically includes: 758-: 2110-2170 MHz; the mobile operator 5G frequency band specifically comprises: 2496 and 2690 MHz; telecommunication UNICOM operator 5G shared frequency band, specific frequency band is: 3300-3600 MHz. Therefore, the power amplification circuit can be suitable for 5G full-frequency-band signal acquisition and transmission.

Fig. 7 is a schematic block diagram of a 5G full-band radio frequency signal acquisition device according to an embodiment of the present invention. As shown in fig. 7, the 5G full-band rf signal acquiring apparatus includes four rf power amplifying circuits as described above;

the baseband module 11 includes a first connection end, a second connection end, a third connection end and a fourth connection end, the first connection end is connected to a first rf power amplifying circuit 001, the second connection end is connected to a second rf power amplifying circuit 002, the third connection end is connected to a third rf power amplifying circuit 003, the fourth connection end is connected to a fourth rf power amplifying circuit 004, the first rf power amplifying circuit 001 is configured to amplify a signal whose frequency band is N28, the second rf power amplifying circuit 002 is configured to amplify a signal whose frequency band is N1, the third rf power amplifying circuit 003 is configured to amplify a signal whose frequency band is N41, and the fourth rf power amplifying circuit 004 is configured to amplify a signal whose frequency band is N78.

Optionally, the second rf power amplifier circuit 002, the third rf power amplifier circuit 003 and the fourth rf power amplifier circuit 004 share one transceiver module.

Currently, the frequency bands for 5G commercial use are respectively: n28, N1, N41, N78. Therefore, the 5G full-band radio frequency signal acquisition equipment has the above 4 frequency bands. The 5G full-band radio frequency signal acquisition equipment has 2 transceiver conversion chips in total. The first transceiving conversion chip 121 modulates the signal of the N28 frequency band, transmits the modulated signal to the N28 radio frequency power amplifier circuit (the first radio frequency power amplifier circuit 001) for amplification, and finally transmits the radio frequency signal through the antenna. The antenna receives the radio frequency signal of the N28 frequency band, and the radio frequency signal is returned to the first transceiving conversion chip 121 for demodulation through the N28 radio frequency amplification circuit (the first radio frequency power amplification circuit 001); the second transceiving conversion chip 122 manages 3 paths of radio frequency power amplification circuits in total, and the frequency bands are respectively: n1, N41 and N78 have the same working principle as N28. 4 frequency channel power amplifiers work independently, and 4 frequency channel antennas are relatively independent, and are small in mutual interference. One frequency band power amplifier is damaged, other frequency bands cannot be affected, and a plurality of frequency band power supplies also work independently. The baseband module 11 may flexibly implement turning off and turning on of the channel according to the working frequency band of the terminal 300. For example, the terminal 300 is turned on when the frequency band N41 is the N41 rf power amplifier (the third rf power amplifier circuit 003), and is turned off when the rf power amplifier circuits in other frequency bands are turned off, so as to further achieve the purpose of saving power. The equipment can realize 5G signal full-band coverage, and can flexibly select the radio frequency power amplifier circuit to work according to an application scene.

The actual working efficiency of a single power amplifier circuit module of the radio frequency power amplifying circuit can reach over 75 percent, and is improved by 25 percent compared with the traditional power amplifier circuit. Under the condition of the same working voltage and current, the circuit is equivalent to a traditional radio frequency power amplifier circuit and has stronger penetrating power and longer transmission distance. And the linear index of the radio frequency power amplifier can be greatly improved by combining a digital predistortion algorithm. The final power amplifier adopts a chip mode to replace a traditional microstrip line circuit, does not need electronic components such as a resistor, a capacitor and the like to carry out impedance matching, reduces the wiring area of a PCB (printed circuit board), and enables the volume of the equipment to be smaller on the whole.

In summary, according to the radio frequency power amplifying circuit and the 5G full-band radio frequency signal acquisition device provided by the embodiment of the present invention, the radio frequency power amplifying circuit includes a receiving link and a transmitting link, the receiving link is used for transmitting a signal from a terminal to a server, and the transmitting link is used for transmitting a signal from the server to the terminal; the transmitting link comprises a central processing module, a baseband module, a transmitting-receiving conversion module, a numerical control attenuator, a surface filter, a first-stage power amplifier, an isolator, a final-stage power amplifier, a first band-pass filter, a first radio frequency connector and a first antenna which are sequentially connected, wherein the central processing module is used for processing a signal transmitted by a server and transmitting the signal to the baseband module, the baseband module is used for encoding and modulating the signal and transmitting the signal to the transmitting-receiving conversion module, and the signal is sequentially transmitted to a terminal through the transmitting-receiving conversion module, the numerical control attenuator, the surface filter, the first-stage power amplifier, the isolator, the final-stage power amplifier, the first band-pass filter, the first radio frequency connector and the first antenna; further comprising: and the singlechip is respectively connected with the central processing module and the final power amplifier and is used for switching on the final power amplifier when the central processing module transmits a signal. Therefore, the radio frequency power amplifying circuit can improve the working efficiency and the linearity, reduce the energy consumption and save the cost.

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the utility model. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A radio frequency power amplification circuit, comprising:

the system comprises a receiving link and a transmitting link, wherein the receiving link is used for transmitting signals from a terminal to a server, and the transmitting link is used for transmitting signals from the server to the terminal;

the transmitting link comprises a central processing module, a baseband module, a transmitting-receiving conversion module, a numerical control attenuator, a surface filter, a first-stage power amplifier, an isolator, a final-stage power amplifier, a first band-pass filter, a first radio frequency connector and a first antenna which are connected in sequence, the central processing module is used for processing a signal transmitted by the server and transmitting the signal to the baseband module, the baseband module is used for encoding and modulating the signal and transmitting the signal to the transmitting-receiving conversion module, and the signal is transmitted to a terminal through the transmitting-receiving conversion module, the numerical control attenuator, the surface filter, the first-stage power amplifier, the isolator, the final-stage power amplifier, the first band-pass filter, the first radio frequency connector and the first antenna in sequence;

2. The rf power amplifying circuit according to claim 1, wherein the transmitting chain further comprises a first circulator, a first coupler, a power divider and a power detector connected in sequence, a first end of the first circulator is connected to the output end of the final power amplifier, a second end of the first circulator is connected to the input end of the first band-pass filter, and a third end of the first circulator is connected to the input end of the first coupler; an output end of the first coupler is connected with a first end of the power divider, and a second end of the power divider is connected with an input end of the power detector; the single chip microcomputer is respectively connected with the output ends of the numerical control attenuator and the power detector, and is used for increasing signal gain through the numerical control attenuator when the signal power detected by the power detector is lower than a preset value; and the digital control attenuator is also used for reducing the signal gain when the signal power detected by the power detector is greater than a preset value.

3. The radio frequency power amplification circuit of claim 2, further comprising: the FPGA chip is respectively connected with the third end of the power divider and the transceiving conversion module, and is used for carrying out digital pre-distortion processing on the signals and transmitting the processed signals to the transceiving conversion module.

4. The rf power amplifier circuit of claim 1, wherein the final power amplifier comprises a main power amplifier and an auxiliary power amplifier, wherein a first quarter-wave line is connected to an input of the auxiliary power amplifier, and wherein the first quarter-wave line is connected to an input of the main power amplifier; the output end of the main power amplifier is connected with the output end of the auxiliary power amplifier through a second quarter-wave line; the final-stage power amplifier comprises a first control end, a second control end and a power supply end, and the single chip microcomputer is respectively connected with the first control end, the second control end and the power supply end.

5. The rf power amplifier circuit according to claim 2, wherein the receiving link comprises a second antenna, a second rf connector, a second band-pass filter, a second circulator, a second coupler, a receiving circuit module, a transceiving conversion module, a baseband module, and a central processing module, which are connected in sequence, and the terminal transmits a signal, which is transmitted to the server via the second antenna, the second rf connector, the second band-pass filter, the second circulator, the second coupler, the receiving circuit module, the transceiving conversion module, the baseband module, and the central processing module in sequence.

6. The radio frequency power amplification circuit of claim 5, wherein the first antenna and the second antenna are common, the first radio frequency connector and the second radio frequency connector are common, the second band pass filter and the first band pass filter are common, the first circulator and the second circulator are common, and the second coupler and the first coupler are common.

7. The RF power amplifier circuit as claimed in claim 1, wherein the baseband module has a band-carrying frequency range of one of 758-.

8. A 5G full band rf signal acquisition device comprising four rf power amplification circuits according to any one of claims 1 to 7;

9. The apparatus of claim 8, wherein the signal with the frequency band N28 is 758-; the signal with the frequency band of N1 is a signal with 2110-2170 MHZ; the signal with the frequency band of N41 is 2496-2690 MHZ; the signals with the frequency band N78 are signals of 3300-3600 MHz.

10. The apparatus of claim 8, wherein the second rf power amplifier circuit, the third rf power amplifier circuit, and the fourth rf power amplifier circuit share a transceiver module.