CN215379281U

CN215379281U - Low and adjustable power of adjusting luminance of no-load power dissipation

Info

Publication number: CN215379281U
Application number: CN202023086835.3U
Authority: CN
Inventors: 肖俊承; 王一龙; 张铁镭; 石从怀
Original assignee: Foshan Yigeer Electronics Co ltd; Eaglerise Electric and Electronic China Co Ltd; Jian Eaglerise Electric Co Ltd
Current assignee: Foshan Yigeer Electronics Co ltd; Eaglerise Electric and Electronic China Co Ltd; Jian Eaglerise Electric Co Ltd
Priority date: 2020-12-17
Filing date: 2020-12-17
Publication date: 2021-12-31
Anticipated expiration: 2030-12-17

Abstract

The utility model discloses a light modulation power supply with low no-load power consumption and adjustable light modulation power supply, which comprises a power supply main circuit, a switch control circuit, a light modulation driving circuit and a light reduction power consumption adjustable circuit, wherein the light reduction power consumption adjustable circuit comprises resistors R2, R6, an optical coupler, voltage regulator tubes ZD1 and ZD2, the power supply main circuit sequentially comprises an input circuit, a transformer T1 and an output circuit from an input end to an output end, the switch control circuit is electrically connected with the input circuit, and the light modulation driving circuit is electrically connected with the switch control circuit. The no-load power consumption is low and can be adjusted by the adjustable dimming power supply, so that the no-load power consumption can be reduced as required in the use process of the dimming power supply; the discharge time of the polar capacitor EC1 can be adjusted by adjusting the resistance value of the resistor R2, so that the no-load power consumption can be adjusted to meet different requirements on no-load voltage.

Description

Low and adjustable power of adjusting luminance of no-load power dissipation

Technical Field

The utility model relates to the field of power supply, in particular to an adjustable dimming power supply with low no-load power consumption.

Background

In the prior art, a common dimming power supply supplies power to a light source load and can perform brightness adjustment control on the brightness of a light source in the light source load, so as to realize illumination with variable brightness. The power consumption also can be produced when the power of adjusting luminance is unloaded, and the no-load power consumption of the power of generally adjusting luminance can reach 0.5W or above, and the no-load power consumption is unadjustable moreover, and the no-load power consumption is uncontrollable promptly, and its no-load power consumption also can increase along with the live time of the power of adjusting luminance increases, has hindered the further promotion of the energy-conserving performance of the power of adjusting luminance greatly.

SUMMERY OF THE UTILITY MODEL

The utility model aims to provide an adjustable dimming power supply with low no-load power consumption, which can reduce the no-load power consumption, and the no-load power consumption can be adjusted, so that the no-load power consumption can be reduced as required in the use process of the dimming power supply.

In order to achieve the purpose, the utility model adopts the following technical scheme:

a light modulation power supply with low no-load power consumption and adjustable power consumption comprises a power supply main circuit, a switch control circuit and a light modulation driving circuit, wherein the power supply main circuit sequentially comprises an input circuit, a transformer T1 and an output circuit from an input end to an output end, the switch control circuit is electrically connected with the input circuit, and the light modulation driving circuit is electrically connected with the switch control circuit;

the no-load power-down adjustable circuit comprises resistors R2 and R6, an optical coupler, voltage-stabilizing tubes ZD1 and ZD2, the output circuit is provided with a polarity capacitor EC1, the anode of the polarity capacitor EC1, one end of a resistor R2 and the cathode of the voltage-stabilizing tube ZD1 are electrically connected with the same-name end of a secondary winding of a transformer T1, the cathode of the polarity capacitor EC1 and the other end of the resistor R2 are electrically connected with the different-name end of the secondary winding of the transformer T1, the anode of the voltage-stabilizing tube ZD1 and the anode of a light-emitting diode U1B in the optical coupler are connected in series through a resistor R6, and the cathode of the light-emitting diode U1B and the different-name end of the secondary winding of the transformer T1 are electrically connected to an SGND end;

the drain electrode of a power MOS tube Q1 of the switch control circuit is electrically connected with the dotted terminal of a primary winding of a transformer T1, the source electrode of the power MOS tube Q1 is electrically connected with the input end of the dimming drive circuit, the grid electrode of the power MOS tube Q1 and the negative electrode of a voltage regulator tube ZD2 are electrically connected with the collector electrode of a phototriode U1A in the optical coupler, and the positive electrode of the voltage regulator tube ZD2 and the emitter electrode of the phototriode U1A are electrically connected with the PGND terminal.

Preferably, the value of the reverse breakdown voltage value of the voltage regulator tube ZD1 is between the no-load voltage value and the actual on-load voltage value of the main circuit of the power supply, and a 10% margin is left for the reverse breakdown voltage value of the voltage regulator tube ZD 1.

Preferably, the input circuit comprises a nonpolar capacitor C1, resistors R1, R3 and a diode D2, the nonpolar capacitor C1, the resistor R1 and the resistor R3 are connected in parallel between an alternating current input port HV and a primary winding of a transformer T1, a non-dotted terminal of the primary winding of the transformer T1 is electrically connected to the alternating current input port HV, an anode of the diode D2 is electrically connected to a dotted terminal of the primary winding of the transformer T1, and the nonpolar capacitor C1, the resistor R1 and the resistor R3 are connected in parallel and then connected in series with a cathode of the diode D2.

Preferably, the output circuit further comprises a diode D1, the anode of the diode D1 is electrically connected with the same-name end of the secondary winding of the transformer T1, and the anode of the polar capacitor EC1 is electrically connected with the cathode of the diode D1.

Preferably, the switch control circuit further includes resistors R4, R5, R7, nonpolar capacitors C2, C3 and a diode D3, one end of the resistor R4 is electrically connected to the ac power input port HV, the other end of the resistor R4 is electrically connected to one end of the resistor R5, one end of the resistor R7, one end of the nonpolar capacitor C3 and the cathode of the diode D3 are electrically connected to the other end of the resistor R5, one end of the nonpolar capacitor C2 is electrically connected to the drain of the power MOS Q1, the other end of the nonpolar capacitor C2 and the anode of the diode D3 are electrically connected to the source of the power MOS Q1, the other end of the resistor R7 is electrically connected to the gate of the power MOS Q1, and the other end of the nonpolar capacitor C3 is electrically connected to the PGND terminal.

Preferably, the dimming driving circuit comprises a dimming driving chip IC1, resistors R8, R9, R10 and a non-polar capacitor C4, wherein one end of the non-polar capacitor C4 is electrically connected to a VCC pin of a dimming driving chip IC1, a VS pin of the dimming driving chip IC1 is electrically connected to a source of a power MOS transistor Q1, the resistors R8, R9 and R10 are connected in series between an ISENSE pin and a PGND terminal of the dimming driving chip IC1, and a PGND pin of the dimming driving chip IC1 is electrically connected to a PGND terminal.

Preferably, the model of the dimming driving chip IC1 is IW 3689.

Preferably, the internal circuit of the dimming driving chip IC1 includes a Bleeder module Bleeder, diodes D4, D5 and switches SW1, SW2 and SW3, an input terminal of the Bleeder module Bleeder is electrically connected to a VS pin of the dimming driving chip IC1, an output terminal of the Bleeder module Bleeder is electrically connected to a PGND pin of the dimming driving chip IC1 through the switch SW1, an anode terminal of the diode D4 is electrically connected to a VS pin of the dimming driving chip IC1 through the switch SW2, a cathode terminal of the diode D4 is electrically connected to a VCC pin of the dimming driving chip IC1, an anode terminal of the diode D5 is electrically connected to an output terminal of the Bleeder module Bleeder, a cathode terminal of the diode D5 is electrically connected to a VCC pin of the dimming driving chip IC1, and an input terminal of the Bleeder module Bleeder is electrically connected to an ISENSE pin of the dimming driving chip IC1 through the switch SW 3.

In the adjustable dimming power supply with low no-load power consumption, the power supply main circuit is used for supplying power to the light source load and adjusting and controlling the brightness of the light source in the light source load, the switch control circuit is used for controlling the on and off of the power supply main circuit (namely power supply control), the dimming driving circuit is used for driving the dimming of the power supply main circuit, and the adjustable no-load power reduction circuit is used for reducing the no-load power consumption and adjusting the no-load power consumption. The duration from the short circuit of the grid of the power MOS transistor Q1 to the PGND is determined by the time when the voltage at two ends of the polar capacitor EC1 falls from the no-load voltage to the voltage below the reverse breakdown voltage of the voltage regulator tube ZD1, the capacitance value of the polar capacitor EC1 is fixed, and the time constant is larger when the resistance value of the resistor R2 is larger, so that the discharge time of the polar capacitor EC1 can be adjusted by adjusting the resistance value of the resistor R2, and the adjustment of the no-load power consumption is realized so as to meet different requirements on the no-load voltage.

Drawings

The drawings are further illustrative of the utility model and the content of the drawings does not constitute any limitation of the utility model.

FIG. 1 is a schematic diagram of a low idle power consumption and adjustable dimming power supply according to an embodiment of the present invention;

FIG. 2 is a schematic diagram of a main circuit of a power supply and a circuit with adjustable no-load drop power consumption according to an embodiment of the present invention;

fig. 3 is a schematic diagram of a dimming driving circuit according to an embodiment of the present invention.

Wherein: a power main circuit 1; a switch control circuit 2; a dimming drive circuit 3; an input circuit 11; a transformer T1; an output circuit 12; and the no-load power-down adjustable circuit 4.

Detailed Description

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.

The technical scheme of the utility model is further explained by the specific implementation mode in combination with the attached drawings.

As shown in fig. 1, the adjustable dimming power supply with low no-load power consumption in this embodiment includes a power supply main circuit 1, a switch control circuit 2, and a dimming driving circuit 3, where the power supply main circuit 1 includes an input circuit 11, a transformer T1, and an output circuit 12 in sequence from an input end to an output end, the switch control circuit 2 is electrically connected to the input circuit 11, and the dimming driving circuit 3 is electrically connected to the switch control circuit 2;

the no-load power-reduction adjustable circuit 4 further comprises an no-load power-reduction adjustable circuit 4, as shown in fig. 2, the no-load power-reduction adjustable circuit 4 comprises resistors R2, R6, an optical coupler and voltage-stabilizing tubes ZD1 and ZD2, the output circuit 12 is provided with a polarity capacitor EC1, the anode of the polarity capacitor EC1, one end of the resistor R2 and the cathode of the voltage-stabilizing tube ZD1 are all electrically connected with the same-name end of a secondary winding of the transformer T1, the cathode of the polarity capacitor EC1 and the other end of the resistor R2 are all electrically connected with the different-name end of the secondary winding of the transformer T1, the anode of the voltage-stabilizing tube ZD1 and the anode of a light-emitting diode U1B in the optical coupler are connected in series through a resistor R6, and the cathode of the light-emitting diode U1B and the different-name end of the secondary winding of the transformer T1 are all electrically connected to an SGND end;

the drain electrode of a power MOS tube Q1 of the switch control circuit 2 is electrically connected with the dotted terminal of a primary winding of a transformer T1, the source electrode of the power MOS tube Q1 is electrically connected with the input end of the dimming drive circuit 3, the grid electrode of the power MOS tube Q1 and the negative electrode of a voltage regulator tube ZD2 are electrically connected with the collector electrode of a phototriode U1A in the optical coupler, and the positive electrode of the voltage regulator tube ZD2 and the emitter electrode of the phototriode U1A are electrically connected with the PGND terminal.

In the adjustable dimming power supply with low no-load power consumption, the power supply main circuit 1 is used for supplying power to a light source load and adjusting and controlling the brightness of a light source in the light source load, the switch control circuit 2 is used for controlling the on and off (namely power supply control) of the power supply main circuit 1, the dimming drive circuit 3 is used for driving the dimming of the power supply main circuit 1, and the adjustable no-load power reduction circuit 4 is used for reducing the no-load power consumption and adjusting the no-load power consumption.

The working principle of reducing the no-load power consumption is as follows: under the condition that the main power circuit 1 is in no-load, the voltage of the polar capacitor EC1 rises due to no load until the voltage rises to a preset no-load voltage, the voltage of the voltage regulator tube ZD1 is subjected to reverse breakdown in the boosting process, so that the voltages at two ends of the voltage regulator tube ZD1 are clamped at a reverse breakdown value, the voltages at two ends of the light emitting diode U1B in the optical coupler are the difference value between the output no-load voltage and the reverse voltage of the voltage regulator tube ZD1, and meanwhile, the resistor R6 with the current limiting function is connected in series to ensure that the light emitting diode U1B is effectively conducted, so that the phototriode U1A is conducted, the grid of the power MOS tube Q1 is short-circuited to the PGND end, the power MOS tube Q1 is turned off, namely, the main power circuit 1 is turned off, and the effect of reducing the no-load power consumption is achieved.

When the voltage at the two ends of the polar capacitor EC1 drops below the reverse breakdown voltage of the voltage regulator tube ZD1 from the no-load voltage, the light emitting diode U1B cannot be driven to be conducted, so that the phototriode U1A is turned off, and the main circuit 1 of the power supply is restarted.

The adjustable working principle of no-load power consumption is as follows: the duration from the short circuit of the grid of the power MOS transistor Q1 to the PGND is determined by the time when the voltage at two ends of the polar capacitor EC1 falls from the no-load voltage to the voltage below the reverse breakdown voltage of the voltage regulator tube ZD1, the capacitance value of the polar capacitor EC1 is fixed, and the time constant is larger when the resistance value of the resistor R2 is larger, so that the discharge time of the polar capacitor EC1 can be adjusted by adjusting the resistance value of the resistor R2, and the adjustment of the no-load power consumption is realized so as to meet different requirements on the no-load voltage.

It is worth to be noted that the value of the reverse breakdown voltage value of the voltage regulator tube ZD1 is between the no-load voltage value and the actual on-load voltage value of the power supply main circuit 1, and a 10% margin is left for the reverse breakdown voltage value of the voltage regulator tube ZD 1. Therefore, the grid of the power MOS tube Q1 is pulled down, which is caused by the fact that the optocoupler is not triggered by mistake to conduct under the normal loading condition, so that the condition that the lamp is flashed or closed is avoided, and the working reliability of the no-load drop power consumption adjustable circuit 4 is improved.

The polar capacitor EC1 is an aluminum electrolytic polar capacitor, and the power MOS tube Q1 is a high-voltage power MOS tube.

Specifically, as shown in fig. 1 and fig. 2, the input circuit 11 includes a non-polar capacitor C1, resistors R1, R3, and a diode D2, the non-polar capacitor C1, the resistor R1, and the resistor R3 are connected in parallel between an ac power input port HV and a primary winding of a transformer T1, a non-dotted terminal of the primary winding of the transformer T1 is electrically connected to the ac power input port HV, an anode of the diode D2 is electrically connected to a dotted terminal of the primary winding of the transformer T1, and the non-polar capacitor C1 is connected in parallel with the resistors R1 and R3 and then connected in series with a cathode of the diode D2. Alternating current input, voltage establishment of an alternating current input port HV, a filtering circuit formed by combining the non-polar capacitor C1 and the resistor R3, and filtering processing is carried out on the input.

Preferably, as shown in fig. 1, the output circuit 12 further includes a diode D1, an anode of the diode D1 is electrically connected to the same-name end of the secondary winding of the transformer T1, and an anode of the polar capacitor EC1 is electrically connected to a cathode of the diode D1. The diode D1 plays a role in rectification and realizes charging of the polar capacitor EC 1.

Further, as shown in fig. 2, the switch control circuit 2 further includes resistors R4, R5, R7, nonpolar capacitors C2, C3, and a diode D3, one end of the resistor R4 is electrically connected to the ac power input port HV, the other end of the resistor R4 is electrically connected to one end of the resistor R5, one end of the resistor R7, one end of the nonpolar capacitor C3, and a cathode of the diode D3 are electrically connected to the other end of the resistor R5, one end of the nonpolar capacitor C2 is electrically connected to a drain of the power MOS transistor Q1, the other end of the nonpolar capacitor C2, and an anode of the diode D3 are electrically connected to a source of the power MOS transistor Q1, the other end of the resistor R7 is electrically connected to a gate of the power MOS transistor Q1, and the other end of the nonpolar capacitor C3 is electrically connected to a PGND end.

Specifically, as shown in fig. 3, the dimming driving circuit 3 includes a dimming driving chip IC1, resistors R8, R9, R10 and a non-polar capacitor C4, one end of the non-polar capacitor C4 is electrically connected to a VCC pin of the dimming driving chip IC1, a VS pin of the dimming driving chip IC1 is electrically connected to a source of the power MOS transistor Q1, the resistors R8, R9 and R10 are connected in series between an ISENSE pin and a PGND terminal of the dimming driving chip IC1, and a PGND pin of the dimming driving chip IC1 is electrically connected to the PGND terminal.

It is noted that the model of the dimming driving chip IC1 is IW 3689.

For example, as shown in fig. 3, the internal circuit of the dimming driving chip IC1 includes a Bleeder module Bleeder, diodes D4, D5, and switches SW1, SW2, and SW3, an input terminal of the Bleeder module Bleeder is electrically connected to a VS pin of the dimming driving chip IC1, an output terminal of the Bleeder module Bleeder is electrically connected to a PGND pin of the dimming driving chip IC1 through the switch SW1, an anode terminal of the diode D4 is electrically connected to a VS pin of the dimming driving chip IC1 through the switch SW2, a cathode terminal of the diode D4 is electrically connected to a VCC pin of the dimming driving chip IC1, an anode terminal of the diode D5 is electrically connected to an output terminal of the Bleeder module Bleeder, a cathode terminal of the diode D5 is electrically connected to a VCC pin of the dimming driving chip IC1, and an input terminal of the Bleeder module IC1 is electrically connected to an ISENSE pin of the dimming driving chip IC 3 through the switch SW 3.

The diode D4 and the switch SW2 constitute a start & Vcc part circuit, and start of the chip is realized.

Under the no-load condition, alternating current is input, the voltage of an alternating current input port HV is established, the grid voltage of a power MOS tube Q1 is charged by an RC circuit consisting of resistors R4, R5 and a nonpolar capacitor C3 and is finally clamped to the voltage (16V) of a voltage regulator ZD2, when the grid of the power MOS tube Q1 is higher than a certain high voltage, because the source potential of the power MOS tube Q1 is low, the power MOS tube Q1 is opened, the interior of a dimming driving chip IC1 utilizes the power MOS tube Q1 to charge a VCC pin of the dimming driving chip IC1 through a Startup & Vcc partial circuit, meanwhile, a Bleeder module Bleeder can also charge the VCC pin of the dimming driving chip IC1, after the voltage reaches 5V, the logic of the dimming driving chip IC1 is activated, and immediately stops continuously charging the VCC pin of the dimming driving chip IC1, under the no-load condition, the pin of the dimming driving chip IC1 is powered down until the VCC driving chip 1 is slowly powered off, then restarting and repeating the steps.

The technical principle of the present invention is described above in connection with specific embodiments. The description is made for the purpose of illustrating the principles of the utility model and should not be construed in any way as limiting the scope of the utility model. Based on the explanations herein, those skilled in the art will be able to conceive of other embodiments of the present invention without inventive effort, which would fall within the scope of the present invention.

Claims

1. The utility model provides a no-load power consumption is low and adjustable power of adjusting luminance, includes power main circuit, on-off control circuit and the drive circuit that adjusts luminance, the power main circuit includes input circuit, transformer T and output circuit from input to output in proper order, on-off control circuit with the input circuit electricity is connected, the drive circuit that adjusts luminance with on-off control circuit electricity is connected, its characterized in that:

the no-load power-down adjustable circuit comprises resistors R2 and R6, an optical coupler, voltage-stabilizing tubes ZD1 and ZD2, the output circuit 12 is provided with a polarity capacitor EC1, the anode of the polarity capacitor EC1, one end of a resistor R2 and the cathode of the voltage-stabilizing tube ZD1 are electrically connected with the dotted terminal of a secondary winding of the transformer T1, the cathode of the polarity capacitor EC1 and the other end of the resistor R2 are electrically connected with the non-dotted terminal of a secondary winding of the transformer T1, the anode of the voltage-stabilizing tube ZD1 and the anode of a light-emitting diode U1B in the optical coupler are connected in series through a resistor R6, and the cathode of the light-emitting diode U1B and the non-dotted terminal of the secondary winding of the transformer T1 are electrically connected to an SGND terminal;

2. The low and adjustable dimming power supply of claim 1, when no load is applied, further comprising: the value of the reverse breakdown voltage value of the voltage-regulator tube ZD1 is between the no-load voltage value and the actual on-load voltage value of the main circuit of the power supply, and a 10% margin is left for the reverse breakdown voltage value of the voltage-regulator tube ZD 1.

3. The low and adjustable dimming power supply of claim 1, when no load is applied, further comprising: the input circuit comprises a nonpolar capacitor C1, resistors R1, R3 and a diode D2, wherein the nonpolar capacitor C1, the resistor R1 and the resistor R3 are connected in parallel between an alternating current input port HV and a primary winding of a transformer T1, a non-dotted terminal of the primary winding of the transformer T1 is electrically connected with the alternating current input port HV, an anode of the diode D2 is electrically connected with a dotted terminal of the primary winding of the transformer T1, and the nonpolar capacitor C1, the resistor R1 and the resistor R3 are connected in parallel and then connected in series with a cathode of the diode D2.

4. The low and adjustable dimming power supply of claim 1, when no load is applied, further comprising: the output circuit further comprises a diode D1, the anode of the diode D1 is electrically connected with the same-name end of the secondary winding of the transformer T1, and the anode of the polar capacitor EC1 is electrically connected with the cathode of the diode D1.

5. The low and adjustable dimming power supply of claim 3, when no load is applied, further comprising: the switch control circuit further comprises resistors R4, R5, R7, a non-polar capacitor C2, C3 and a diode D3, wherein one end of the resistor R4 is electrically connected with an alternating current input port HV, the other end of the resistor R4 is electrically connected with one end of the resistor R5, one end of the resistor R7, one end of the non-polar capacitor C3 and the negative electrode of the diode D3 are electrically connected with the other end of the resistor R5, one end of the non-polar capacitor C2 is electrically connected with the drain of the power MOS transistor Q1, the other end of the non-polar capacitor C2 and the positive electrode of the diode D3 are electrically connected with the source of the power MOS transistor Q1, the other end of the resistor R7 is electrically connected with the gate of the power MOS transistor Q1, and the other end of the non-polar capacitor C3 is electrically connected with the PGND end.

6. The low and adjustable dimming power supply of claim 1, when no load is applied, further comprising:

the dimming driving circuit comprises a dimming driving chip IC1, resistors R8, R9, R10 and a nonpolar capacitor C4, wherein one end of the nonpolar capacitor C4 is electrically connected with a VCC pin of a dimming driving chip IC1, a VS pin of the dimming driving chip IC1 is electrically connected with a source electrode of a power MOS tube Q1, the resistors R8, R9 and R10 are connected between an ISENSE pin and a PGND end of the dimming driving chip IC1 in series, and the PGND pin of the dimming driving chip IC1 is electrically connected with the PGND end.

7. The low and adjustable dimming power supply of claim 6, when no load is applied, further comprising: the model of the dimming driving chip IC1 is IW 3689.

8. The low and adjustable dimming power supply of claim 7, when no load is applied, further comprising: the internal circuit of the dimming driving chip IC1 includes a Bleeder module Bleeder, diodes D4, D5 and switches SW1, SW2, SW3, the input end of the Bleeder module Bleeder is electrically connected to the VS pin of the dimming driving chip IC1, the output end of the Bleeder module Bleeder is electrically connected to the PGND pin of the dimming driving chip IC1 through the switch SW1, the anode of the diode D4 is electrically connected to the VS pin of the dimming driving chip IC1 through the switch SW2, the cathode of the diode D4 is electrically connected to the VCC pin of the dimming driving chip IC1, the anode of the diode D5 is electrically connected to the output end of the Bleeder module Bleeder, the cathode of the diode D5 is electrically connected to the VCC pin of the dimming driving chip IC1, and the input end of the Bleeder module is electrically connected to the ISENSE pin of the dimming driving chip IC1 through the switch SW 3.