CN215300257U - Main/standby power supply switching circuit and embedded processor system - Google Patents
Main/standby power supply switching circuit and embedded processor system Download PDFInfo
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- CN215300257U CN215300257U CN202121094839.8U CN202121094839U CN215300257U CN 215300257 U CN215300257 U CN 215300257U CN 202121094839 U CN202121094839 U CN 202121094839U CN 215300257 U CN215300257 U CN 215300257U
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/30—Systems integrating technologies related to power network operation and communication or information technologies for improving the carbon footprint of the management of residential or tertiary loads, i.e. smart grids as climate change mitigation technology in the buildings sector, including also the last stages of power distribution and the control, monitoring or operating management systems at local level
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
- Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
- Y04S20/00—Management or operation of end-user stationary applications or the last stages of power distribution; Controlling, monitoring or operating thereof
- Y04S20/20—End-user application control systems
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Abstract
The utility model provides a main and standby power supply switching circuit and an embedded processor system, in the main and standby power supply switching circuit, two input ends of a switching control circuit respectively receive a state indication signal of a main power supply and a state indication signal of a standby power supply, and two output ends are respectively correspondingly connected with two control ends of a switching execution circuit; two input ends of the switching control circuit are respectively connected with a main power supply and a standby power supply; the output end of the switching execution circuit is used as the output end of the main power supply switching circuit; and the switching devices in the switching control circuit and the switching execution circuit are transistors, so that the problems of low switching speed, high circuit failure rate, large volume and short service life caused by the fact that a relay is adopted to realize the switching of the main power supply and the standby power supply in the prior art are solved.
Description
Technical Field
The utility model relates to a mains operated technical field, in particular to activestandby power supply switching circuit and embedded processor system.
Background
The block diagram of the main/standby power switching circuit in the prior art is shown in fig. 1, and the main/standby power switching circuit mainly uses two relays J1 and J2 to switch power: when the main power supply V1 fails, the two power supply state indicating signals PG1 and PG2 respectively control the two relays J1 and J2 through the two triodes Q1 and Q2, and the standby power supply V2 is automatically switched to supply power, so that the function of supplying power by the uninterrupted main power supply is realized.
However, the circuit system has the defects of low switching speed, high circuit failure rate, large relay volume and short service life, and when low-voltage and high-current application is required, the switching speed of the relay is too low, so that voltage is instantaneously dropped, a power utilization end is failed or reset and restarted, and the normal work of the power utilization end is influenced.
SUMMERY OF THE UTILITY MODEL
In view of this, the utility model provides a master spare power supply switching circuit and embedded processor system to avoid the switching speed that the relay switching scheme exists slow, circuit fault rate is high, bulky and short service life's problem.
In order to achieve the above object, the embodiment of the present invention provides the following technical solutions:
the utility model discloses the first aspect provides a activestandby power supply switching circuit, include: a switching control circuit and a switching execution circuit; wherein:
a first input end of the switching control circuit receives a state indicating signal of a main power supply, and a second input end of the switching control circuit receives a state indicating signal of a standby power supply;
the first output end of the switching control circuit is connected with the first control end of the switching execution circuit, and the second output end of the switching control circuit is connected with the second control end of the switching execution circuit;
the first input end of the switching execution circuit is connected with the main power supply, and the second input end of the switching control circuit is connected with the standby power supply;
the output end of the switching execution circuit is used as the output end of the main power supply switching circuit;
the switching devices in the switching control circuit and the switching execution circuit are both transistors.
Optionally, a switching device in the switching control circuit is a triode;
and a switching device in the switching execution circuit is an MOS tube.
Optionally, the switching device in the switching execution circuit includes: the first NMOS tube and the second NMOS tube;
the grid electrode of the first NMOS tube is used as a first control end of the switching execution circuit; the drain electrode of the first NMOS tube is used as a first input end of the switching execution circuit and is connected with the main power supply;
the grid electrode of the second NMOS tube is used as a second control end of the switching execution circuit; the drain electrode of the second NMOS tube is used as a second input end of the switching execution circuit and is connected with the standby power supply;
and the source electrode of the first NMOS tube and the source electrode of the second NMOS tube are both connected to the output end of the switching execution circuit.
Optionally, the switching execution circuit further includes: a first capacitor;
the first capacitor is arranged between the output end of the switching execution circuit and the ground.
Optionally, the switching control circuit includes: a first control circuit and a second control circuit;
the input end of the first control circuit is used as the first input end of the switching control circuit and receives a state indicating signal of the main power supply;
the output end of the first control circuit is used as the first output end of the switching control circuit and is connected with the first control end of the switching execution circuit;
the input end of the second control circuit is used as the second input end of the switching control circuit and receives a state indication signal of the standby power supply;
the output end of the second control circuit is used as a second output end of the switching control circuit and is connected with a second control end of the switching execution circuit;
and the power supply end of the first control circuit and the power supply end of the second control circuit are both connected with a driving power supply.
Optionally, the first control circuit includes: the circuit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a first triode, a second triode, a third triode and a fourth triode; wherein:
one end of the first resistor is used as the input end of the first control circuit;
the other end of the first resistor is connected with the base electrode of the first triode;
the collector of the first triode is connected with one end of the third resistor and the base of the second triode through the second resistor;
the other end of the third resistor, the emitter of the second triode and the collector of the third triode are connected, and a connection point is used as a power supply end of the first control circuit and is connected with the driving power supply;
the collector of the second triode, the base of the third triode, the base of the fourth triode and one end of the fourth resistor are all connected;
an emitting electrode of the third triode is connected with an emitting electrode of the fourth triode, and a connection point is used as an output end of the first control circuit;
the emitter of the first triode, the collector of the fourth triode and the other end of the fourth resistor are all grounded;
the first triode and the third triode are NPN type triodes;
the second triode and the fourth triode are PNP type triodes.
Optionally, the second control circuit includes: the circuit comprises a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a fifth triode, a sixth triode, a seventh triode and an eighth triode; wherein:
one end of the fifth resistor is used as the input end of the second control circuit;
the other end of the fifth resistor is connected with the base electrode of the fifth triode;
a collector of the fifth triode is connected with one end of the seventh resistor and a base of the sixth triode through the sixth resistor;
the other end of the seventh resistor, the emitter of the sixth triode and the collector of the seventh triode are connected, and a connection point is used as a power supply end of the second control circuit and is connected with the driving power supply;
a collector of the sixth triode, a base of the seventh triode, a base of the eighth triode and one end of the eighth resistor are all connected;
an emitter of the seventh triode is connected with an emitter of the eighth triode, and a connection point is used as an output end of the second control circuit;
the emitter of the fifth triode, the collector of the eighth triode and the other end of the eighth resistor are all grounded;
the fifth triode and the seventh triode are NPN type triodes;
the sixth triode and the eighth triode are PNP type triodes.
The utility model discloses the second aspect still provides an embedded processor system, include: processor chip, main power supply, stand-by power supply, driving power supply and as the utility model discloses the activestandby power supply switching circuit of any paragraph of the first aspect; wherein:
the main power supply switching circuit and the standby power supply switching circuit are respectively connected with the main power supply, the standby power supply and the driving power supply;
and the output end of the main/standby power supply switching circuit is connected with the power supply end of the processor chip.
Optionally, the main power supply and the standby power supply are both DCDC converters.
The utility model provides a master spare power supply switching circuit, its switching control circuit's first input end receives the state pilot signal of main power supply, and the second input end receives the state pilot signal of stand-by power supply, and first output end links to each other with the first control end of switching execution circuit, and the second output end links to each other with the second control end of switching execution circuit; the first input end of the switching execution circuit is connected with a main power supply, and the second input end of the switching control circuit is connected with a standby power supply; the output end of the switching execution circuit is used as the output end of the main power supply switching circuit; and the switching devices in the switching control circuit and the switching execution circuit are transistors, so that the problems of low switching speed, high circuit failure rate, large volume and short service life caused by the fact that a relay is adopted to realize the switching of the main power supply and the standby power supply in the prior art are solved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a circuit diagram of a main/standby power switching circuit provided in the prior art;
fig. 2 is a schematic structural diagram of a main/standby power switching circuit provided in an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another main/standby power switching circuit provided in an embodiment of the present invention;
fig. 4 is a circuit diagram of a main/standby power switching circuit provided in an embodiment of the present invention;
fig. 5 is a schematic structural diagram of an embedded processor system according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
In the present invention, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The utility model provides a activestandby power supply switching circuit to the switching speed who avoids the relay switching scheme to exist is slow, circuit fault rate is high, bulky and the short problem of life.
Referring to fig. 2, the main/standby power switching circuit includes: a switching control circuit 101 and a switching execution circuit 102; wherein:
the switching control circuit 101 has a first input terminal receiving the status indication signal PG1 of the main power supply V1 and a second input terminal receiving the status indication signal PG2 of the standby power supply V2.
A first output terminal of the switching control circuit 101 is connected to a first control terminal of the switching execution circuit 102, and a second output terminal of the switching control circuit 101 is connected to a second control terminal of the switching execution circuit 102.
The first input terminal of the switching execution circuit 102 is connected to the main power supply V1, and the second input terminal is connected to the backup power supply V2.
The output terminal of the switching execution circuit 102 is used as the output terminal VCC of the main/standby power switching circuit.
The switching devices in the switching control circuit 101 and the switching execution circuit 102 are both transistors.
The transistor can be a triode, a MOSFET, a JFET, an IGBT and the like; it is not limited herein, and is within the scope of the present invention depending on the application environment.
Compared with a relay, a switching device realized by adopting a transistor has the advantages of high switching speed, low circuit fault rate, small volume and long service life, so that the main/standby power supply switching circuit provided by the embodiment avoids the problems of low switching speed, high circuit fault rate, large volume and short service life caused by the fact that the main/standby power supply is switched by adopting the relay in the prior art, and can be widely applied to various low-voltage high-current main/standby power supply systems.
On the basis of the above embodiment, the main/standby power switching circuit preferably has a switching device in the switching control circuit 101 being a triode; and the switching device in the switching execution circuit 102 is a MOS transistor.
Referring specifically to fig. 3, the switching device in the switching execution circuit 102 includes: a first NMOS transistor T1 and a second NMOS transistor T2; wherein:
the gate of the first NMOS transistor T1 serves as a first control terminal of the switch execution circuit 102; the drain of the first NMOS transistor T1 is connected to the main power supply V1 as a first input terminal of the switch execution circuit 102.
The gate of the second NMOS transistor T2 serves as a second control terminal of the switch execution circuit 102; the drain of the second NMOS transistor T2 is connected to the standby power supply V2 as a second input terminal of the switch execution circuit 102.
The source of the first NMOS transistor T1 and the source of the second NMOS transistor T2 are both connected to the output terminal of the switch execution circuit 102.
In practical applications, the switching execution circuit 102 further includes: a first capacitance C1; the first capacitor C1 is disposed between the output terminal of the switch execution circuit 102 and ground.
The presence of the first capacitor C1 enables the switching execution circuit 102 to stably supply the output voltage VCC.
For the rest of the structure and the principle, reference may be made to the above embodiment, which is not described herein again.
On the basis of the previous embodiment, as shown in fig. 3, preferably, the main/standby power switching circuit 101 includes: a first control circuit 201 and a second control circuit 202; wherein:
an input terminal of the first control circuit 201 serves as a first input terminal of the switching control circuit 101, receiving the state indicating signal PG1 of the main power supply V1.
An output terminal of the first control circuit 201 is connected to a first control terminal of the switching execution circuit 102 as a first output terminal of the switching control circuit 101.
An input terminal of the second control circuit 202 serves as a second input terminal of the switching control circuit 101 and receives the status indication signal PG2 of the standby power supply V2.
The output terminal of the second control circuit 202 is connected to the second control terminal of the switching execution circuit 102 as the second output terminal of the switching control circuit 101.
The power source terminal of the first control circuit 201 and the power source terminal of the second control circuit 202 are both connected to the driving power source V3.
Referring specifically to fig. 4, the first control circuit 201 includes: the first resistor R1, the second resistor R2, the third resistor R3, the fourth resistor R4, the first triode Q1, the second triode Q2, the third triode Q3 and the fourth triode Q4; wherein:
one end of the first resistor R1 serves as an input terminal of the first control circuit 201.
The other end of the first resistor R1 is connected to the base of the first transistor Q1.
The collector of the first transistor Q1 is connected to one end of the third resistor R3 and the base of the second transistor Q2 via the second resistor R2.
The other end of the third resistor R3, the emitter of the second transistor Q2, and the collector of the third transistor Q3 are connected, and a connection point is used as a power supply terminal of the first control circuit 201 and is connected to the driving power supply V3.
The collector of the second triode Q2, the base of the third triode Q3, the base of the fourth triode Q4, and one end of the fourth resistor R4 are all connected.
The emitter of the third transistor Q3 is connected to the emitter of the fourth transistor Q4, and the connection point serves as the output terminal of the first control circuit 201.
The emitter of the first transistor Q1, the collector of the fourth transistor Q4, and the other end of the fourth resistor R4 are all grounded.
The first transistor Q1 and the third transistor Q3 are NPN transistors.
The second transistor Q2 and the fourth transistor Q4 are PNP transistors.
Referring specifically to fig. 4, the second control circuit 202 includes: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a fifth triode Q5, a sixth triode Q6, a seventh triode Q7 and an eighth triode Q8; wherein:
one end of the fifth resistor R5 serves as an input terminal of the second control circuit 202.
The other end of the fifth resistor R5 is connected to the base of the fifth transistor Q5.
The collector of the fifth transistor Q5 is connected to one end of the seventh resistor R7 and the base of the sixth transistor Q6 through a sixth resistor R6.
The other end of the seventh resistor R7, the emitter of the sixth transistor Q6, and the collector of the seventh transistor Q7 are connected, and a connection point is used as a power supply terminal of the second control circuit 202 and is connected to the driving power supply V3.
The collector of the sixth triode Q6, the base of the seventh triode Q7, the base of the eighth triode Q8, and one end of the eighth resistor R8 are all connected.
The emitter of the seventh transistor Q7 is connected to the emitter of the eighth transistor Q8, and the connection point serves as the output terminal of the second control circuit 202.
The emitter of the fifth transistor Q5, the collector of the eighth transistor Q8, and the other end of the eighth resistor R8 are all grounded.
The fifth transistor Q5 and the seventh transistor Q7 are NPN transistors.
The sixth transistor Q6 and the eighth transistor Q8 are PNP transistors.
Fig. 4 is a specific alternative of the main/standby power supply switching circuit provided in this embodiment, in which an NMOS field-effect transistor T1/T2 is mainly used to implement switching of a main/standby power supply V1/V2, a transistor Q1/Q2/Q3/Q4 forms a first control circuit 201 for implementing switching of a main power supply V1, and a transistor Q5/Q6/Q7/Q8 forms a second control circuit 202 for implementing switching of a standby power supply V2. The power state indicating signal of the main power supply V1/V2 is output to the switching control circuit 101, the switching control circuit 101 outputs the control signal to the switching execution circuit 102, and the function of switching the main power supply and the standby power supply is realized through the switching execution circuit 102.
The specific working principle is as follows:
the state indicating signal PG1 represents the power state of the main power supply V1, when the main power supply V1 is in good output, the state indicating signal PG1 is in high level, and when the main power supply V1 fails, the state indicating signal PG1 is in low level; similarly, the status indication signal PG2 represents the power state of the standby power V2, and the status logic is consistent with PG1, which is not described again.
When the state indicating signal PG1 is at a high level, the NPN type first transistor Q1 is turned on, so that the base of the PNP type second transistor Q2 is at a low level, and the PNP type second transistor Q2 is turned on; the driving power supply V3 is turned on through the PNP second triode Q2 to drive the base of the NPN third triode Q3 and the base of the PNP fourth triode Q4 to be at a high level, so that the NPN third triode Q3 is turned on, and the PNP fourth triode Q4 is turned off; the driving power supply V3 drives the gate of the first NMOS transistor T1 through the NPN-type third transistor Q3, and the first NMOS transistor T1 is turned on; the main power supply V1 is output to the output terminal VCC of the main power supply switching circuit through the first NMOS transistor T1. The control logic of the state indicating signal PG2 of the standby power supply V2 is the same, when the main power supply V1 is abnormal, the state indicating signal PG2 is at a high level, the NPN-type fifth triode Q5 is turned on, so that the base of the PNP-type sixth triode Q6 is at a low level, and the PNP-type sixth triode Q6 is turned on; the driving power supply V3 is turned on through the PNP type sixth triode Q6 to drive the base of the NPN type seventh triode Q7 and the base of the PNP type eighth triode Q8 to be at a high level, so that the NPN type seventh triode Q7 is turned on, and the PNP type eighth triode Q8 is turned off; the driving power supply V3 drives the gate of the second NMOS transistor T2 through an NPN-type seventh transistor Q7, and the second NMOS transistor T2 is turned on; the standby power supply V2 is output to the output terminal VCC of the main power supply switching circuit through the second NMOS transistor T2.
When the main power supply V1 is abnormal and the state indicating signal PG1 is at a low level, the NPN-type first triode Q1 is turned off, and the base of the PNP-type second triode Q2 is kept at a high level due to the pull-up action of the third resistor R3, so that the NPN-type first triode Q1 is turned off; the base electrode of the NPN type third triode Q3 is kept at a low level due to the pull-down action of the fourth resistor R4, and the NPN type third triode Q3 is also cut off; meanwhile, the base electrode of the PNP-type fourth triode Q4 is at a low level due to the pull-down of the fourth resistor R4, and the PNP-type fourth triode Q4 is turned on, so that high-level charges accumulated on the gate of the first NMOS transistor T1 are quickly discharged through the PNP-type fourth triode Q4; the first NMOS transistor T1 is turned off rapidly, thereby achieving the purpose of avoiding the influence of the main power supply V1 on VCC.
When the main power supply V1 is abnormal, the standby power supply V2 switches the control circuit 101 to make the second NMOS transistor T2 turn on quickly, so as to keep VCC supplying power continuously.
It is understood that, in practical applications, there are other embodiments, such as a filter circuit may be provided for some circuit elements, and for example, the first transistor Q1 and the fifth transistor Q5 may also be NMOS transistors in other embodiments, and so on. The utility model relates to a technical scheme in the design and conception scope all is in the utility model discloses the within range that will protect.
The analysis shows that the embodiment realizes the switching of the main power supply and the standby power supply by adopting the NMOS tube and the triode control circuit, can be applied to a power supply system of the main power supply and the standby power supply of the embedded processor, and solves the problems of low switching speed, short service life, high failure rate and overlarge volume of the conventional relay switching circuit. The circuit has the advantages of small volume, simplicity, high efficiency, high switching speed, long service life and low failure rate, and can be widely applied to various low-voltage high-current main and standby power supply systems.
Another embodiment of the present invention further provides an embedded processor system, see fig. 5, including: a processor chip 200, a main power supply V1, a standby power supply V2, a driving power supply V3, and the main/standby power supply switching circuit 100 according to any one of the embodiments; wherein:
the main power supply switching circuit 100 is connected to a main power supply V1, a standby power supply V2, and a drive power supply V3, respectively.
In practical applications, the embedded processor system may further be provided with a corresponding detection module for acquiring the state indication signals PG1 and PG2, and the specific configuration thereof is similar to that of the prior art system, which is not described herein again.
Moreover, the structure and principle of the main/standby power switching circuit 100 can also refer to the above embodiments, and are not described herein again.
The output terminal of the main/standby power switching circuit 100 is connected to the power supply terminal of the processor chip 200 to provide uninterrupted power supply for the processor chip 200.
In practical applications, the main power source V1 and the standby power source V2 may be both DCDC converters (Direct current-Direct current converter), which is only an example and not limited thereto, and may be determined according to the specific application environment, and all are within the scope of the present invention.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, the system or system embodiments are substantially similar to the method embodiments and therefore are described in a relatively simple manner, and reference may be made to some of the descriptions of the method embodiments for related points. The above-described system and system embodiments are only illustrative, wherein the units described as separate parts may or may not be physically separate, and the parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the above description of the disclosed embodiments, the features described in the embodiments may be interchanged or combined with each other to enable those skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (9)
1. A main/standby power supply switching circuit, comprising: a switching control circuit and a switching execution circuit; wherein:
a first input end of the switching control circuit receives a state indicating signal of a main power supply, and a second input end of the switching control circuit receives a state indicating signal of a standby power supply;
the first output end of the switching control circuit is connected with the first control end of the switching execution circuit, and the second output end of the switching control circuit is connected with the second control end of the switching execution circuit;
the first input end of the switching execution circuit is connected with the main power supply, and the second input end of the switching control circuit is connected with the standby power supply;
the output end of the switching execution circuit is used as the output end of the main power supply switching circuit;
the switching devices in the switching control circuit and the switching execution circuit are both transistors.
2. The main/standby power switching circuit according to claim 1, wherein the switching device in the switching control circuit is a triode;
and a switching device in the switching execution circuit is an MOS tube.
3. The main/standby power supply switching circuit according to claim 2, wherein the switching device in the switching execution circuit includes: the first NMOS tube and the second NMOS tube;
the grid electrode of the first NMOS tube is used as a first control end of the switching execution circuit; the drain electrode of the first NMOS tube is used as a first input end of the switching execution circuit and is connected with the main power supply;
the grid electrode of the second NMOS tube is used as a second control end of the switching execution circuit; the drain electrode of the second NMOS tube is used as a second input end of the switching execution circuit and is connected with the standby power supply;
and the source electrode of the first NMOS tube and the source electrode of the second NMOS tube are both connected to the output end of the switching execution circuit.
4. The main/standby power supply switching circuit according to claim 3, wherein the switching execution circuit further comprises: a first capacitor;
the first capacitor is arranged between the output end of the switching execution circuit and the ground.
5. The main/standby power switching circuit according to any one of claims 1 to 4, wherein the switching control circuit includes: a first control circuit and a second control circuit;
the input end of the first control circuit is used as the first input end of the switching control circuit and receives a state indicating signal of the main power supply;
the output end of the first control circuit is used as the first output end of the switching control circuit and is connected with the first control end of the switching execution circuit;
the input end of the second control circuit is used as the second input end of the switching control circuit and receives a state indication signal of the standby power supply;
the output end of the second control circuit is used as a second output end of the switching control circuit and is connected with a second control end of the switching execution circuit;
and the power supply end of the first control circuit and the power supply end of the second control circuit are both connected with a driving power supply.
6. The main/standby power switching circuit according to claim 5, wherein the first control circuit comprises: the circuit comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a first triode, a second triode, a third triode and a fourth triode; wherein:
one end of the first resistor is used as the input end of the first control circuit;
the other end of the first resistor is connected with the base electrode of the first triode;
the collector of the first triode is connected with one end of the third resistor and the base of the second triode through the second resistor;
the other end of the third resistor, the emitter of the second triode and the collector of the third triode are connected, and a connection point is used as a power supply end of the first control circuit and is connected with the driving power supply;
the collector of the second triode, the base of the third triode, the base of the fourth triode and one end of the fourth resistor are all connected;
an emitting electrode of the third triode is connected with an emitting electrode of the fourth triode, and a connection point is used as an output end of the first control circuit;
the emitter of the first triode, the collector of the fourth triode and the other end of the fourth resistor are all grounded;
the first triode and the third triode are NPN type triodes;
the second triode and the fourth triode are PNP type triodes.
7. The main/standby power switching circuit according to claim 5, wherein the second control circuit comprises: the circuit comprises a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a fifth triode, a sixth triode, a seventh triode and an eighth triode; wherein:
one end of the fifth resistor is used as the input end of the second control circuit;
the other end of the fifth resistor is connected with the base electrode of the fifth triode;
a collector of the fifth triode is connected with one end of the seventh resistor and a base of the sixth triode through the sixth resistor;
the other end of the seventh resistor, the emitter of the sixth triode and the collector of the seventh triode are connected, and a connection point is used as a power supply end of the second control circuit and is connected with the driving power supply;
a collector of the sixth triode, a base of the seventh triode, a base of the eighth triode and one end of the eighth resistor are all connected;
an emitter of the seventh triode is connected with an emitter of the eighth triode, and a connection point is used as an output end of the second control circuit;
the emitter of the fifth triode, the collector of the eighth triode and the other end of the eighth resistor are all grounded;
the fifth triode and the seventh triode are NPN type triodes;
the sixth triode and the eighth triode are PNP type triodes.
8. An embedded processor system, comprising: a processor chip, a main power supply, a standby power supply, a driving power supply and the main/standby power supply switching circuit according to any one of claims 1 to 7; wherein:
the main power supply switching circuit and the standby power supply switching circuit are respectively connected with the main power supply, the standby power supply and the driving power supply;
and the output end of the main/standby power supply switching circuit is connected with the power supply end of the processor chip.
9. The embedded processor system of claim 8, wherein the primary power source and the backup power source are both DCDC converters.
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| CN202121094839.8U CN215300257U (en) | 2021-05-20 | 2021-05-20 | Main/standby power supply switching circuit and embedded processor system |
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| CN202121094839.8U CN215300257U (en) | 2021-05-20 | 2021-05-20 | Main/standby power supply switching circuit and embedded processor system |
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