CN215186470U

CN215186470U - Control circuit for improving PG signal time sequence

Info

Publication number: CN215186470U
Application number: CN202121099059.2U
Authority: CN
Inventors: 吴文力; 刘俊
Original assignee: Shenzhen Ruihan Technology Co ltd
Current assignee: Shenzhen Ruihan Technology Co ltd
Priority date: 2021-05-21
Filing date: 2021-05-21
Publication date: 2021-12-14
Anticipated expiration: 2031-05-21

Abstract

The utility model discloses an improve PG signal sequential control circuit, the alternating current becomes stable direct current output voltage VOUT through rectification filtering behind the bridge rectifier diode BR to transformer T, the alternating current becomes stable direct current output voltage VOUT through resistance capacitance voltage stabilization after diode D1 and D2 again, four-terminal photoelectric coupler N of connection behind three-terminal adjustable reposition of redundant personnel reference voltage source U1, four-terminal photoelectric coupler N's 4 ends connect the VCCS end behind resistance R7. The utility model discloses a detect square wave voltage on the secondary side rectifier tube, through rectification filter circuit, convert to more stable DC voltage, the power is when frequent power-on and power-off like this, only when the secondary side rectifier tube is normal during operation, the PG signal just can be established after the output is normally established like this to when having solved the unloaded frequent power-on and power-off, the problem that the PG signal restarted.

Description

Control circuit for improving PG signal time sequence

Technical Field

The utility model relates to an improve PG signal sequential control circuit.

Background

With the development of switching power supply technology, various switching power supplies are applied more and more widely in the market, and in order to make the power supplies and application systems better fit, most power supplies are provided with PG (power good) signals, wherein the PG signals are logic of direct current output voltage detection signals and alternating current input voltage detection signals and are compatible with TTL signals. It has strict time sequence requirement and can effectively reflect the input and output states of power supply. The existing software technical scheme is complex, a single chip microcomputer is required to be added to control the time sequence, the cost is high, and the software is generally rarely adopted. The existing hardware technology timing scheme usually detects the input and output voltage, and then performs proper time delay, and the PG signal is turned on only when the output voltage reaches a certain threshold value.

As shown in fig. 1, a signal diagram of a conventional circuit in an electronic oscilloscope is shown, in the diagram, a line b is a waveform diagram of a PG signal, and a line a is a waveform diagram of an output voltage of 12V. In fig. 1, when the power supply is turned on and off frequently, the PG signal will have a restart action, which may cause an abnormal operation on the system side.

Therefore, in the existing hardware technical scheme, when the power supply outputs in a no-load mode and the power supply inputs are frequently powered on and powered off, the PG signal is easy to malfunction, and the system end is abnormal.

SUMMERY OF THE UTILITY MODEL

The to-be-solved technical problem of the present invention is to overcome the above technical defect, and to provide an improved PG signal timing control circuit.

In order to achieve the purpose, the utility model adopts the following technical scheme:

a timing control circuit for improving PG signal is prepared as connecting AC to transformer T after AC is passed through bridge rectifier diode BR, rectifying and filtering to obtain stable DC output voltage VOUT after transformer T is transformed, connecting AC to four-terminal photoelectric coupler N through three-terminal adjustable shunt reference voltage source U1 after AC is passed through diode D1 and diode D2, connecting 4 terminal of four-terminal photoelectric coupler N to VCCS terminal through resistor R7, connecting VCCS terminal to 5 terminal of operational amplifier NA, connecting VCCS terminal to REF5V terminal through resistor R19, connecting REF5V terminal to 3 terminal of operational amplifier through resistor R14, connecting 7 terminal of transformer T to 4 terminal of operational amplifier NA through diode D6 and resistor R15, grounding 2 terminal of operational amplifier NA, connecting 1 terminal of operational amplifier NA to 3 terminal of operational amplifier NA through resistor R13, connecting 1 terminal of operational amplifier to 1 terminal of operational amplifier Q2 through diode D5 and triode R8, the 4 end of the four-end photoelectric photocoupler N is connected with the 1 end of a triode Q3 after passing through a resistor R17, the 4 end of the four-end photoelectric photocoupler N is grounded after passing through a resistor R17 and parallel capacitors C8 and R18, the 2 end of a triode Q3 is grounded, the 3 end of a triode Q3 is connected with the 4 end of an operational amplifier NA, a diode D6 is grounded after passing through a capacitor C7, and a diode D6 is grounded after passing through a resistor R15 and a resistor R16; the VCCS terminal is grounded through a capacitor C10.

As a preferred scheme, the 3 terminal of the four-terminal photoelectric photocoupler N is grounded, the 4 terminal of the four-terminal photoelectric photocoupler N is grounded after passing through a diode D4 and a resistor R8 and then is connected to the 1 terminal of a triode Q2, the resistor R8 is grounded after passing through a resistor R9, the 2 terminal of a triode Q2 is grounded, the 3 terminal of a triode Q2 is connected to the voltage transformed by the transformer T after passing through a resistor R10 and then is connected to the voltage transformed by the transformer T, the 3 terminal of a triode Q2 is connected to the 2 terminal of a three-terminal adjustable shunt reference voltage source U2, the 3 terminal of a triode Q2 is connected to a PG signal detection terminal, the voltage transformed by the transformer T is connected to the 2 terminal of a three-terminal adjustable shunt reference voltage source U2 after passing through a resistor R10, the 1 terminal of a three-terminal adjustable shunt reference voltage source U2 is connected to a PG signal detection terminal after passing through a resistor R11, the 1 terminal of the three-terminal of the adjustable shunt reference voltage source U588 is grounded, the 3 terminal of the adjustable shunt reference voltage source U2 is grounded, and the 3 terminal of a triode Q2 is grounded after passing through a capacitor C11.

As a preferable scheme, the VCCS terminal is connected to the 2 terminal of the three-terminal adjustable shunt reference voltage source U3 through a resistor R19, the 1 terminal of the three-terminal adjustable shunt reference voltage source U3 is connected to the REF5V terminal through a resistor R20, the 1 terminal of the three-terminal adjustable shunt reference voltage source U3 is connected to a resistor R21 and a capacitor C12 connected in parallel and then grounded, and the 3 terminal of the three-terminal adjustable shunt reference voltage source U3 is grounded.

As a preferable scheme, the 1 end of the three-end adjustable shunt reference voltage source U1 is grounded through a capacitor C4, the 1 end of the three-end adjustable shunt reference voltage source U1 is connected with a diode D1 and a diode D2 through a resistor R4, a resistor R3, a resistor R2 and a resistor R1, the resistor R2 is grounded through a capacitor C2, and the resistor R3 is grounded through a capacitor C3.

As a preferable scheme, the 1 end of the four-terminal photoelectric photocoupler N is connected to the VCCP end through a resistor R6, the 1 end of the four-terminal photoelectric photocoupler N is connected to the 2 end of the three-terminal adjustable shunt reference voltage source U1 through a resistor R5, the 2 end of the four-terminal photoelectric photocoupler N is connected to the 2 end of the three-terminal adjustable shunt reference voltage source U1, and the 3 end of the three-terminal adjustable shunt reference voltage source U1 is grounded.

Preferably, the negative terminal of the bridge rectifier diode BR is grounded, the positive terminal of the bridge rectifier diode BR is grounded through a capacitor C1, the positive terminal of the bridge rectifier diode BR is connected with the 6 terminal of the transformer T, the 4 terminal of the transformer T is connected with the 2 terminal of the transistor Q1, the 3 terminal of the field effect transistor Q1 is grounded, the 1 terminal of the field effect transistor Q1 is connected with the square wave power supply voltage, the 10 terminal of the transformer T is grounded through a capacitor C5, the 10 terminal of the transformer T outputs voltage through an inductor L6, the 10 terminal of the transformer T is grounded through an inductor L6 and a capacitor C6, and the 7 terminal of the transformer T is grounded through a rectifier D3.

The utility model discloses a detect the square wave voltage on the secondary side rectifier tube, through rectification filter circuit, convert to more stable DC voltage, the power is when frequent power-on and power-off like this, only when the secondary side rectifier tube is normal during operation, the PG signal just can be established, just can establish after the PG signal is normal to be established in the output like this. Therefore, the problem that the PG signal is restarted when no-load frequent power-on and power-off is solved.

Drawings

FIG. 1 is a diagram of PG signals in a conventional circuit.

Fig. 2 is a circuit structure diagram of the present invention.

Fig. 3 is a PG signal diagram after the circuit structure of the present invention is adopted.

Detailed Description

Referring to fig. 2, as shown in the figure, in the timing control circuit for improving PG signal, ac power is transformed into pulsating dc power by a bridge rectifier diode BR and then is transmitted to a transformer T, the transformer T is transformed into stable dc output voltage VOUT by rectification and filtering, the ac power passes through a diode D1 and a diode D2, then passes through a resistor and a capacitor, then passes through a three-terminal adjustable shunt reference voltage source U1 and then is connected to a four-terminal photoelectric photocoupler N, a 4 terminal of the four-terminal photoelectric photocoupler N passes through a resistor R7 and then is connected to a VCCS terminal, the VCCS terminal is connected to a 5 terminal of an operational amplifier NA, the VCCS terminal passes through a resistor R19 and then is connected to a REF5V terminal, the REF5V terminal passes through a resistor R14 and then is connected to a 3 terminal of the operational amplifier, a 7 terminal of the transformer T passes through a diode D6 and a resistor R15 and then is connected to a 4 terminal of the operational amplifier NA, a 2 terminal of the operational amplifier NA is grounded, a 1 terminal of the operational amplifier NA passes through a resistor R13 and then is connected to a 3 terminal of the operational amplifier, the 1 end of the operational amplifier is connected with the 1 end of a triode Q2 after passing through a diode D5 and a resistor R8, the 4 end of a four-end photoelectric coupler N is connected with the 1 end of the triode Q3 after passing through a resistor R17, the 4 end of the four-end photoelectric coupler N is grounded after passing through a resistor R17 and parallel capacitors C8 and R18, the 2 end of the triode Q3 is grounded, the 3 end of the triode Q3 is connected with the 4 end of the operational amplifier NA, a diode D6 is grounded after passing through a capacitor C7, and a diode D6 is grounded after passing through a resistor R15 and a resistor R16; the VCCS terminal is grounded through a capacitor C10.

In this embodiment, the 3 terminal of the four-terminal photoelectric photocoupler N is grounded, the 4 terminal of the four-terminal photoelectric photocoupler N is grounded through the diode D4 and the resistor R8 and then connected to the 1 terminal of the transistor Q2, the resistor R8 is grounded through the resistor R9, the 2 terminal of the transistor Q2 is grounded, the 3 terminal of the transistor Q2 is connected to the voltage VOUT after the transformation by the transformer T through the resistor R10, the 3 terminal of the transistor Q2 is connected to the 2 terminal of the three-terminal adjustable shunt reference voltage source U2, the 3 terminal of the transistor Q2 is connected to the PG signal detection terminal, the voltage VOUT after the transformation by the transformer T is connected to the 2 terminal of the three-terminal adjustable shunt reference voltage source U2 through the resistor R10, the 1 terminal of the three-terminal adjustable shunt reference voltage source U2 is connected to the PG signal detection terminal through the resistor R11, the 1 terminal of the three-terminal adjustable shunt reference voltage source U2 is grounded through the three-terminal resistor R12, the 3 terminal of the adjustable shunt reference voltage source U2 is grounded, and the 3 terminal of the transistor Q2 is grounded through the capacitor C11.

In this embodiment, the VCCS terminal is connected to the 2 terminal of the three-terminal adjustable shunt reference voltage source U3 through the resistor R19, the 1 terminal of the three-terminal adjustable shunt reference voltage source U3 is connected to the REF5V terminal through the resistor R20, the 1 terminal of the three-terminal adjustable shunt reference voltage source U3 is connected to the resistor R21 and the capacitor C12 connected in parallel and then grounded, and the 3 terminal of the three-terminal adjustable shunt reference voltage source U3 is grounded.

In this embodiment, the 1 terminal of the three-terminal adjustable shunt reference voltage source U1 is grounded through the capacitor C4, the 1 terminal of the three-terminal adjustable shunt reference voltage source U1 is connected to the diode D1 and the diode D2 through the resistor R4, the resistor R3, the resistor R2, and the resistor R1, the resistor R2 is grounded through the capacitor C2, and the resistor R3 is grounded through the capacitor C3.

In this embodiment, the 1 end of the four-terminal photoelectric photocoupler N is connected to the VCCP end through the resistor R6, the 1 end of the four-terminal photoelectric photocoupler N is connected to the 2 end of the three-terminal adjustable shunt reference voltage source U1 through the resistor R5, the 2 end of the four-terminal photoelectric photocoupler N is connected to the 2 end of the three-terminal adjustable shunt reference voltage source U1, and the 3 end of the three-terminal adjustable shunt reference voltage source U1 is grounded.

In this embodiment, the negative terminal of the bridge rectifier diode BR is grounded, the positive terminal of the bridge rectifier diode BR is grounded after passing through the capacitor C1, the positive terminal of the bridge rectifier diode BR is connected to the 6 terminal of the transformer T, the 4 terminal of the transformer T is connected to the field and is connected to the 2 terminal of the transistor Q1, the 3 terminal of the field effect transistor Q1 is grounded, the 1 terminal of the field effect transistor Q1 is connected to the square wave power voltage, the field effect transistor Q1 is driven to be conducted by the square wave power voltage, the 10 terminal of the transformer T is grounded after passing through the capacitor C5, the 10 terminal of the transformer T outputs the voltage VOUT through the inductor L6, the voltage output after passing through the transformer is 12V, the 10 terminal of the transformer T is grounded after passing through the inductor L6 and the capacitor C6, and the 7 terminal of the transformer T is grounded after passing through the rectifier tube D3.

The voltage of the rectifying tube D3 is rectified by the diode D6, filtered, and converted into a relatively flat dc voltage, and the rectified voltage is divided by the resistors R15 and R16 and input to the inverting input terminal 4 of the operational amplifier NA to be compared with the reference voltage 3.

When the power supply input is powered off, the four-terminal photoelectric coupler N is not conducted, 4 pins of the four-terminal photoelectric coupler N output high levels, the voltage of the 4 pins of the operational amplifier NA is pulled down and discharged, and when the input is powered on again, the voltage of the 4 pins of the operational amplifier NA is charged again to play a role in delaying.

The voltage on the rectifying tube D3 is rectified by a diode D6, and is filtered by a capacitor to be changed into a smoother direct-current voltage, the voltage on the rectifying tube D3 is higher, the voltage-withstanding value of the diode D6 needs to be higher, 4.7uF is selected for the charging capacitor C7 to ensure enough charging time, the output voltage starts to be established after the input is electrified, the voltage of the 4 pin of the operational amplifier NA starts to be charged slowly due to the existence of a capacitor C7, so that the output of the operational amplifier keeps high level to protect the PG signal from overturning, and after the voltage of the 4 pin of the operational amplifier NA exceeds the reference voltage, the operational amplifier NA outputs low level, the protection signal is released, and PG is normally established. When the power is input and is off, the 4 pins of the four-terminal photoelectric coupler N output high level, and the 4 pins of the operational amplifier NA are pulled down to discharge immediately so as to prepare for the next startup delay.

Please refer to fig. 3, in order to adopt the signal diagram of the electronic oscilloscope behind the circuit of the present invention, the d line in the diagram is the waveform diagram of the PG signal, and the c line is the waveform diagram of the 12V output voltage, as shown in the figure, after adopting the circuit of the present invention, the power supply outputs in no-load, when the input powers on and off frequently, PG will be output, fixed delay is re-established for a certain time, there is no phenomenon of false action.

In the traditional circuit, when a power supply is frequently turned on and off in a no-load mode, the output voltage is slowly discharged, the input is electrified in the discharging process of the output voltage, the output voltage is not established yet, the output is in the continuous discharging process, a primary side detection signal is released, a PG signal is inverted to a high level, the system can think that the output is normally established, but actually, the output voltage is still in the establishing process, when the output voltage is below a threshold voltage, the PG signal is inverted to a low level, and when the output voltage is formally established, the PG signal is inverted to a high level again; the utility model discloses a circuit scheme is through detecting the square wave voltage on the secondary side rectifier tube, through rectification filter circuit, converts to more stable DC voltage, and the power is when frequent power-on and power-off like this, only when the secondary side rectifier tube is normal during operation, and the PG signal just can be established, and the PG signal can just can be established after the output is normally established like this to when having solved the frequent power-on and power-off of no-load, the problem that the PG signal restarted.

It is obvious to a person skilled in the art that the invention is not restricted to details of the above-described exemplary embodiments, but that it can be implemented in other specific forms without departing from the spirit or essential characteristics of the invention. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

The above description is only a further embodiment of the present invention, but the scope of protection of the present invention is not limited thereto, and any person skilled in the art can replace or change the technical solution and the concept of the present invention within the scope of the present invention.

Claims

1. A timing control circuit for improving PG signal is characterized in that alternating current is transmitted to a transformer T through a bridge rectifier diode BR, the transformer T is transformed into stable direct current output voltage VOUT through rectification and filtering, the alternating current is transmitted to a diode D1 and a diode D2, then is transmitted to a resistor and a capacitor, then is transmitted to a three-terminal adjustable shunt reference voltage source U1, then is connected to a four-terminal photoelectric coupler N, a 4 terminal of the four-terminal photoelectric coupler N is connected to a VCCS terminal through a resistor R7, the VCCS terminal is connected to a 5 terminal of an operational amplifier NA, the VCCS terminal is connected to a REF5V terminal through a resistor R19, the REF5V terminal is connected to a 3 terminal of the operational amplifier through a resistor R14, a 7 terminal of the transformer T is connected to a 4 terminal of the operational amplifier NA through a diode D6 and a resistor R15, a 2 terminal of the operational amplifier NA is grounded, a 1 terminal of the operational amplifier NA is connected to a 3 terminal of the operational amplifier NA after passing through a resistor R13, a 1 terminal of the operational amplifier NA is connected to a triode Q2 after passing through a diode D5 and a resistor R8, the 4 end of the four-end photoelectric photocoupler N is connected with the 1 end of a triode Q3 after passing through a resistor R17, the 4 end of the four-end photoelectric photocoupler N is grounded after passing through a resistor R17 and parallel capacitors C8 and R18, the 2 end of a triode Q3 is grounded, the 3 end of a triode Q3 is connected with the 4 end of an operational amplifier NA, a diode D6 is grounded after passing through a capacitor C7, and a diode D6 is grounded after passing through a resistor R15 and a resistor R16; the VCCS terminal is grounded through a capacitor C10.

2. The improved PG signal timing control circuit of claim 1, wherein: the 3 end of the four-end photoelectric photocoupler N is grounded, the 4 end of the four-end photoelectric photocoupler N is connected with the 1 end of a triode Q2 through a diode D4 and a resistor R8, the resistor R8 is grounded through a resistor R9, the 2 end of a triode Q2 is grounded, the 3 end of a triode Q2 is connected with the voltage transformed by a transformer T through a resistor R10, the 3 end of a triode Q2 is connected with the 2 end of a three-end adjustable shunt reference voltage source U2, the 3 end of a triode Q2 is connected with a PG signal detection end, the voltage transformed by the transformer T is connected with the 2 end of the three-end adjustable shunt reference voltage source U2 through a resistor R10, the 1 end of a three-end adjustable shunt reference voltage source U2 is connected with a PG signal detection end through a resistor R11, the 1 end of the three-end adjustable shunt reference voltage source U2 is grounded through a resistor R12, the 3 end of the three-end adjustable shunt reference voltage source U2 is grounded, and the 3 end of the triode Q2 is grounded through a capacitor C11.

3. The improved PG signal timing control circuit of claim 1, wherein: the VCCS end is connected with the 2 end of a three-end adjustable shunt reference voltage source U3 after passing through a resistor R19, the 1 end of the three-end adjustable shunt reference voltage source U3 is connected with the REF5V end after passing through a resistor R20, the 1 end of the three-end adjustable shunt reference voltage source U3 is connected with a resistor R21 and a capacitor C12 which are connected in parallel and then grounded, and the 3 end of the three-end adjustable shunt reference voltage source U3 is grounded.

4. The improved PG signal timing control circuit of claim 1, wherein: the 1 end of the three-end adjustable shunt reference voltage source U1 is grounded through a capacitor C4, the 1 end of the three-end adjustable shunt reference voltage source U1 is connected with a diode D1 and a diode D2 through a resistor R4, a resistor R3, a resistor R2 and a resistor R1, a resistor R2 is grounded through a capacitor C2, and a resistor R3 is grounded through a capacitor C3.

5. The improved PG signal timing control circuit of claim 4, wherein: the end 1 of the four-terminal photoelectric photocoupler N is connected with the VCCP end after passing through the resistor R6, the end 1 of the four-terminal photoelectric photocoupler N is connected with the end 2 of the three-terminal adjustable shunt reference voltage source U1 after passing through the resistor R5, the end 2 of the four-terminal photoelectric photocoupler N is connected with the end 2 of the three-terminal adjustable shunt reference voltage source U1, and the end 3 of the three-terminal adjustable shunt reference voltage source U1 is grounded.

6. The improved PG signal timing control circuit of claim 1, wherein: the negative end of the bridge rectifier diode BR is grounded, the positive end of the bridge rectifier diode BR is grounded after passing through a capacitor C1, the positive end of the bridge rectifier diode BR is connected with the 6 end of a transformer T, the 4 end of the transformer T is connected with the 2 end of a transistor Q1, the 3 end of a field effect transistor Q1 is grounded, the 1 end of the field effect transistor Q1 is connected with square wave driving voltage, the 10 end of the transformer T is grounded after passing through a capacitor C5, the 10 end of the transformer T outputs voltage through an inductor L6, the 10 end of the transformer T is grounded after passing through an inductor L6 and a capacitor C6, and the 7 end of the transformer T is grounded after passing through a rectifier D3.