CN215180472U

CN215180472U - Mixed AC/DC signal measurement system based on bus communication mode

Info

Publication number: CN215180472U
Application number: CN202120641443.4U
Authority: CN
Inventors: 康孝; 李涛; 项晖; 田艳中; 胡振; 李梦竹
Original assignee: Hunan Planning & Designing Institute Of Posts & Telecommunications Co ltd
Current assignee: Hunan Planning & Designing Institute Of Posts & Telecommunications Co ltd
Priority date: 2021-03-30
Filing date: 2021-03-30
Publication date: 2021-12-14
Anticipated expiration: 2031-03-30

Abstract

The utility model discloses a mix alternating current-direct current signal measurement system based on bus communication mode, include: the power module, the direct current sampling module, exchange sampling module and data processor, power module gives the direct current sampling module respectively, it supplies power to exchange sampling module and data processor, the direct current sampling module is connected with data processor through keeping apart communication bus, it is connected with data processor through first communication bus to exchange sampling module, it is independent each other with first communication bus to keep apart communication bus, gather alternating current signal and direct current signal respectively through two mutually independent communication bus, unnecessary communication interface and the line redundancy that can significantly reduce, and reduce the mutual interference of different kind signals, improve circuit's stability.

Description

Mixed AC/DC signal measurement system based on bus communication mode

Technical Field

The utility model relates to a signal acquisition, transmission technical field, concretely relates to mix alternating current-direct current signal measurement system based on bus communication mode.

Background

In the prior art, in order to detect different alternating current signals and direct current signals, a plurality of groups of different acquisition circuits and a plurality of communication interfaces of different types are generally adopted to acquire a plurality of different alternating current signals and direct current signals.

Therefore, how to solve the redundancy of the existing mixed signal acquisition line and the low reliability of the circuit become the technical problems to be solved urgently in the technical field.

SUMMERY OF THE UTILITY MODEL

The utility model provides a mix alternating current-direct current signal measurement system based on bus communication mode for current mixed signal gathers the circuit redundancy, technical problem that the circuit reliability is low.

In order to solve the technical problem, the utility model provides a technical scheme does:

a mixed AC/DC signal measuring system based on a bus communication mode comprises: the power supply module supplies power to the direct current sampling module, the alternating current sampling module and the data processor respectively, the direct current sampling module is connected with the data processor through an isolation communication bus, the alternating current sampling module is connected with the data processor through a first communication bus, and the isolation communication bus is mutually independent of the first communication bus.

Preferably, the chip selection signal output end of the data processor is connected with the chip selection end of the direct current sampling module through the optical coupling isolation module, and the chip selection signal output end of the data processor outputs a chip selection signal to the chip selection end of the direct current sampling module through the optical coupling isolation module.

Preferably, the optocoupler isolation module includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, an NPN transistor Q1, an optocoupler isolator G1 and a first capacitor C1, first ends of the first resistor R1 and the second resistor R2 are both connected to a chip select signal output terminal of the digital processor, a second end of the first resistor R1 is connected to an emitter of the NPN transistor Q1, an emitter of the NPN transistor Q1 is also grounded, a first end of the second resistor R2 is further connected to a base of the NPN transistor Q1, a collector of the NPN transistor Q1 is connected to a first end of the third resistor R3, a first end of the third resistor R3 is further connected to a cathode of a light emitting diode in the optocoupler isolator, a second end of the third resistor R3 is connected to a second output terminal of the power module, a first end of the fourth resistor R4 is connected to a second output terminal of the power module, and a second end of the optocoupler isolator is connected to an anode of the light emitting diode, the collecting electrode of the phototriode in the optical coupler isolator is connected with the chip selection end of the direct current sampling module and the first end of the fifth resistor R5 respectively, the second end of the fifth resistor R5 is connected with the chip selection end of the direct current sampling module and is also connected with the first end of the first capacitor C1, the second end of the first capacitor C1 is also connected with the first output end of the power supply module and is also connected with the emitting electrode of the phototriode in the optical coupler isolator.

Preferably, the digital isolation device comprises a digital isolation module, an output end of the direct current sampling module is connected with an input end of the digital isolation module, an output end of the digital isolation module is connected with an input end of the data processor, and the direct current sampling module is used for sending the acquired direct current signal to the data processor through the data isolation module.

Preferably, the chip selection end of the digital isolation module is connected with the chip selection signal output end of the data processor.

Preferably, the digital isolation module includes a digital isolator F1, a second capacitor C2, and a third capacitor C3, a pin VCC1 of the digital isolator F1 is connected to the second output terminal of the power supply module and to a first end of the second capacitor C2, a pin GND1 of the digital isolator F1 is connected to ground and to a second end of the second capacitor C2; the second GND1 pin of the digital isolator F1 is grounded; an EN1 pin of the digital isolator F1 is connected with a chip selection signal output end of the data processor; an EN2 pin and a VCC2 pin of the digital isolator F1 are both connected with a first end of a third capacitor C3, the first end of the third capacitor C3 is also connected with a first output end of a power supply module, a first GND2 pin of the digital isolator F1 is connected with a second end of the third capacitor C3, and a first GND2 pin and a second GND2 pin of the digital isolator F1 are connected with a DGND pin of a direct current sampling module to form a ground channel; the INA pin of the digital isolator F1 is connected with the SCK1 pin of the data processor, and the OUTA pin of the digital isolator F1 is connected with the SCLK pin of the direct current sampling module to form a synchronous clock channel between the direct current sampling module and the data processor; the INB pin of the digital isolator F1 is connected with the MISO1 pin of the data processor, and the OUTB pin of the digital isolator F1 is connected with the SDI pin of the direct current sampling module to form an input channel between the direct current sampling module and the data processor; the OUTC pin of the digital isolator F1 is connected with the MISI1 pin of the data processor, and the INC pin of the digital isolator F1 is connected with the SWI pin of the direct current sampling module to form an output channel between the direct current sampling module and the data processor.

Preferably, the power supply module comprises a direct-current power supply, an isolation DC/DC converter and a low-dropout micro-electromechanical voltage regulator, a power supply output end of the direct-current power supply is connected with a power supply input end of the isolation DC/DC converter, and a first output end of the isolation DC/DC converter is respectively connected with a power supply input end of the low-dropout micro-electromechanical voltage regulator, a power supply input end of the direct-current sampling module, a power supply input end of the alternating-current sampling module, a first end of a third capacitor C3 of the digital isolation module and a second end of a first capacitor C1 of the optical coupling isolation module; and a second output end of the low-dropout micro-electromechanical voltage regulator is respectively connected with a power supply input end of the data processor, a first end of a fourth resistor of the optical coupling isolation module and a VCC1 pin of the digital isolation module.

Preferably, the dc sampling module includes a plurality of dc sampling units that are independently powered.

Preferably, the ac sampling module includes a voltage sampling circuit for sampling voltage signals of the multiple ac loads and a plurality of current sampling circuits for respectively sampling voltage signals of the multiple ac loads.

The utility model discloses following beneficial effect has:

1. the utility model provides a mixed alternating current-direct current signal measurement system based on bus communication mode, include: the power module, the direct current sampling module, exchange sampling module and data processor, power module gives the direct current sampling module respectively, it supplies power to exchange sampling module and data processor, the direct current sampling module is connected with data processor through keeping apart communication bus, it is connected with data processor through first communication bus to exchange sampling module, it is independent each other with first communication bus to keep apart communication bus, gather alternating current signal and direct current signal respectively through two mutually independent communication bus, unnecessary communication interface and the line redundancy that can significantly reduce, and reduce the mutual interference of different kind signals, improve circuit's stability.

2. In preferred scheme, the utility model provides a direct current circuit isolated system, through the output with power module respectively with data processor's power input end, the power input end of opto-coupler isolation module and the power input end of sampling module are connected, data processor's chip selection signal output part passes through the opto-coupler isolation module and is connected with the chip selection end of sampling module, data processor's chip selection signal output part passes through the opto-coupler isolation module and exports the chip selection end that the chip selection signal gives sampling module, through the opto-coupler isolation transmission chip selection signal, the interference immunity that can the greatly increased circuit, improve circuit signal transmission's reliability.

3. In the preferred scheme, through opto-coupler isolator and digital isolator, add the isolation between function chip and digital signal processor to can independently select a certain function chip and be connected with the SPI bus, not only reduce interface quantity, also improve circuit reliability and security.

4. In a preferred scheme, signal interference among the direct current measurement units can be suppressed by independently supplying power to each direct current sampling module.

In addition to the above-described objects, features and advantages, the present invention has other objects, features and advantages. The present invention will be described in further detail below with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this application, are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. In the drawings:

fig. 1 is a schematic structural diagram of a hybrid ac/dc signal measuring system based on a bus communication mode in the present invention;

fig. 2 is a circuit diagram of a first isolated DC/DC converter in a preferred embodiment of the invention;

FIG. 3 is a pin diagram of a data processor in a preferred embodiment of the present invention;

fig. 4 is a circuit diagram of a dc sampling module in a preferred embodiment of the present invention;

fig. 5 is a circuit diagram of a light coupling isolation module in a preferred embodiment of the present invention;

fig. 6 is a circuit diagram of a digital isolation module in a preferred embodiment of the invention;

fig. 7 is a circuit diagram of an RN8209 chip and an ac current and voltage sampling circuit thereof according to a preferred embodiment of the present invention;

fig. 8 is a circuit diagram of a second isolated DC/DC converter in a preferred embodiment of the present invention;

FIG. 9 is a low dropout micro-electromechanical pressure regulator in accordance with a preferred embodiment of the present invention;

fig. 10 is a flowchart of the operation of the hybrid ac/dc signal measuring system based on the bus communication mode in the preferred embodiment of the present invention.

Detailed Description

The embodiments of the invention will be described in detail below with reference to the drawings, but the invention can be implemented in many different ways as defined and covered by the claims.

The first embodiment is as follows:

as shown in fig. 1, the utility model discloses a mix alternating current-direct current signal measurement system based on bus communication mode, include: the power supply module supplies power to the direct current sampling module, the alternating current sampling module and the data processor respectively, the direct current sampling module is connected with the data processor through an isolation communication bus, the alternating current sampling module is connected with the data processor through a first communication bus, and the isolation communication bus is mutually independent of the first communication bus.

Alternating current signals and direct current signals are respectively collected through two mutually independent communication buses, unnecessary communication interfaces and line redundancy can be greatly reduced, mutual interference of different types of signals is reduced, and the stability of the circuit is improved.

Example two:

the second embodiment is an expanded embodiment of the first embodiment, and is different from the first embodiment in that the structure and the function of the hybrid ac/dc signal measurement system based on the bus communication mode are refined:

in this embodiment, a hybrid ac/dc signal measurement system based on a bus communication mode is disclosed, which includes: the system comprises a power supply module, an optical coupling isolation module, a digital isolation module, a direct current sampling module, an alternating current sampling module and a data processor;

in this embodiment, the power module includes a first DC power supply, a second DC power supply, a first isolated DC/DC converter, a second isolated DC/DC converter, and a low dropout micro-electromechanical voltage regulator.

The power output end of the first direct-current power supply is connected with the power input end of the first isolation DC/DC converter, and the first output end of the first isolation DC/DC converter is respectively connected with the power input end of the low-dropout micro-electromechanical voltage regulator, the power input end of the direct-current sampling module, the first end of the third capacitor C3 of the digital isolation module and the second end of the first capacitor C1 of the optical coupling isolation module; and a second output end of the low-dropout micro-electromechanical voltage regulator is respectively connected with a power supply input end of the data processor, a first end of a fourth resistor of the optical coupling isolation module and a VCC1 pin of the digital isolation module.

The first direct current power supply is a 24V power supply, the first isolation DC/DC converter is used for converting 24V current transmitted by the first direct current power supply into 5V current, and transmitting the 5V current to the direct current sampling module, the secondary side of the digital isolation module and the secondary side of the optical coupling isolation module respectively so as to serve as working voltages of the direct current sampling module, the secondary side of the digital isolation module and the secondary side of the optical coupling isolation module. In addition, the first isolation DC/DC converter also transmits 5V current to the low-voltage-difference micro-electromechanical voltage regulator, and the low-voltage-difference micro-electromechanical voltage regulator is used for receiving the 5V current, converting the 5V current into 3.3V current, and then respectively transmitting the 3.3V current to the data processor, the primary side of the optical coupling isolation module and the primary side of the digital isolation module to be used as working voltages of the data processor, the primary side of the optical coupling isolation module and the primary side of the digital isolation module.

In the present embodiment, as shown in fig. 2, the first isolation DC/DC converter includes a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, and a conversion chip MK1, wherein the conversion chip is B2405S-1W of the idenosemiconductor company; as shown in fig. 9, the low dropout micro-electromechanical pressure regulator employs an MC33275 chip of an on semiconductor.

The second direct-current power supply is a 24V power supply, the power output end of the second direct-current power supply is connected with the power input end of the second isolation DC/DC converter, and the first output end of the second isolation DC/DC converter is connected with the power input end of the alternating-current sampling module and used for supplying power for alternating-current sampling. In this embodiment, as shown in fig. 8, the second isolated DC/DC converter includes a capacitor SC7, a capacitor SC8, a capacitor SC9, a capacitor SC10, a resistor SR2, and a conversion chip, wherein the conversion chip is VRB2405YMD-10WR3 from MORNSUN (golden sun);

as shown in fig. 3, the data processor selects a DSP processor of STM32 model, the specific model is STM32F103R8T6, the data processor and the dc sampling module establish communication through a first SPI bus, the data processor and the ac sampling module establish communication through a second SPI bus, wherein the SCK1 pin, the MISO1 pin, the MISI1 pin and the PC1 of the data processor are interfaces of the first SPI bus, the SCK1 pin of the data processor is an interface of the G SPI CLK1, the MISO1 pin is an interface of the G SPI DO1, the MISI1 pin is an interface of the G SPI DI1, the PC1 pin is an interface of the G _ ISO1EN1, that is, a chip select signal output terminal, and the 39 th pin (chip select signal output terminal), the 36 th pin (digital signal output terminal), the 35 th pin (digital signal input terminal) and the 34 th pin (serial clock output terminal) of the data processor are interfaces of the second SPI bus.

Specifically, as shown in fig. 4, the dc sampling module includes a first metering chip, a dc voltage sampling circuit, and a dc current sampling circuit, wherein positive and negative analog input pins of a current channel of the first metering chip are both connected to the dc current sampling circuit, and positive and negative analog input pins of a voltage channel of the first metering chip are both connected to the dc voltage sampling circuit. The direct current sampling circuit sends the acquired real-time current signals to the first metering chip through the positive and negative analog input pins of the current channel, and the direct voltage sampling circuit sends the acquired real-time voltage signals to the first metering chip through the positive and negative analog input pins of the voltage channel;

specifically, as shown in fig. 5, the optocoupler isolation module includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, an NPN transistor Q1, an optocoupler isolator G1, and a first capacitor C1, first ends of the first resistor R1 and the second resistor R2 are both connected to a chip selection signal output terminal of the digital processor, a second end of the first resistor R1 is connected to an emitter of the NPN transistor Q1, an emitter of the NPN transistor Q1 is further grounded, a first end of the second resistor R2 is further connected to a base of the NPN transistor Q1, a collector of the transistor Q1 is connected to a first end of the third resistor R3, a first end of the third resistor R3 is further connected to a cathode of a light emitting diode in the NPN isolator, a second end of the third resistor R3 is connected to a second output terminal of the first power module, and a first end of the fourth resistor R4 is connected to a second output terminal of the first power module, the second end is connected with the positive pole of emitting diode in the optical coupler isolator, the collecting electrode of phototriode in the optical coupler isolator is connected with the chip selection end of direct current sampling module and the first end of fifth resistance R5 respectively, the second end of fifth resistance R5 is connected with the chip selection end of direct current sampling module, and still be connected with the first end of first electric capacity C1, the second end of first electric capacity C1 still is connected with power module's first output, still be connected with the projecting pole of phototriode in the optical coupler isolator.

As shown in fig. 6, the digital isolation module includes a digital isolator F1, a second capacitor C2, and a third capacitor C3, a pin VCC1 (primary side power pin) of the digital isolator F1 is connected to the second output terminal of the first power module and to the first end of the second capacitor C2, a pin GND1 (primary side ground pin) of the digital isolator F1 is grounded and to the second end of the second capacitor C2; the second GND1 pin of the digital isolator F1 is grounded; an EN1 pin (a primary side enabling end) of the digital isolator F1 is connected with a chip selection signal output end of the data processor; an EN2 pin (a secondary side enabling end) and a VCC2 pin (a secondary side power supply pin) of the digital isolator F1 are both connected with a first end of a third capacitor C3, the first end of the third capacitor C3 is also connected with a first output end of a first power supply module, a first GND2 pin (a secondary side grounding pin) of the digital isolator F1 is connected with a second end of the third capacitor C3, and a first GND2 pin and a second GND2 pin of the digital isolator F1 are connected with a DGND (digital grounding) pin of the direct current sampling module to form a grounding channel; the INA pin (serial data input A end) of the digital isolator F1 is connected with the SCK1 pin (serial clock output pin) of the data processor, and the OUTA pin (serial data output A end) of the digital isolator F1 is connected with the SCLK pin (serial clock input pin) of the direct current sampling module to form a synchronous clock channel between the direct current sampling module and the data processor; an INB pin (serial data input A end) of the digital isolator F1 is connected with a MISO1 pin (serial data output end) of the data processor, an OUTB pin (serial data output B end) of the digital isolator F1 is connected with an SDI pin (serial data input end) of the direct current sampling module to form an input channel between the direct current sampling module and the data processor; the OUTC (serial data output C end) pin of the digital isolator F1 is connected with the MISI1 (serial data input end) pin of the data processor, and the INC (serial data input C end) pin of the digital isolator F1 is connected with the SWI (serial data output end) pin of the direct current sampling module to form an output channel between the direct current sampling module and the data processor.

In this embodiment, the optocoupler isolator selects TPL181, the digital isolator selects ISO7731, and the metering chip is RN 8209G. Pins 1 to 8 of the digital isolator F1 are primary side pins, pins 9 to 16 are secondary side pins, wherein pin 1 is a VCC1 pin, pin 2 is a first GND1 pin, pin 3 is an INA pin, pin 4 is an INB pin, pin 5 is an OUTC pin, pin 6 is an NC pin, pin 7 is an EN1 pin, and pin 8 is a second GND1 pin; the 16 pin is a first VCC2 pin, the 15 pin is a GND2 pin, the 14 pin is an OUTA pin, the 13 pin is an OUTB pin, the 12 pin is an INC pin, the 11 pin is an NC pin, the 10 pin is an EN2 pin, and the 9 pin is a second GND2 pin.

The digital isolator has three-channel digital isolation, an enable end EN1 controls an isolator pin 12 to block a metering chip from transmitting data signals to a DSP, and an enable end EN2

controls isolator pins

3 and 4, but because EN2 is always connected with a 5V power supply and is at a high level, a first metering chip can receive clock signals and serial input data signals from the DSP all the time.

The DSP pins 9-11 respectively control the enabling terminals EN1 of the three digital isolators, and if a user wants the first metering chip to access the SPI bus, the DSP pin 9 is only required to be at a high level, and the

pins

10 and 11 are only required to be at a low level. Pin 9 high level, digital isolator's enable end EN1 is in the high level, then B is in the high level among the opto-isolator circuit, the reverser switches on, node C is in the low level, make opto-isolator diode circuit switch on, the diode is luminous, the opto-coupler triode also switches on, the output of opto-isolator becomes the low level by the high level, the chip selection pin of first measurement chip is in the low level, first measurement chip is selected by the user, the serial data output pin access bus of first measurement chip carries out data transmission with DSP.

Specifically, as shown in fig. 7, the ac sampling module includes an ac current sampling circuit, an ac voltage sampling circuit, and a second metering chip, wherein positive and negative analog input pins of a current channel of the second metering chip are both connected to the ac current sampling circuit, and positive and negative analog input pins of a voltage channel of the second metering chip are both connected to the ac voltage sampling circuit. The alternating current sampling circuit sends the acquired real-time current signals to the second metering chip through the positive and negative analog input pins of the current channel, and the alternating voltage sampling circuit sends the acquired real-time voltage signals to the second metering chip through the positive and negative analog input pins of the voltage channel;

the CS-N of the second metering chip is an SPI CS (chip select control) interface, and is connected with the 39 th pin of the DSP processor, so that an SPI CS channel of a second SPI bus is formed, the SCLK (serial clock input pin) pin of the second metering chip is connected with the 34 th pin of the DSP processor, an SPI CLK channel of the second SPI bus is formed, the SDI pin of the second metering chip is connected with the 36 th pin of the DSP processor, a DI SPI channel of the second SPI bus is formed, the SDO pin of the second metering chip is connected with the 35 th pin of the DSP processor, and an SPI DO channel of the second SPI bus is formed.

In this embodiment, as shown in fig. 10, the working flow of the hybrid ac/dc signal measurement system is as follows:

the user controls the direct current power supply to output a 24V power supply to the isolation DC/DC converter, the isolation DC/DC converter converts 24V current transmitted by the direct current power supply into 5V current, and transmits the 5V current to the direct current sampling module, the alternating current sampling module, the secondary side of the digital isolation module and the secondary side of the optical coupling isolation module respectively so as to serve as working voltages of the direct current sampling module, the alternating current sampling module, the secondary side of the digital isolation module and the secondary side of the optical coupling isolation module. In addition, the isolation DC/DC converter also transmits 5V current to the low-voltage-difference micro-electromechanical voltage regulator, the low-voltage-difference micro-electromechanical voltage regulator receives the 5V current, converts the 5V current into 3.3V current, and then respectively transmits the 3.3V current to the data processor, the primary side of the optical coupling isolation module and the primary side of the digital isolation module to be used as working voltages of the data processor, the primary side of the optical coupling isolation module and the primary side of the digital isolation module.

When a user wants the first metering chip to perform data interaction with the data processor, the pin 9 (namely a chip selection signal output end) of the STM32 is controlled to be at a high level, the pins 10 and 11 are controlled to be at a low level, namely, the chip selection signal output end of the data processor is controlled to output a high level (namely a chip selection signal) to the optical coupling isolation module, the pole B of the isolation triode of the optical coupling isolation module is enabled to be at a high level, the reverser of the isolation triode is conducted, the pole C of the isolation triode is enabled to be at a low level, the diode circuit on the primary side of the optical coupling isolator connected with the pole C is enabled to be conducted, the diode emits light, the optical coupling triode of the optical coupling isolator is also conducted, the output end of the optical coupling isolator is changed from the high level to the low level, the chip selection pin of the first metering chip of the direct current sampling module connected with the output end of the optical coupling isolator is also enabled to be at the low level, and the first metering chip of the direct current sampling module is enabled to be selected by the user, and connecting the serial data output pin of the first metering chip of the direct current sampling module to a bus to perform data transmission with the STM 32.

When a first metering chip of the direct current sampling module is selected by a user, a chip selection signal output end of the data processor also outputs a high level (namely a chip selection signal) to a chip selection end of a digital isolator of the digital isolation module, the digital isolator is selected to be conducted, when the first metering chip of the direct current sampling module is selected by the user, the first metering chip sends acquired current signals and voltage signals to a primary side of the digital isolation module through a first SPI bus channel (comprising a synchronous clock channel, an input channel and an output channel), and after the digital isolation module receives and conducts isolation conversion corresponding to the current signals and the voltage signals, the received current signals and voltage signals are sent to the STM32 through the SPI bus channel.

When a user wants the second metering chip to perform data interaction with the data processor, the pin 39 of the STM32 is controlled to output a high level to the second metering chip, so that after the second metering chip is selected by the user, the second metering chip sends the collected current signal and voltage signal to the data processor through a second SPI bus channel (comprising a synchronous clock channel, an input channel and an output channel).

To sum up, the utility model provides a mixed alternating current-direct current signal measurement system based on bus communication mode gathers alternating current signal and direct current signal respectively through two mutually independent communication buses, and unnecessary communication interface and the line redundancy that can significantly reduce to reduce the mutual interference of different kind signals, improve the stability of circuit.

The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A mixed AC/DC signal measurement system based on bus communication mode is characterized by comprising: power module, direct current sampling module, interchange sampling module and data processor, power module gives respectively direct current sampling module, interchange sampling module and data processor power supply, direct current sampling module through keep apart communication bus with data processor connects, interchange sampling module through first communication bus with data processor connects, keep apart communication bus and first communication bus mutual independence.

2. The system according to claim 1, further comprising an optical coupling isolation module, wherein a chip selection signal output end of the data processor is connected to a chip selection end of the dc sampling module through the optical coupling isolation module, and the chip selection signal output end of the data processor outputs a chip selection signal to the chip selection end of the dc sampling module through the optical coupling isolation module.

3. The bus communication mode-based hybrid AC/DC signal measuring system according to claim 2, wherein the optocoupler isolation module comprises a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, an NPN transistor Q1, an optocoupler isolator G1 and a first capacitor C1, first ends of the first and second resistors R1 and R2 are connected to a chip select signal output terminal of the data processor, a second end of the first resistor R1 is connected to an emitter of the NPN Q1, the emitter of the NPN transistor Q1 is further grounded, a first end of the second resistor R2 is further connected to a base of the NPN transistor Q1, a collector of the NPN transistor Q1 is connected to a first end of the third resistor R3, a first end of the third resistor R3 is further connected to a cathode of a light emitting diode in the optocoupler isolator G1, the second end of the third resistor R3 is connected to the second output end of the power module, the first end of the fourth resistor R4 is connected to the second output end of the power module, the second end of the fourth resistor R4 is connected to the anode of the light emitting diode in the optocoupler isolator G1, the collector of the phototransistor in the optocoupler isolator G1 is connected to the chip selection end of the dc sampling module and the first end of the fifth resistor R5, the second end of the fifth resistor R5 is connected to the chip selection end of the dc sampling module and is further connected to the first end of the first capacitor C1, and the second end of the first capacitor C1 is further connected to the first output end of the power module and is further connected to the emitter of the phototransistor in the optocoupler isolator G1.

4. The system according to claim 3, comprising a digital isolation module, wherein an output terminal of the DC sampling module is connected to an input terminal of the digital isolation module, an output terminal of the digital isolation module is connected to an input terminal of the data processor, and the DC sampling module is configured to send the collected DC signal to the data processor through the data isolation module.

5. The system according to claim 4, wherein the chip select terminal of the digital isolation module is connected to the chip select signal output terminal of the data processor.

6. The system according to claim 5, wherein the digital isolation module comprises a digital isolator F1, a second capacitor C2 and a third capacitor C3, the VCC1 pin of the digital isolator F1 is connected to the second output terminal of the power supply module and to the first terminal of the second capacitor C2, the first GND1 pin of the digital isolator F1 is connected to ground and to the second terminal of the second capacitor C2; a second GND1 pin of the digital isolator F1 is grounded; an EN1 pin of the digital isolator F1 is connected with a chip selection signal output end of the data processor; an EN2 pin and a VCC2 pin of the digital isolator F1 are both connected to a first end of the third capacitor C3, the first end of the third capacitor C3 is further connected to a first output end of the power supply module, a first GND2 pin of the digital isolator F1 is connected to a second end of the third capacitor C3, and a first GND2 pin and a second GND2 pin of the digital isolator F1 are connected to a DGND pin of the dc sampling module to form a ground channel; the INA pin of the digital isolator F1 is connected with the SCK1 pin of the data processor, and the OUTA pin of the digital isolator F1 is connected with the SCLK pin of the direct current sampling module to form a synchronous clock channel between the direct current sampling module and the data processor; the INB pin of the digital isolator F1 is connected with the MISO1 pin of the data processor, and the OUTB pin of the digital isolator F1 is connected with the SDI pin of the direct current sampling module to form an input channel between the direct current sampling module and the data processor; the OUTC pin of the digital isolator F1 is connected with the MISI1 pin of the data processor, and the INC pin of the digital isolator F1 is connected with the SWI pin of the direct current sampling module to form an output channel between the direct current sampling module and the data processor.

7. The system according to claim 6, wherein the power module comprises a DC power supply, an isolation DC/DC converter and a low dropout micro-electromechanical voltage regulator, a power output terminal of the DC power supply is connected to a power input terminal of the isolation DC/DC converter, a first output terminal of the isolation DC/DC converter is respectively connected to a power input terminal of the low dropout micro-electromechanical voltage regulator, a power input terminal of the DC sampling module, a power input terminal of the AC sampling module, a first terminal of a third capacitor C3 of the digital isolation module and a second terminal of a first capacitor C1 of the optically coupled isolation module; and a second output end of the low-dropout micro-electromechanical voltage regulator is respectively connected with a power supply input end of the data processor, a first end of a fourth resistor R4 of the optical coupling isolation module and a VCC1 pin of the digital isolation module.

8. The system according to claim 1, wherein the dc sampling module comprises a plurality of dc sampling units that are independently powered.

9. The system according to claim 1, wherein the ac sampling module comprises a voltage sampling circuit for sampling voltage signals of multiple ac loads and a plurality of current sampling circuits for respectively sampling voltage signals of multiple ac loads.