CN215010191U - Attenuator chip - Google Patents
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- CN215010191U CN215010191U CN202120908826.3U CN202120908826U CN215010191U CN 215010191 U CN215010191 U CN 215010191U CN 202120908826 U CN202120908826 U CN 202120908826U CN 215010191 U CN215010191 U CN 215010191U
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Abstract
The utility model provides an attenuator chip, including medium base plate and the input of growing on medium base plate, the output, first film resistor, second film resistor, third film resistor, first ground connection pad, second ground connection pad, first earthing terminal, the second earthing terminal, third earthing terminal and many transmission lines, first film resistor, T type pure resistance attenuator is constituteed to second film resistor and third film resistor, carry out signal processing to the signal of signal source output, integrate each components and parts on same chip through adopting integrated passive device technology, the integrated level height has, the territory area is little, the attenuation precision is high, the design is simple, characteristics of high reliability.
Description
Technical Field
The utility model belongs to the technical field of the attenuator, especially, relate to an attenuator chip.
Background
With the rapid development of science and technology, the communication products are continuously updated, the development of terminal equipment is also changed day by day, and electronic products are gradually developed towards miniaturization and high integration. The thin film IPD technology has the advantages of high integration level, low power consumption, high reliability and stable performance. With the development of modern wireless communication systems such as 5G, while faster wireless data transmission is brought to users, the thin film IPD technology is used more and more, and has the characteristics of high reliability, high stability, high anti-interference performance, good product performance consistency, low mass production cost and the like, so the IPD technology plays an important role in microwave/radio frequency circuits.
An attenuator is an element capable of controlling power gain, is mainly used for controlling the transmission power of a circuit, and is widely applied to various circuits, and almost all the attenuator is not separated in the aspects of communication technology, radar phase control technology, radio frequency technology and other electronic circuits as long as an amplifying circuit is provided. There are two major types of attenuators currently on the market: one is a combined circuit, the simplest pure resistance type attenuation circuit also needs three resistors, and for circuits with low requirements on precision, stability and the like, the attenuation circuit combining a pure resistance circuit, a resistance-capacitance circuit or a resistance circuit can be used; another is to use an IPD attenuator chip: the method is mainly applied to a monolithic microwave circuit, is used for designing and researching the IPD attenuator of the microwave circuit, and has the advantages of small distribution parameter, wide application frequency band range, stable and reliable performance, good index repeatability and stronger anti-interference capability.
Miniaturization of electronic components has become one of the key issues in developing passive microwave attenuators. Because the IPD in China is developed slowly and few products are researched and developed independently, most of the currently used IPD attenuators are imported from foreign countries, so that the problems of high purchase cost and long period are caused, and great difficulty and obstruction are brought to the development of microwave/radio frequency circuits and the progress of high-tech weapons, so that the independent design and research of the IPD attenuator become an urgent technology.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide an attenuator chip aims at realizing that the signal attenuation function solves the miniaturized problem of attenuator simultaneously.
The embodiment of the utility model provides an attenuator chip, including the medium base plate with grow on input, output, first film resistor, second film resistor, third film resistor, first ground pad, second ground pad, first earthing terminal, second earthing terminal, third earthing terminal and many transmission lines on the medium base plate, the input, the output, first film resistor, second film resistor, third film resistor, first ground pad, second ground pad, first earthing terminal, second earthing terminal and third earthing terminal all are square structure;
the input end through first transmission line with the first end of first sheet resistance is connected, the second end of first sheet resistance the first end of second sheet resistance with the first end of third sheet resistance connects altogether, the second sheet resistance through the second transmission line with the output is connected, the second end of third sheet resistance through the third transmission line with first ground connection pad is connected and through the fourth transmission line with second ground connection pad is connected and through the fifth transmission line with the third earthing terminal is connected, first ground connection pad still through the sixth transmission line with first earthing terminal is connected, the second ground connection pad still through the seventh transmission line with the second earthing terminal is connected.
In one embodiment, the attenuator chip further includes a third ground pad, a fourth ground terminal, and a fifth ground terminal in a square configuration;
the third ground pad is connected to the fourth ground terminal through an eighth transmission line, and the fourth ground pad is connected to the fifth ground terminal through a ninth transmission line.
In one embodiment, the input terminal, the first thin-film resistor, the second thin-film resistor and the output terminal are disposed in parallel along a first direction, the first ground pad and the second ground pad are disposed in parallel along a second direction parallel to the first direction, the first thin-film resistor and the second thin-film resistor are disposed perpendicular to the third thin-film resistor and symmetrically disposed on both sides of the third thin-film resistor, and the first thin-film resistor and the second thin-film resistor have the same size.
In one embodiment, the first ground pad, the input terminal, and the third ground pad are disposed in parallel along a third direction perpendicular to the first direction, and the first ground pad and the third ground pad are symmetrically disposed at both sides of the input terminal;
the second grounding pad, the output end and the fourth grounding pad are arranged in parallel along a fourth direction parallel to the third direction, and the second grounding pad and the fourth grounding pad are symmetrically arranged on two sides of the output end.
In one embodiment, the distances between the first ground pad and the third ground pad and the input end are both 140um to 160 um;
the second ground pad with the fourth ground pad all with the distance between the output is 140um ~ 160 um.
In one embodiment, the transmission lines are linearly connected, and the first transmission line, the second transmission line, the third transmission line and the fourth transmission line have equal length and equal width;
the input terminal and the output terminal have the same size, and the first ground terminal, the second ground terminal, the third ground terminal and the fourth ground terminal have the same size.
In one embodiment, the first transmission line and the second transmission line have a length ranging from 100um to 150um and a width ranging from 25um to 35 um;
the length range of the third transmission line and the fourth transmission line is 170 um-180 um, and the width range is 25 um-35 um;
first film resistance with second film resistance's length scope is 2um ~ 10um and width scope is 30um ~ 50um, third film resistance's length scope is 120um ~ 140um and width scope is 10um ~ 20 um.
In one embodiment, the first transmission line and the second transmission line have a length ranging from 100um to 150um and a width ranging from 25um to 35 um;
the length range of the third transmission line and the fourth transmission line is 165 um-175 um, and the width range is 25 um-35 um;
first film resistance with second film resistance's length scope is 2um ~ 10um and width scope is 25um ~ 35um, third film resistance's length scope is 100um ~ 110um and width scope is 20um ~ 30 um.
In one embodiment, the first transmission line and the second transmission line have a length ranging from 120um to 170um and a width ranging from 35um to 45 um;
the length range of the third transmission line and the fourth transmission line is 175 um-185 um, and the width range is 25 um-35 um;
first film resistance with second film resistance's length scope is 2um ~ 10um and width scope is 35um ~ 45um, third film resistance's length scope is 105um ~ 115um and width scope is 35um ~ 45 um.
In one embodiment, the material of the dielectric substrate is a gallium arsenide material, and the material of the first thin film resistor, the material of the second thin film resistor and the material of the third thin film resistor are tantalum nitride materials.
Compared with the prior art, the embodiment of the utility model beneficial effect who exists is: the attenuator chip comprises a dielectric substrate, an input end, an output end, a first thin film resistor, a second thin film resistor, a third thin film resistor, a first grounding pad, a second grounding pad, a first grounding end, a second grounding end, a third grounding end and a plurality of transmission lines, wherein the input end, the output end, the first thin film resistor, the second thin film resistor, the third thin film resistor, the first grounding pad, the second grounding end, the third grounding end and the plurality of transmission lines are grown on the dielectric substrate, the first thin film resistor, the second thin film resistor and the third thin film resistor form a T-shaped pure resistance attenuator, signals output by a signal source are processed, and all components are integrated on the same chip by adopting an integrated passive device process.
Drawings
Fig. 1 is a schematic structural diagram of an attenuator chip according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a simulation curve of the attenuator accuracy of the attenuator chip according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a simulation curve of the standing-wave ratio of the attenuator chip according to an embodiment of the present invention.
Detailed Description
In order to make the technical problem, technical solution and advantageous effects to be solved by the present invention more clearly understood, the following description is given in conjunction with the accompanying drawings and embodiments to illustrate the present invention in further detail. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.
It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like are used in an orientation or positional relationship indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the device or element so referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus should not be construed as limiting the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically limited otherwise.
The embodiment of the utility model provides an attenuator chip is provided.
As shown in fig. 1, fig. 1 is a schematic structural diagram of an attenuator chip according to an embodiment of the present invention, in this embodiment, the attenuator chip includes a dielectric substrate, and an input terminal RFin, an output terminal RFout, a first thin-film resistor R1, a second thin-film resistor R2, a third thin-film resistor R3, a first ground pad P1, a second ground pad P2, a first ground terminal B1, a second ground terminal B2, a third ground terminal B3, and a plurality of transmission lines grown on the dielectric substrate, where the input terminal RFin, the output terminal RFout, the first thin-film resistor R1, the second thin-film resistor R2, the third thin-film resistor R3, the first ground pad P1, the second ground pad P2, the first ground terminal B1, the second ground terminal B2, and the third ground terminal B3 are all in a square structure;
the input terminal RFin is connected to a first terminal of the first thin-film resistor R1 through a first transmission line L1, a second terminal of the first thin-film resistor R1, a first terminal of the second thin-film resistor R2, and a first terminal of the third thin-film resistor R3 are commonly connected, the second thin-film resistor R2 is connected to the output terminal RFout through a second transmission line L2, a second terminal of the third thin-film resistor R3 is connected to the first ground pad P1 through a third transmission line L3, the second ground pad P2 through a fourth transmission line L4, and the third ground terminal B3 through a fifth transmission line L5, the first ground pad P1 is further connected to a first ground terminal B1 through a sixth transmission line L6, and the second ground pad P2 is further connected to a second ground terminal B2 through a seventh transmission line L7.
In this embodiment, the attenuator chip is manufactured by using an IPD (Integrated Passive device) process, using a dielectric substrate as a substrate, and growing a whole attenuator circuit on the substrate through thin film processes such as exposure, development, plating, diffusion, and etching, where the attenuator circuit includes an input terminal RFin, an output terminal RFout, a first thin film resistor R1, a second thin film resistor R2, a third thin film resistor R3, a first ground pad P1, a second ground pad P2, a first ground terminal B1, a second ground terminal B2, a third ground terminal, and a plurality of transmission lines, where the input terminal RFin, the output terminal RFout, and the ground terminals form signal pins of the attenuator chip, and are used for signal input, signal output, and ground connection, where the input terminal RFin is used for connecting a signal source, the output terminal RFout is used for connecting a back-end circuit or a load, the ground terminal is used for ground connection, and the first thin film resistor R1, the second thin film resistor R2, and the third thin film resistor R3 form a T-type pure attenuator, the signal input by the input end RFin is attenuated and output from the output end RFout, so that the functions of signal conversion and impedance matching are realized.
In order to comply with the current trend of rf passive devices, the dielectric substrate is a single-layer dielectric plate, and in one embodiment, the dielectric substrate is made of gallium arsenide (GaAs) material, and the ground pads are used for transmitting a common ground signal, and connecting the thin-film resistor to the ground terminal and grounding the thin-film resistor.
It can be understood that the attenuation of the attenuator chip is determined by the resistance of the thin film resistor, and the resistance of the thin film resistor is determined by the size of the thin film resistor, so that in the present embodiment, the sizes of the first thin film resistor R1, the second thin film resistor R2 and the third thin film resistor R3 can be set correspondingly according to the requirement to obtain attenuator chips with different attenuation.
Meanwhile, each signal terminal, the grounding bonding pad and the thin film resistor are of a square structure, and the positions and the sizes of the signal terminals, the grounding bonding pads and the thin film resistors can be correspondingly arranged according to process requirements and signal processing requirements, so that specific limitations are not required.
In one embodiment, the input terminal RFin, the first thin-film resistor R1, the second thin-film resistor R2 and the output terminal RFout are disposed in parallel along a first direction, the first ground pad P1 and the second ground pad P2 are disposed in parallel along a second direction parallel to the first direction, the first thin-film resistor R1 and the second thin-film resistor R2 are disposed perpendicular to the third thin-film resistor R3 and symmetrically disposed at two sides of the third thin-film resistor R3, and the first thin-film resistor R1 and the second thin-film resistor 2 have the same size.
In this embodiment, the first thin-film resistor R1 and the second thin-film resistor R2 are vertically and symmetrically disposed at two ends of the third thin-film resistor R2 to form a symmetrical T-shaped pure-resistance attenuator, thereby ensuring that the emission coefficient and the transmission coefficient of the two ports are consistent.
The material of the thin film resistor can be selected according to the process requirements and the application scenarios, and in one embodiment, the material of the first thin film resistor R1, the second thin film resistor R2, and the third thin film resistor R3 is a tantalum nitride material, and the tantalum nitride material can be applied in harsh environments.
Compared with the prior art, the embodiment of the utility model beneficial effect who exists is: the attenuator chip comprises a dielectric substrate, and an input end RFin, an output end RFout, a first thin-film resistor R1, a second thin-film resistor R2, a third thin-film resistor R3, a first grounding pad P1, a second grounding pad P2, a first grounding end B1, a second grounding end B2, a third grounding end B3 and a plurality of transmission lines, wherein the first thin-film resistor R1, the second thin-film resistor R2 and the third thin-film resistor R3 form a T-shaped pure resistance attenuator to perform signal processing on signals output by a signal source, and all components are integrated on the same chip by adopting an integrated passive device process, so that the chip has the characteristics of high integration level, small area, high attenuation precision, simple design and high reliability.
With continued reference to fig. 1, in one embodiment, the attenuator chip further includes a third ground pad, a fourth ground terminal B4, and a fifth ground terminal B5 in a square configuration;
the third ground pad is connected to the fourth ground terminal B4 through an eighth transmission line L8, and the fourth ground pad is connected to the fifth ground terminal B5 through a ninth transmission line L9.
In this embodiment, the fourth ground terminal B4 and the fifth ground terminal B5 are used for grounding, and the third ground pad P3 and the fourth ground pad P4 are used for facilitating the testing requirements of the probe station and performing grounding.
The positions and sizes of the third ground pad P3, the fourth ground pad P4, the fourth ground terminal B4 and the fifth ground terminal B5 may be set according to manufacturing processes and test requirements, in one embodiment, the first ground pad P1, the input terminal RFin and the third ground pad are arranged in parallel along a third direction perpendicular to the first direction, and the first ground pad P1 and the third ground pad are symmetrically arranged at two sides of the input terminal RFin;
the second ground pad P2, the output terminal RFout, and the fourth ground pad are disposed in parallel in a fourth direction parallel to the third direction, and the second ground pad P2 and the fourth ground pad are symmetrically disposed at both sides of the output terminal RFout.
The grounding pads are symmetrically arranged, so that the attenuator can be conveniently and symmetrically tested by the probe station, and meanwhile, in order to meet the current test assembly requirement, in one embodiment, the distances between the first grounding pad P1 and the third grounding pad and the input end RFin are 140-160 um;
the distance between the second ground pad P2 and the fourth ground pad and the output terminal RFout is 140um to 160 um.
Further, in order to achieve the effects of matching impedance and improving voltage standing wave ratio performance, in one embodiment, the transmission lines are linearly connected, and the first transmission line L1, the second transmission line L2, the third transmission line L3 and the fourth transmission line L4 have equal length and equal width;
the input terminal RFin and the output terminal RFout have the same size, and the first ground terminal B1, the second ground terminal B2, the third ground terminal B3, and the fourth ground terminal B4 have the same size.
In order to obtain different attenuation amounts, the sizes of the transmission lines and the thin film resistors can be set correspondingly, in one embodiment, the length range of the first transmission line L1 and the second transmission line L2 is 100 um-150 um, and the width range of the first transmission line L1 and the second transmission line L2 is 25 um-35 um;
the length range of the third transmission line L3 and the fourth transmission line L4 is 170 um-180 um and the width range is 25 um-35 um;
the length range of the first thin film resistor R1 and the second thin film resistor R2 is 2 um-10 um and the width range is 30 um-50 um, and the length range of the third thin film resistor R3 is 120 um-140 um and the width range is 10 um-20 um.
Through simulation design, in the embodiment, the attenuation amount of the attenuator chip is 1dB, as shown in fig. 2, the passband ranges from DC 0GHz to 40GHz, the attenuation accuracy of the attenuator is ± 0.2dB, the smaller the fluctuation is, the higher the attenuator accuracy of the attenuator is, as shown in fig. 3, in the embodiment, the in-band standing wave ratios are all better than 1.2, and the good frequency selectivity is achieved, wherein the standing wave ratio refers to the ratio of the antinode voltage to the valley voltage, the standing wave ratio is a numerical value, when the ratio is equal to 1, no reflection is completely emitted in signal transmission, which is the most ideal case, and the larger the ratio is, the more signal reflection is.
In another embodiment, the first and second transmission lines L1 and L2 have lengths ranging from 100um to 150um and widths ranging from 25um to 35 um;
the third transmission line L3 and the fourth transmission line L4 have a length ranging from 165um to 175um and a width ranging from 25um to 35 um;
the length range of first sheet resistance R1 and second sheet resistance R2 is 2um ~ 10um and width range is 25um ~ 35um, and the length range of third sheet resistance R3 is 100um ~ 110um and width range is 20um ~ 30 um.
Through simulation design, in the embodiment, the attenuation amount of the attenuator chip is 2dB, as shown in fig. 2, the passband ranges from DC 0GHz to 40GHz, the attenuation accuracy of the attenuator is ± 0.2dB, the smaller the fluctuation is, the higher the attenuator accuracy of the attenuator is, as shown in fig. 3, in the embodiment, the in-band standing wave ratios are all better than 1.2, and the good frequency selectivity is achieved, wherein the standing wave ratio refers to the ratio of the antinode voltage to the valley voltage, the standing wave ratio is a numerical value, when the ratio is equal to 1, no reflection is completely emitted in signal transmission, which is the most ideal case, and the larger the ratio is, the more signal reflection is.
In yet another embodiment, the first and second transmission lines L1 and L2 have lengths ranging from 120um to 170um and widths ranging from 35um to 45 um;
the third transmission line L3 and the fourth transmission line L4 have a length ranging from 175um to 185um and a width ranging from 25um to 35 um;
the length range of first sheet resistance R1 and second sheet resistance R2 is 2um ~ 10um and width range is 35um ~ 45um, and the length range of third sheet resistance R3 is 105um ~ 115um and width range is 35um ~ 45 um.
Through simulation design, in the embodiment, the attenuation amount of the attenuator chip is 3dB, as shown in fig. 2, the passband ranges from DC 0GHz to 40GHz, the attenuation accuracy of the attenuator is ± 0.2dB, the smaller the fluctuation is, the higher the attenuator accuracy of the attenuator is, as shown in fig. 3, in the embodiment, the in-band standing wave ratios are all better than 1.2, and the good frequency selectivity is achieved, wherein the standing wave ratio refers to the ratio of the antinode voltage to the valley voltage, the standing wave ratio is a numerical value, when the ratio is equal to 1, no reflection is completely emitted in signal transmission, which is the most ideal case, and the larger the ratio is, the more signal reflection is.
Further, in order to match the manufacturing process, in one embodiment, the input terminal RFin and the output terminal RFout are both 100um × 100um in size, and the ground terminal is 84um × 84um in size.
By adopting the integrated passive device process to integrate all the components on the same chip, the size of the chip can reach 0.62mm by 0.73mm by 0.1mm, the signal attenuation function is realized, the whole size of the attenuator chip is reduced, and the miniaturization of the chip is realized.
The above-mentioned embodiments are only used for illustrating the technical solution of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.
Claims (10)
1. An attenuator chip is characterized by comprising a dielectric substrate, and an input end, an output end, a first thin film resistor, a second thin film resistor, a third thin film resistor, a first grounding pad, a second grounding pad, a first grounding end, a second grounding end, a third grounding end and a plurality of transmission lines which are grown on the dielectric substrate, wherein the input end, the output end, the first thin film resistor, the second thin film resistor, the third thin film resistor, the first grounding pad, the second grounding pad, the first grounding end, the second grounding end and the third grounding end are all in a square structure;
the input end through first transmission line with the first end of first sheet resistance is connected, the second end of first sheet resistance the first end of second sheet resistance with the first end of third sheet resistance connects altogether, the second sheet resistance through the second transmission line with the output is connected, the second end of third sheet resistance through the third transmission line with first ground connection pad is connected and through the fourth transmission line with second ground connection pad is connected and through the fifth transmission line with the third earthing terminal is connected, first ground connection pad still through the sixth transmission line with first earthing terminal is connected, the second ground connection pad still through the seventh transmission line with the second earthing terminal is connected.
2. The attenuator chip of claim 1, further comprising a third ground pad, a fourth ground, and a fifth ground in a square configuration;
the third ground pad is connected to the fourth ground terminal through an eighth transmission line, and the fourth ground pad is connected to the fifth ground terminal through a ninth transmission line.
3. The attenuator chip according to claim 2, wherein the input terminal, the first thin film resistor, the second thin film resistor, and the output terminal are arranged in parallel in a first direction, the first ground pad and the second ground pad are arranged in parallel in a second direction parallel to the first direction, the first thin film resistor and the second thin film resistor are arranged perpendicularly to the third thin film resistor and symmetrically on both sides of the third thin film resistor, and the first thin film resistor and the second thin film resistor have the same size.
4. The attenuator chip of claim 3, wherein the first ground pad, the input terminal, and the third ground pad are disposed in parallel in a third direction perpendicular to the first direction, the first ground pad and the third ground pad being symmetrically disposed on both sides of the input terminal;
the second grounding pad, the output end and the fourth grounding pad are arranged in parallel along a fourth direction parallel to the third direction, and the second grounding pad and the fourth grounding pad are symmetrically arranged on two sides of the output end.
5. The attenuator chip of claim 2, wherein the first and third ground pads are each 140um to 160um from the input end;
the second ground pad with the fourth ground pad all with the distance between the output is 140um ~ 160 um.
6. The attenuator chip of claim 2, wherein the transmission lines are connected in a straight line, the first, second, third, and fourth transmission lines being equal in length and width;
the input terminal and the output terminal have the same size, and the first ground terminal, the second ground terminal, the third ground terminal and the fourth ground terminal have the same size.
7. The attenuator chip of claim 6, wherein the first transmission line and the second transmission line have a length in the range of 100um to 150um and a width in the range of 25um to 35 um;
the length range of the third transmission line and the fourth transmission line is 170 um-180 um, and the width range is 25 um-35 um;
first film resistance with second film resistance's length scope is 2um ~ 10um and width scope is 30um ~ 50um, third film resistance's length scope is 120um ~ 140um and width scope is 10um ~ 20 um.
8. The attenuator chip of claim 6, wherein the first transmission line and the second transmission line have a length in the range of 100um to 150um and a width in the range of 25um to 35 um;
the length range of the third transmission line and the fourth transmission line is 165 um-175 um, and the width range is 25 um-35 um;
first film resistance with second film resistance's length scope is 2um ~ 10um and width scope is 25um ~ 35um, third film resistance's length scope is 100um ~ 110um and width scope is 20um ~ 30 um.
9. The attenuator chip of claim 6, wherein the first transmission line and the second transmission line have a length in the range of 120um to 170um and a width in the range of 35um to 45 um;
the length range of the third transmission line and the fourth transmission line is 175 um-185 um, and the width range is 25 um-35 um;
first film resistance with second film resistance's length scope is 2um ~ 10um and width scope is 35um ~ 45um, third film resistance's length scope is 105um ~ 115um and width scope is 35um ~ 45 um.
10. The attenuator chip of claim 2, wherein the dielectric substrate is a gallium arsenide material and the first, second and third thin film resistors are tantalum nitride material.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120908826.3U CN215010191U (en) | 2021-04-28 | 2021-04-28 | Attenuator chip |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120908826.3U CN215010191U (en) | 2021-04-28 | 2021-04-28 | Attenuator chip |
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| CN215010191U true CN215010191U (en) | 2021-12-03 |
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