CN214900869U

CN214900869U - High-performance Bluetooth module

Info

Publication number: CN214900869U
Application number: CN202121514147.4U
Authority: CN
Inventors: 林建政
Original assignee: NANJING SOUNDAWARE CO Ltd
Current assignee: NANJING SOUNDAWARE CO Ltd
Priority date: 2021-07-05
Filing date: 2021-07-05
Publication date: 2021-11-26
Anticipated expiration: 2031-07-05

Abstract

The utility model discloses a high-performance Bluetooth module, belonging to the technical field related to data transmission, comprising a Bluetooth chip, a control module, a processing module, a first clock module, a second clock module and an output module; the Bluetooth chip is respectively connected with the control module and the processing module; the processing module is respectively connected with the first clock module, the second clock module, the output module and the control module; the problem of poor clock quality of the Bluetooth chip I2S is solved by two independent frequency doubling double clocks and directly acquiring data information from the Bluetooth chip; by the independent high-performance power supply, the phase noise of an audio frequency region is obviously reduced, and the clock precision is improved.

Description

High-performance Bluetooth module

Technical Field

The utility model relates to a data transmission correlation technique field, more specifically the bluetooth module who relates to a high performance that says so.

Background

The bluetooth module is a hands-free headset using bluetooth technology, which allows a user to easily use the headset in various ways without being caught by wires. Since the advent, bluetooth modules have been a good tool for improving efficiency of mobile commerce families, and have three categories, namely, monaural, stereo and true wireless, including three specifications of HSP, HFP and A2 DP.

With the higher standards of wireless bluetooth, the transmission speed is higher from bluetooth 4.0 to bluetooth 5.0. The audio standard for bluetooth has appeared 24bit96khz LDAC, LHDC, APTX-HD and the like from SBC, AAC, APTX and the like of early bluetooth 4.x, and with the support of the protocols, the data volume of transmitted audio is larger and larger, the requirement of lossless tone quality is surpassed, high definition audio is developed, and the distortion is lower and lower. The audio frequency requirement of common consumers is met, and deep music enthusiasts and feverish friends also generate great interest in the high-definition Bluetooth.

At present, two ways from a Bluetooth chip to analog output are provided, one is directly from a Bluetooth chip memory DA chip, analog output is performed, the other is standard digital audio output based on I2S, and a DA chip with higher performance is externally connected, so that better quality is obtained. However, in the prior art, because the quality of bluetooth I2S is not high, high-definition bluetooth is supported from 32khz to 96khz, the accuracy of the phase-locked loop of the original bluetooth is completely not up to the requirement of the real high-fidelity I2S, and even if the back end adopts a high-end decoding scheme, the sound quality of the bluetooth cannot be compared with the real HIFI high-end digital playback or CD player. Therefore, the development of high-fidelity high-definition bluetooth is a problem to be solved urgently by those skilled in the art.

SUMMERY OF THE UTILITY MODEL

In view of this, the utility model provides a bluetooth module of high performance for solve the emergence of bluetooth module distortion problem among the prior art.

In order to achieve the above purpose, the utility model adopts the following technical scheme:

a high-performance Bluetooth module comprises a Bluetooth chip, a control module, a processing module, a first clock module, a second clock module and an output module; the Bluetooth chip is respectively connected with the control module and the processing module; the processing module is respectively connected with the first clock module, the second clock module, the output module and the control module;

the control module is used for receiving interrupt information and sampling information sent by the Bluetooth chip;

the processing module is used for receiving the sampling information of the control module and the transmission information of the Bluetooth chip; generating corresponding I2S clock information according to the received clock information of the first clock module and the second clock module; sending the I2S clock information and the transmission information to the output module;

the first clock module and the second clock module are used for providing fixed-frequency-doubled clock signals for the processing module;

the output module is used for converting the information received from the processing module into analog information and outputting the analog information.

Preferably, the sampling information includes a sampling rate.

Preferably, the processing module aligns the transmission information with the I2S clock information to generate digital I2S information, and transmits the digital I2S information to the output module.

Preferably, the processing module uses an independent high-performance power supply.

The advantage is that the use of an independent high performance power supply reduces phase noise in the audio region and improves clock accuracy.

Preferably, the processing module comprises a DSP or an FRGA.

According to the technical scheme, compared with the prior art, the utility model discloses a high-performance Bluetooth module, which solves the problem of poor clock quality of a Bluetooth chip I2S by two independent frequency doubling double clocks and directly acquiring data information from the Bluetooth chip; by the independent high-performance power supply, the phase noise of an audio frequency region is obviously reduced, and the clock precision is improved.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.

FIG. 1 is a schematic structural diagram of the present invention;

FIG. 2 is a schematic diagram of a specific structure of an embodiment of the present invention;

fig. 3 is a circuit diagram of an embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

The embodiment of the utility model discloses a high-performance Bluetooth module, as shown in figure 1, comprising a Bluetooth chip, a control module, a processing module, a first clock module, a second clock module and an output module; the Bluetooth chip is respectively connected with the control module and the processing module; the processing module is respectively connected with the first clock module, the second clock module, the output module and the control module; the Bluetooth chip adopts a high-pass Bluetooth 5.0 chip, the control module is an MCU, the processing module is an independent DSP or FRGA or a device containing a DSP, the output device is a DAC, and the clocks are 11.2896MHZ/22.5792MHZ and 12.288MHZ/24.576 MHZ.

In the embodiment, the independent 44.1khz, 48khz frequency-doubled dual-tone ultra-low noise high-precision clock outputs the I2S three clocks (MCLK, LRCLK, BCLK) through the DSP or the FPGA independently, and simultaneously, data is acquired from the Bluetooth chip, so that the problem of poor clock quality of the I2S of the Bluetooth chip is solved.

As shown in fig. 2, the MCU coordinates the operations of the bluetooth chip and the DSP/FPGA, and two audio-level high-performance clocks (low noise and low jitter) externally input to the DSP/FPGA are directly used for I2S integer frequency division to ensure I2S quality and directly output to the DAC, and the DSP/FPGA obtains audio data from the bluetooth chip and obtains the sampling rate and bit information of the current data from the MCU.

The playing process comprises the following steps:

the Bluetooth chip actively sends out an interrupt to the MCU to inform the MCU that new audio data arrives, the MCU simultaneously reads information such as sampling rate, digit and the like given by the Bluetooth and sends the information to the DSP/FPGA, the FPGA adopts a corresponding clock to generate a clock required by I2S, and simultaneously, the data of the Bluetooth is aligned with the clock and is sent to the DAC.

The method specifically comprises the following steps: when a user plays 24bit and 88.2khz music through the Bluetooth, the Bluetooth firstly informs that new data and sampling information come, the MCU reads the information through interruption and informs the DSP or the FPGA, the DSP/FPGA directly adopts multiples of 11.2896MHZ/22.5792MHZ (the frequency is a multiple relation of 88.2 khz) to synthesize corresponding I2S, and obtains data from a data read-through channel of the Bluetooth, and the data is aligned with an I2S clock and then transmitted to the DAC, so that the quality improvement of the Bluetooth I2S is completed.

Because of the independent frequency multiplication double clock, no phase-locked loop exists, and meanwhile, the DSP/FPGA independently adopts a high-performance power supply, the phase noise of an audio frequency region is reduced, the clock precision is improved, and the performance of a high-end DA chip is fully exerted.

The Bluetooth chip of the embodiment adopts a CSR8675 Bluetooth 5.0 chip module; the clock adopts a dual clock with the frequency of 22.5792MHZ and 24.576 MHZ; the DSP uses AKM4490DA chip containing DSP.

The specific circuit diagram is as follows:

pin 1 on the Bluetooth 5.0 chip is connected with one end of a resistor R5, the other end of the resistor R5 is connected with one end of a capacitor C163, the other end of the capacitor C163 is connected with one end of a resistor R225 and one end of a resistor R226 respectively, the other end of the resistor R225 is connected with pin 10, and one end of the resistor R226 is grounded; leading-out wires connected with the pins 2 and 3 are respectively connected with the FPGA from the connecting ends of the resistor R225, the resistor R226 and the capacitor C163;

one end of the capacitor C114 is connected with the pin 10, and the other end is connected with the pin 11; pin 10 is a power supply terminal, and pin 11 is a ground terminal;

pin 16, pin 17, pin 18 and pin 29 are connected to the MCU respectively;

the pins 19 and 20 are connected with the LED;

the resistor R57 is connected with the pin 22 and outputs 1.8V power;

one end of the inductor L1 is connected with the pin 39, one end of the inductor L1 is connected with one end of the capacitor C145, the other end of the capacitor C145 is connected with the pin 38, and a capacitor C99 is connected between the pin 39 and the pin 38;

pin 11, pin 30, and pin 40 are all grounded.

The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A high-performance Bluetooth module is characterized by comprising a Bluetooth chip, a control module, a processing module, a first clock module, a second clock module and an output module; the Bluetooth chip is respectively connected with the control module and the processing module; the processing module is respectively connected with the first clock module, the second clock module, the output module and the control module;

the processing module is used for receiving the sampling information of the control module and the transmission information of the Bluetooth chip; generating corresponding I2S clock information according to the received clock information of the first clock module and the second clock module; sending the I2S clock information and the transmission information to the output module; the first clock module and the second clock module are used for providing fixed-frequency-doubled clock signals for the processing module;

2. The bluetooth module of claim 1, wherein the sampling information comprises a sampling rate.

3. The bluetooth module of claim 2, wherein the processing module aligns the transmission information with the I2S clock information to generate digital I2S information, and transmits the digital I2S information to the output module.

4. A high-performance bluetooth module according to any of claims 1 to 3, characterized in that the processing module uses an independent power supply.

5. The module of claim 4, wherein the processing module comprises a DSP or an FRGA.