CN214849533U - Optical chip packaging base - Google Patents
Optical chip packaging base Download PDFInfo
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- CN214849533U CN214849533U CN202120756181.6U CN202120756181U CN214849533U CN 214849533 U CN214849533 U CN 214849533U CN 202120756181 U CN202120756181 U CN 202120756181U CN 214849533 U CN214849533 U CN 214849533U
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- optical chip
- lead wire
- metal substrate
- lead
- chip package
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Abstract
The utility model discloses an optical chip packaging base, including metal substrate, a RF lead wire and an at least DC lead wire, be equipped with two at least mounting holes on the metal substrate, the cover is equipped with the glass installed part with the sintering on RF lead wire and the DC lead wire respectively, RF lead wire and DC lead wire can be dismantled through the glass installed part respectively and fix in each mounting hole. The utility model discloses be applied to 5G technical field.
Description
Technical Field
The utility model relates to a 5G technical field, concretely relates to optical chip encapsulates base.
Background
The optical chip packaging base is used in an optical communication system as a key component in a light emitting device, and is a basic element with high precision and high performance which is important for linking a light emitting source, modulation and physical layer driving. As an optical communication device, the online life of a product is required to be more than 20 years, which provides very challenging severe requirements for the packaging of the optical device, and the requirements of dust prevention, water prevention, corrosion prevention and the like are needed in the structure, and index characteristics such as optical performance, electrical performance and the like are also required to be ensured under the conditions of high and low temperature resistance, double 85 resistance and the like in the environment. In addition to good optical signal coupling to reduce loss, high hermeticity and solderability requirements are also required in the art.
In the prior art, the PiN feet of the traditional optical chip coaxial packaging base cannot be reasonably and flexibly matched according to actual chip functions, gold wire bonding precision is high, special equipment is expensive, packaging cost is high, potential risks are brought to airtightness, great difficulty is brought to assembly, yield is low, precision is difficult to control, and cost is high.
SUMMERY OF THE UTILITY MODEL
Technical problem to be solved
An optical chip packaging base solves the technical problems of low assembly compatibility, low yield, difficulty in controlling precision and high cost.
(II) technical scheme
In order to solve the technical problem, the utility model provides an optical chip packaging base, including metal substrate, a RF lead wire and an at least DC lead wire, be equipped with two at least mounting holes on the metal substrate, the cover is equipped with respectively on RF lead wire and the DC lead wire with the glass installed part of sintering, RF lead wire and DC lead wire can be dismantled through the glass installed part respectively and fix in each mounting hole.
In a further improvement, the metal substrate is further provided with a microstrip plate, and the microstrip plate is respectively connected with the metal substrate and the RF lead through welding.
In a further improvement, the microstrip plate is used for manufacturing a high-speed signal microstrip plate by using an ultrahigh-frequency SiC-based film.
In a further improvement, gold plating layers are respectively arranged on the metal substrate, the RF lead wire, the DC lead wire, the glass mounting piece and the microstrip plate.
In a further improvement, a TEC thermoelectric cooler is further arranged on the metal substrate, a PD monitoring chip is arranged on the TEC thermoelectric cooler, and an optical chip is arranged on the PD monitoring chip.
In a further improvement, the base is provided with a tungsten copper block, and the optical chip is arranged on the tungsten copper block.
In a further improvement, the RF lead has a diameter of 0.2mm and the DC lead has a diameter of 0.33 mm.
In a further refinement, the glass mount is cylindrical or profiled.
In a further improvement, the glass mounting member has an expansion coefficient of 32 x 10 < -7 >/K to 56 x 10 < -7 >/K and a dielectric constant of 4 to 6.
(III) advantageous effects
The utility model discloses an optical chip packaging base, DC lead wire and RF lead wire are collectively called the Pin foot. The DC leads can be combined randomly according to actual chip functions and can be 3, 5, 6 and 7, so that the application range and flexibility are increased, the material types are reduced, the flexible application is realized, the cost is reduced, different functions are realized, and the problem of compatibility of packaging of large and small optical chips is solved.
The RF lead wire can realize continuous impedance matching of 25, 50, 75 ohms and the like through matching with the dielectric constant of the glass mounting component under the condition of ultra high speed, so that the continuity of impedance is enhanced, the coupling flexibility and performance of signals are effectively provided, and the integrity of the signals is ensured.
The utility model discloses an optical chip packaging base, simple structure, equipment are convenient, with the help of sintering process, adopt the glass installed part of sintering, can solve traditional optical chip packaging base processing procedure yield low, defect with high costs, can effectively reduce the preparation degree of difficulty and manufacturing cost, improve product yield and market competition, reach fast production, the purpose of delivering fast. The coupling performance of signals is effectively improved, the integrity of the signals is ensured, and the product competitiveness is improved.
Drawings
Fig. 1 is a schematic structural diagram of an optical chip package base according to an embodiment of the present invention;
FIG. 2 is an exploded view of FIG. 1;
fig. 3 is a schematic structural diagram of a base for an optical chip package in the prior art.
Detailed Description
The following detailed description of the embodiments of the present invention is provided with reference to the accompanying drawings and examples. The following examples are intended to illustrate the invention, but are not intended to limit the scope of the invention.
In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for convenience of description and simplicity of description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Referring to fig. 1 to 3, an optical chip package base includes a metal substrate 1, an RF lead 2 and at least one DC lead 3, where the metal substrate 1 is provided with at least two mounting holes 11, the RF lead 2 and the DC lead 3 are respectively sleeved with a glass mounting member 4, and the RF lead 2 and the DC lead 3 are respectively detachably fixed in the mounting holes 11 through the glass mounting member 4.
The optical chip package base of the present embodiment, the DC lead 3 and the RF lead 2 are collectively referred to as PiN pins. The DC lead wires 3 can be combined randomly according to actual chip functions, and can be 3, 4, 5, 6 and 7, so that the application range and flexibility are increased, the material types are reduced, the flexible application is realized, the cost is reduced, different functions are realized, and the problem of compatibility of large and small optical chip packages is solved.
The RF lead 2 can realize continuous impedance matching of 25, 50, 75 ohms and the like under the condition of ultra high speed through matching with the dielectric constant of the glass mounting component 4, so that the continuity of the impedance is enhanced, the coupling flexibility and performance of signals are effectively provided, and the integrity of the signals is ensured.
The optical chip packaging base of this embodiment, simple structure, equipment are convenient, with the help of sintering process, adopt the glass installed part 4 of sintering, can solve traditional optical chip packaging base processing procedure yield and low, defect with high costs, can effectively reduce the preparation degree of difficulty and manufacturing cost, improve product yield and market competition, reach the purpose of rapid production, rapid delivery. The coupling performance of signals is effectively improved, the integrity of the signals is ensured, and the product competitiveness is improved.
Further, in an embodiment, the metal substrate 1 is further provided with a microstrip plate 12, and the microstrip plate 12 is connected to the metal substrate 1 and the RF lead 2 by welding, so as to electrically modulate a high-speed signal line, and load the high-speed signal line onto an active electrode on the optical chip 5 to generate a high-speed optical signal.
Further, in an embodiment, the microstrip plate 12 is a microstrip plate for manufacturing a high-speed signal for an ultrahigh frequency SiC-based thin film, so that the high-speed performance of the interconnection line of the RF lead 2 is greatly enhanced, and an ultrahigh frequency bandwidth of 25GHz and 50G or more can be realized. Preferably, gold and tin grow on the back of the microstrip plate, and the gold and tin can be directly eutectic technically, so that full-automatic and large-scale production is realized, the efficiency and yield are improved, the cost is reduced, and the competitiveness of products is improved. Specifically, the high-speed signal microstrip plate manufactured by the ultrahigh-frequency SiC-based film adopts semiconductor process physical vapor deposition and metallized pattern processing, is easy for batch production, reduces the process difficulty by adopting a photoetching technology, and has strong consistency and stable performance.
Further, in an embodiment, gold plating layers are respectively disposed on the metal substrate 1, the RF leads 2, the DC leads 3, the glass mount 4, and the microstrip board 12, and the gold plating layers have an anti-corrosion function.
Further, in an embodiment, a TEC thermoelectric refrigerator 13 is further disposed on the metal substrate 1, a tungsten copper block 14 is disposed on the TEC thermoelectric refrigerator 13, and an optical chip 5 is disposed on the tungsten copper block 14. Specifically, the PD monitoring chip 15 is a PD chip, and the optical chip 5 is a Laser chip optical chip. The TEC thermoelectric refrigerator 13 has the advantages of heat dissipation and heat conduction performance, strong compatibility, simple structure, improved component manufacturing process yield, higher efficiency and lower manufacturing cost.
Further, in an embodiment, the PD14 is provided with a tungsten copper block 15, the optical chip 5 is provided on the tungsten copper block 15, and the tungsten copper block 15 is used for the function of the pad PD 14.
Further, in one embodiment, the RF lead 2 has a diameter of 0.2mm and the DC lead has a diameter of 0.33 mm. Fix RF lead wire 2 in the glass installed part 4 of the mounting hole 11 of metal substrate 1, with the sintering of glass installed part 4 to certain expansion coefficient matches for RF lead wire 2 is fine fixed, and guarantees the gas tightness, simple structure, and the equipment is also very convenient, and the processing procedure is efficient, and the yield is high.
Further, in an embodiment, the glass mount 4 is cylindrical or shaped, and the glass mount 4 may be shaped as desired as shown in fig. 1-2.
Further, in one embodiment, the glass mounting member 4 has an expansion coefficient of 32 × 10-7/K to 56 × 10-7/K and a dielectric constant of 4 to 6.
Based on the combination of the above embodiments, in an embodiment, the microstrip board with the high-speed signal made of the ultrahigh frequency SiC-based thin film is subjected to high-speed interconnection metallization by a VLSi chip-level semiconductor process physical vapor deposition epitaxial growth technology, and a pattern on the microstrip board 12 is processed by plasma and dry etching. The method comprises the following steps that 7 DC leads 3 made of special materials are distributed and inserted into 7 mounting holes 11 in an annular arrangement mode, another DC lead 3 is used as a grounding wire and brazed to the bottom of a stamping part to be grounded, and meanwhile, glass mounting pieces 4 on the DC leads 3 are fastened through insulators with expansion coefficients matched strictly and high-airtightness sintering processes of 800-1000 ℃ and metal, so that air leakage cannot occur in a certain air pressure environment, and certain air tightness is guaranteed. The entire optical chip package base (including the metal substrate 1, the RF leads 2, the DC leads 3, the glass mount 4, and the microstrip plate 12) is then subjected to pure gold plating to form a gold plating layer on the surface thereof, thereby ensuring corrosion resistance and reducing loss. The 7 DC leads 3 can be combined and matched at will according to actual chip function requirements, for example, only 3, 4, 5 and 6 are used, flexible application is realized, and different Pin function requirements are met. And then, the prepared microstrip board 12 is solidified on the step at the tail end of the RF lead 2 through an eutectic welding process, and the high-speed signal transmission lines are interconnected through gold-tin spot welding to ensure the integrity of the high-speed signals.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.
Claims (8)
1. The utility model provides an optical chip packaging base, its characterized in that includes metal substrate, a RF lead wire and an at least DC lead wire, be equipped with two at least mounting holes on the metal substrate, the cover is equipped with respectively on RF lead wire and the DC lead wire with the glass installed part of sintering, RF lead wire and DC lead wire can be dismantled through the glass installed part respectively and fix in each mounting hole.
2. The optical chip package base according to claim 1, wherein the metal substrate is further provided with a microstrip plate, and the microstrip plate is connected to the metal substrate and the RF lead by soldering, respectively.
3. The optical chip package base of claim 2, wherein the microstrip board is a microstrip board for high speed signal fabrication from ultra high frequency SiC based thin films.
4. The optical chip package base of claim 2, wherein the metal substrate, the RF leads, the DC leads, the glass mount, and the micro-strip plate are each provided with a gold plating layer thereon.
5. The optical chip package base according to claim 1, wherein a TEC thermoelectric cooler is further disposed on the metal substrate, a tungsten copper block is disposed on the TEC thermoelectric cooler, the optical chip is disposed on the tungsten copper block, and a PD monitoring chip is disposed on the base.
6. The optical chip package base according to claim 5, wherein the PD is provided with a tungsten copper block, and the optical chip is provided on the tungsten copper block.
7. The photonic chip package base of any of claims 1 to 6, wherein the RF lead has a diameter of 0.2mm and the DC lead has a diameter of 0.33 mm.
8. The optical chip package base according to any one of claims 1 to 6, wherein the glass mounting member has an expansion coefficient of 32 x 10 "7/K to 56 x 10" 7/K and a dielectric constant of 4 to 6.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN202120756181.6U CN214849533U (en) | 2021-04-13 | 2021-04-13 | Optical chip packaging base |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN202120756181.6U CN214849533U (en) | 2021-04-13 | 2021-04-13 | Optical chip packaging base |
Publications (1)
Publication Number | Publication Date |
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CN214849533U true CN214849533U (en) | 2021-11-23 |
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Family Applications (1)
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CN202120756181.6U Active CN214849533U (en) | 2021-04-13 | 2021-04-13 | Optical chip packaging base |
Country Status (1)
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CN (1) | CN214849533U (en) |
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2021
- 2021-04-13 CN CN202120756181.6U patent/CN214849533U/en active Active
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