CN214846702U - Electronic equipment - Google Patents

Electronic equipment Download PDF

Info

Publication number
CN214846702U
CN214846702U CN202121647626.3U CN202121647626U CN214846702U CN 214846702 U CN214846702 U CN 214846702U CN 202121647626 U CN202121647626 U CN 202121647626U CN 214846702 U CN214846702 U CN 214846702U
Authority
CN
China
Prior art keywords
control circuit
capacitive
matching circuit
inductive
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202121647626.3U
Other languages
Chinese (zh)
Inventor
张文勋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Vivo Mobile Communication Co Ltd
Original Assignee
Vivo Mobile Communication Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Vivo Mobile Communication Co Ltd filed Critical Vivo Mobile Communication Co Ltd
Priority to CN202121647626.3U priority Critical patent/CN214846702U/en
Application granted granted Critical
Publication of CN214846702U publication Critical patent/CN214846702U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Power Sources (AREA)

Abstract

本申请公开了一种电子设备,包括:控制电路、通用串行总线USB接口和匹配电路;所述匹配电路连接于所述控制电路与目标端子之间,所述目标端子为USB接口上的供电端子或数据端子;其中,所述匹配电路对应的直流阻抗值在预设范围内;并且,在电磁干扰测试的测试频段内,所述匹配电路和所述控制电路所组成电路的等效电阻值与USB线缆上连接所述目标端子的导线对应的特征阻抗值相同。

Figure 202121647626

The present application discloses an electronic device, comprising: a control circuit, a universal serial bus (USB) interface and a matching circuit; the matching circuit is connected between the control circuit and a target terminal, and the target terminal is a power supply on the USB interface terminal or data terminal; wherein, the DC impedance value corresponding to the matching circuit is within a preset range; and, within the test frequency band of the electromagnetic interference test, the equivalent resistance value of the circuit formed by the matching circuit and the control circuit The characteristic impedance value corresponding to the wire connected to the target terminal on the USB cable is the same.

Figure 202121647626

Description

Electronic device
Technical Field
The application relates to the technical field of electronic products, in particular to an electronic device.
Background
An electronic device having a circuit board usually generates a Magnetic field along with the flow of a circuit when the electronic device is powered on, and an electromagnetic Compatibility (EMC) standard is established to avoid the influence of the Magnetic field generated by the electronic device when the electronic device is powered on itself and surrounding people and articles. Among them, the electromagnetic interference (RE) test in the EMC test mainly considers the radiation interference strength of the electronic device to the external environment in the working state. For example: in a scenario where an electronic device is connected to an external device for charging or data transmission through a Universal Serial Bus (USB) cable, data lines D + and D-in the USB cable transmit high-speed digital signals, which may generate electromagnetic interference when radiated to the surroundings. In order to ensure that the radiation interference generated by the USB cable can meet the EMC standard when the electronic equipment is connected with the USB cable for working, the structure of the USB cable needs to be specially designed (such as adding a cable shielding layer, grounding and the like), and the design mode is complex and has higher cost.
SUMMERY OF THE UTILITY MODEL
The embodiment of the application provides electronic equipment to solve the problems that the design mode that the radiation interference generated by a USB cable can meet the EMC standard is complex and the cost is high when the electronic equipment is connected with the USB cable for work at present.
In order to solve the technical problem, the present application is implemented as follows:
an embodiment of the present application provides an electronic device, including: the USB interface comprises a control circuit, a USB interface and a matching circuit;
the matching circuit is connected between the control circuit and a target terminal, and the target terminal is a power supply terminal or a data terminal and a grounding terminal on the USB interface;
the direct current impedance value corresponding to the matching circuit is in a preset range; and in the testing frequency band of the electromagnetic interference test, the equivalent resistance value of a circuit formed by the matching circuit and the control circuit is the same as the characteristic impedance value corresponding to a lead connected with the target terminal on the USB cable.
Thus, in the above scheme of the application, by arranging the matching circuit between the control circuit of the electronic device and the USB interface, and setting the dc impedance value corresponding to the matching circuit within the preset range, and within the test frequency band of the electromagnetic interference test, the equivalent resistance value of the circuit formed by the matching circuit and the control circuit is the same as the characteristic impedance value corresponding to the wire connected to the target terminal on the USB cable, the matching circuit can absorb the radiation energy on the USB cable, avoid forming standing waves, and thereby reduce the radiation interference generated by the USB cable to meet the EMC standard; and the complexity of structural design for the USB cable can be reduced, so that the cost is reduced.
Drawings
FIG. 1 shows one of the block diagrams of an electronic device of an embodiment of the application;
FIG. 2 is a schematic diagram of EMI test frequency points according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a characteristic impedance circle of a Vbus line according to an embodiment of the present application;
FIG. 4 shows a second block diagram of an electronic device according to an embodiment of the present application;
FIG. 5 shows one of the schematic diagrams of the matching circuit of an embodiment of the present application;
FIG. 6 shows one of the schematic diagrams of impedance adjustment of an embodiment of the present application;
FIG. 7 is a second schematic diagram of a matching circuit according to an embodiment of the present application;
FIG. 8 is a third schematic diagram of a matching circuit according to an embodiment of the present application;
FIG. 9 is a second schematic diagram illustrating impedance adjustment according to an embodiment of the present application;
FIG. 10 is a graph showing the results of an EMI test according to an embodiment of the present application;
FIG. 11 is a third block diagram of an electronic device according to an embodiment of the present application;
FIG. 12 is a fourth schematic diagram of a matching circuit according to an embodiment of the present application;
fig. 13 shows a fifth schematic diagram of a matching circuit according to an embodiment of the present application.
Detailed Description
Exemplary embodiments of the present application will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
As shown in fig. 1, an embodiment of the present application provides an electronic device 10, including: a control circuit 11, a USB interface 12 and a matching circuit 13.
The matching circuit 13 is connected between the control circuit 11 and a target terminal, and the target terminal is a power supply terminal or a data terminal on the USB interface 12; wherein, the dc impedance value corresponding to the matching circuit 13 is within a preset range; in the testing frequency band of the electromagnetic interference test, the equivalent resistance value of the circuit formed by the matching circuit 13 and the control circuit 11 is the same as the characteristic impedance value corresponding to the wire connected to the target terminal on the USB cable 30.
Alternatively, the electronic device 10 may be connected to the USB cable 30 through the USB interface 12, and the USB cable 30 may be connected to the external device 20. If the external device can be a charger, the charger and the electronic device 10 can communicate through the USB cable 30, and the charger can also charge the electronic device through the USB cable 30; alternatively, the external device may be a computer, a mobile phone, or the like, and the external device and the electronic device may perform communication (such as data transmission) or the like through the USB cable 30.
Optionally, the preset range may be an impedance range that the matching circuit 13 can allow direct current to pass through, and for example, the preset range may be an impedance range that approaches to 0, that is, the direct current impedance value of the matching circuit 13 may approach to 0, and specifically, the preset range may be designed according to an actual circuit, and it is only necessary that the matching circuit 13 can allow direct current to pass through.
Alternatively, the test frequency band may be a frequency range within a preset fluctuation range of the electromagnetic interference test frequency point, where the electromagnetic interference test frequency point (or referred to as RE frequency point) is a salient point of the electromagnetic interference test, such as a position P shown in fig. 2. For example: the RE frequency point can be in the range of 100MHz to 200 MHz.
Alternatively, the equivalent resistance value of the circuit formed by the matching circuit 13 and the control circuit 11 may be the same as the characteristic impedance value corresponding to the wire connected to the target terminal on the USB cable 30, and the equivalent resistance value of the circuit formed by the matching circuit 13 and the control circuit 11 may be the same as the characteristic impedance value corresponding to the wire connected to the target terminal on the USB cable 30. For example: the characteristic impedance value corresponding to the wire connected to the target terminal on the USB cable 30 is 25 Ω, and the matching circuit 13 needs to meet the requirement that the equivalent resistance value of the circuit formed by the matching circuit 13 and the control circuit 11 is on an equal impedance circle (e.g., a dashed arc shown in fig. 3) of 25 Ω in the test frequency band of the electromagnetic interference test.
Optionally, the equivalent resistance value of the circuit formed by the matching circuit 13 and the control circuit 11 is the same as the characteristic impedance value corresponding to the wire connected to the target terminal on the USB cable 30, or the difference between the equivalent resistance value of the circuit formed by the matching circuit 13 and the control circuit 11 and the characteristic impedance value corresponding to the wire connected to the target terminal on the USB cable 30 is within a preset error range, which is required to satisfy that the matching circuit 13 can absorb the radiation energy on the USB cable 30 to satisfy the EMC standard. For example: the preset error range may be determined in advance through experiments or simulations, and the embodiment of the present application is not limited thereto.
Alternatively, the power supply terminal may also be referred to as a Vbus terminal or a Vbus pin, the data terminal may include a data positive (D +) terminal (or referred to as a D + pin) and a data negative (D-) terminal (or referred to as a D-pin), and the D + terminal and the D-terminal may serve as a data transmission differential line for communicating and transmitting a differential signal with the external device 20. The number of data terminals in one USB interface 12 may be 2, 4 or other numbers, for example, the data terminals may include a CC terminal, a TX terminal, an RX terminal, an SBU terminal, etc. in addition to a D + terminal and a D-terminal; of course, the USB interface may further include a ground terminal (also referred to as a GND terminal or a GND pin), and the embodiment of the present application is not limited thereto.
Alternatively, in the case where the number of matching circuits 13 is 1, the matching circuit 13 may be provided between the power supply terminal and the control circuit 11, or between one data terminal and the control circuit 11; when the number of the matching circuits 13 is plural, the matching circuit 13 may be disposed between one target terminal and the control circuit 11, and the embodiment of the present application is not limited thereto.
Alternatively, the matching circuit 13 is provided on a line where the target terminal is connected to the control circuit 11, and the matching circuit 13 is provided on a side close to the USB interface 12. For example, the control circuit 11 may include a power management chip, a Micro Controller Unit (MCU), a charging chip, and the like. When the matching circuit 13 is arranged on the line corresponding to the power supply terminal, the matching circuit 13 can be arranged between the power supply terminal and the power management chip; when the matching circuit 13 is provided on the line corresponding to the data terminal, the matching circuit 13 may be provided between the data terminal and the micro control unit. Specifically, in different electronic devices, connection lines between terminals in the USB interface 12 and the control circuit 11 may be different, and the setting position of the matching circuit 13 depends on the connection line between the target terminal connected thereto and the control circuit 11, which is not limited in the embodiment of the present application.
In the above scheme, by arranging the matching circuit 13 between the control circuit 11 and the USB interface 12 of the electronic device, and setting the dc impedance value corresponding to the matching circuit 13 within the preset range, and within the test frequency band of the electromagnetic interference test, the equivalent resistance value of the circuit formed by the matching circuit 13 and the control circuit 11 is the same as the characteristic impedance value corresponding to the wire connected to the target terminal on the USB cable 30, so that the matching circuit 13 can absorb the radiation energy on the USB cable 30, avoid forming standing waves, and reduce the radiation interference generated by the USB cable 30 to meet the EMC standard; and also can reduce the complexity of structural design for the USB cable 30 to reduce cost.
The matching circuit 13 according to the embodiment of the present application will be described below with reference to an example in which the matching circuit 13 is provided on a corresponding line of a power supply terminal:
as shown in fig. 4 and 11, the control circuit 11 includes a power supply 111; when the target terminal is the power supply terminal Vbus, one end of the matching circuit 13 is connected to the power supply 111, and the other end of the matching circuit 13 is connected to the power supply terminal Vbus. For example: the output voltage of the power supply 111 may be 5V.
As shown in fig. 4, the control circuit 11 may further include: and a decoupling capacitor assembly 112, wherein one end of the decoupling capacitor assembly 112 is connected to the power supply 111, and the other end of the decoupling capacitor assembly 112 is grounded. Wherein the decoupling capacitor assembly 112 may perform power supply ripple decoupling.
Optionally, the matching circuit 13 includes: an inductive component and a capacitive component; the inductive component is connected in series between the target terminal and the control circuit 11; one end of the capacitive component is connected to the inductive component, and the other end of the capacitive component is grounded.
The inductive component can be understood as a component with inductive effect formed by one or more components, such as a component with inductive effect formed by combining a capacitor, an inductor, a resistor and other components; a capacitive component is understood to be a component with a capacitive effect formed by one or more elements, such as a component with an inductive effect formed by a combination of capacitive, inductive, resistive, etc. elements.
Alternatively, the impedance values of the inductive component and the capacitive component may be determined based on the impedance value of the matching circuit 13 corresponding to the side of the connection terminal of the control circuit 11 to the control circuit 11, and the characteristic impedance value corresponding to the wire connected to the target terminal on the USB cable.
The equivalent impedance value of the control circuit is lower than a first threshold in the test frequency band of the electromagnetic interference test, in other words, the equivalent impedance value of the control circuit presents low impedance characteristic (close to a short circuit point) in the test frequency band of the electromagnetic interference test; wherein the equivalent impedance value of the control circuit may be an equivalent impedance value of a circuit provided to the left of the node a in fig. 4.
As shown in fig. 4, in the case where the control circuit 11 is provided with a decoupling capacitor assembly 112:
as an implementation, as shown in fig. 5, the inductive component comprises a first inductive element L1, and the capacitive component comprises a first capacitive element C1.
The first inductive element L1 is connected in series between the control circuit 11 and the target terminal; the first end of the first capacitive element C1 is connected to a first connection end, and the second end of the first capacitive element C1 is grounded; wherein the first connection end is located between the first inductive element L1 and the target terminal.
It should be understood that the first connection end is located between the first inductive element L1 and the target terminal, including the case where the first connection end is the connection end of the first inductive element L1 or the target terminal.
Optionally, the first inductive element L1 may be a magnetic bead or an inductor, and the first capacitive element C1 is a capacitor or other capacitive devices, which is not limited in this embodiment.
As shown in fig. 6, at the RE frequency point, the impedance value of the a-side direction of the node a (i.e., the equivalent impedance value of the control circuit) is low impedance (region M), and the function of L1 is to change the impedance of the node a to the impedance of the node b, i.e., the arrow 1 path length (depending on the inductance value of L1). The role of C1 is to adjust the impedance of node b to the characteristic impedance circle 3 corresponding to the Vbus line in the USB cable, i.e. the arrow 2 path length (depending on the capacitance value of C1).
As another implementation, as shown in fig. 7, the inductive component includes a second inductive element L2 and a third inductive element L3, and the capacitive component includes a second capacitive element C2. The L2, L3, and C2 may be combined into an L-type, a T-type, or a pi-type, and the like, which is not limited in the embodiments of the present application.
For example: the second inductive element L2 and the third inductive element L3 are sequentially connected in series between the control circuit 11 and the target terminal; the first end of the second capacitive element C2 is connected to a second connection end, and the second end of the second capacitive element C2 is grounded; wherein the second connection terminal is located between the second inductive element L2 and the third inductive element L3.
It should be appreciated that the second connection terminal is located between the second inductive element L2 and the third inductive element L3, including the case where the second connection terminal is the connection terminal of the second inductive element L2 or the connection terminal of the third inductive element L3.
Optionally, the second inductive element L2 may be a magnetic bead or an inductor, the third inductive element L3 may be a magnetic bead or an inductor, and the second capacitive element C2 is a capacitor or other capacitive device, which is not limited in this embodiment.
Similar to fig. 6, at the RE frequency point, the impedance value of the a-side direction of the node a (i.e. the equivalent impedance value of the control circuit) is low impedance (region M), and the function of L2 is to change the impedance of the node a to the impedance of the node b, i.e. the arrow 1 path length (depending on the inductance value of L2). The role of C2 is to adjust the impedance of node b to the characteristic impedance circle 3 corresponding to the Vbus line in the USB cable, i.e. the arrow 2 path length (depending on the capacitance value of C3), L3 is the same as that of C2.
As a further implementation, as shown in fig. 8, the inductive component includes a fourth inductive element L4, and the capacitive component includes a first resistor R1 and a third capacitive element C3.
The fourth inductive element L4 is connected in series between the control circuit 11 and the target terminal; the first end of the first resistor R1 is connected to the third connection terminal, the second end of the first resistor R1 is connected to the first end of the third capacitive element C3, and the second end of the third capacitive element C3 is grounded; wherein the third connection terminal is located between the fourth inductive element L4 and the target terminal.
It should be understood that the third connection terminal is located between the fourth inductive element L4 and the target terminal, including the case where the third connection terminal is the connection terminal of the fourth inductive element L4 or the target terminal.
Optionally, the fourth inductive element L4 may be a magnetic bead or an inductor, the third capacitive element C3 may be a capacitor or other capacitive device, and the resistance value of R2 may be the characteristic impedance of the Vbus line on the USB cable.
As shown in fig. 9, at the RE frequency point, the impedance value of the a side direction of the node a (i.e. the equivalent impedance value of the control circuit) is low impedance (region M), and the function of L4 is to change the impedance of the node a to the impedance of the node b, i.e. the arrow 1 path length (depending on the inductance value of L4); c3 functions to adjust the impedance of node b to the characteristic impedance circle 3 corresponding to the Vbus line in the USB cable, and node b presents a high impedance at dc. This scheme can more quickly adjust the impedance of node b to the characteristic impedance circle 3 corresponding to the Vbus line in the USB cable.
In the above scheme, under the condition that the left side of the node a (i.e. the control circuit) exhibits a low impedance characteristic in the test frequency band of the electromagnetic interference test, the matching circuit 13 is arranged on the line corresponding to the Vbus terminal in the electronic device, and the matching circuit satisfies that the dc impedance value approaches to 0, and in the test frequency band of the electromagnetic interference test, the equivalent resistance value of the circuit formed by the matching circuit 13 and the control circuit 11 is the same as the characteristic impedance value corresponding to the wire connected to the target terminal on the USB cable 30, the energy on the Vbus line in the USB cable can be absorbed by the matching circuit 13, so as to avoid forming standing waves, thereby reducing the common mode current radiation of the whole USB cable to the environment, and improving the electromagnetic interference test result, as shown in fig. 10.
The equivalent impedance value of the control circuit is higher than the second threshold in the test frequency band of the electromagnetic interference test, in other words, the equivalent impedance value of the control circuit presents high impedance characteristic in the test frequency band of the electromagnetic interference test; wherein the equivalent impedance value of the control circuit may be an equivalent impedance value of a circuit provided to the left of the node a in fig. 11.
As in fig. 11, the control circuit 11, without the decoupling capacitor assembly 112:
as an implementation, as shown in fig. 12, the inductive component includes a second inductive element L2 and a third inductive element L3, and the capacitive component includes a second capacitive element C2. The L2, L3, and C2 may be combined into an L-type, a T-type, or a pi-type, and the like, which is not limited in the embodiments of the present application.
For example: the second inductive element L2 and the third inductive element L3 are sequentially connected in series between the control circuit 11 and the target terminal; the first end of the second capacitive element C2 is connected to a second connection end, and the second end of the second capacitive element C2 is grounded; wherein the second connection terminal is located between the second inductive element L2 and the third inductive element L3.
Alternatively, the second inductive element L2 may be a magnetic bead or an inductor, the third inductive element L3 may be a magnetic bead or an inductor, and the second capacitive element C2 is a capacitor or other capacitive device, and functions to adjust the impedance of the node a to the characteristic impedance circle of the Vbus line on the USB cable.
As another implementation, the matching circuit 13 includes a capacitive component.
One end of the capacitive component is connected to the fourth connecting end, and the other end of the capacitive component is grounded; wherein the fourth connection terminal is located between the target terminal and the control circuit 11.
It should be understood that the fourth connection terminal is located between the target terminal and the control circuit, including the case where the fourth connection terminal is a connection terminal of the target terminal or the control circuit.
As shown in fig. 13, the capacitive element includes a second resistor R2 and a fourth capacitive element C4; a first terminal of the second resistor R2 is connected to the fourth connection terminal, a second terminal of the second resistor R2 is connected to a first terminal of the fourth capacitive element C4, and a second terminal of the fourth capacitive element C4 is grounded.
Alternatively, the resistance value of R2 may be the characteristic impedance of the Vbus line on the USB cable, C4 is a capacitor or other capacitive device that acts to adjust the impedance of node b to be on the characteristic impedance circle of the Vbus line on the USB cable, and node b presents a high impedance at dc.
In the above scheme, under the condition that the left side of the node a presents a low impedance characteristic in the test frequency band of the electromagnetic interference test, the matching circuit 13 is arranged on the line corresponding to the Vbus terminal in the electronic device, and the matching circuit meets the condition that the direct current impedance value approaches to 0, and in the test frequency band of the electromagnetic interference test, the equivalent resistance value of the circuit formed by the matching circuit 13 and the control circuit 11 is the same as the characteristic impedance value corresponding to the lead connected with the target terminal on the USB cable 30, the energy on the Vbus line in the USB cable can be absorbed by the matching circuit 13, so as to avoid forming standing waves, further reduce the common mode current radiation of the whole USB cable to the environment, and improve the electromagnetic interference test result.
It should be noted that, the specific structure of the matching circuit is described above by taking the example that the matching circuit is disposed on the line corresponding to the Vbus terminal in the USB interface; when the matching circuit is applied to the lines corresponding to other terminals in the USB interface, a structure similar to the matching circuit on the line corresponding to the Vbus terminal may also be adopted, and details are not repeated here.
The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
While preferred embodiments of the present application have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including the preferred embodiment and all such alterations and modifications as fall within the true scope of the embodiments of the application.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.
While the foregoing is directed to the preferred embodiment of the present application, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the principles of the disclosure and, therefore, the scope of the disclosure is to be defined by the appended claims.

Claims (10)

1.一种电子设备,其特征在于,包括:控制电路、通用串行总线USB接口和匹配电路;1. An electronic device, characterized in that, comprising: a control circuit, a universal serial bus (USB) interface and a matching circuit; 所述匹配电路连接于所述控制电路与目标端子之间,所述目标端子为USB接口上的供电端子或数据端子;The matching circuit is connected between the control circuit and a target terminal, and the target terminal is a power supply terminal or a data terminal on the USB interface; 其中,所述匹配电路对应的直流阻抗值在预设范围内,并且在电磁干扰测试的测试频段内,所述匹配电路和所述控制电路所组成电路的等效电阻值与USB线缆上连接所述目标端子的导线对应的特征阻抗值相同。Wherein, the DC impedance value corresponding to the matching circuit is within a preset range, and within the test frequency band of the electromagnetic interference test, the equivalent resistance value of the circuit formed by the matching circuit and the control circuit is connected to the USB cable The characteristic impedance values corresponding to the wires of the target terminals are the same. 2.根据权利要求1所述的电子设备,其特征在于,所述匹配电路包括:2. The electronic device according to claim 1, wherein the matching circuit comprises: 感性组件,所述感性组件串联于所述目标端子与所述控制电路之间;an inductive component, the inductive component is connected in series between the target terminal and the control circuit; 容性组件,所述容性组件的一端连接于所述感性组件,所述容性组件的另一端接地。A capacitive component, one end of the capacitive component is connected to the inductive component, and the other end of the capacitive component is grounded. 3.根据权利要求2所述的电子设备,其特征在于,所述感性组件包括第一感性元件,所述容性组件包括第一容性元件;3. The electronic device according to claim 2, wherein the inductive component comprises a first inductive element, and the capacitive component comprises a first capacitive element; 所述第一感性元件串联于所述控制电路与所述目标端子之间;the first inductive element is connected in series between the control circuit and the target terminal; 所述第一容性元件的第一端连接于第一连接端,所述第一容性元件的第二端接地;其中,所述第一连接端位于所述第一感性元件与所述目标端子之间。The first end of the first capacitive element is connected to the first connection end, and the second end of the first capacitive element is grounded; wherein, the first connection end is located between the first inductive element and the target between the terminals. 4.根据权利要求2所述的电子设备,其特征在于,所述感性组件包括第二感性元件和第三感性元件,所述容性组件包括第二容性元件;4. The electronic device according to claim 2, wherein the inductive component comprises a second inductive element and a third inductive element, and the capacitive component comprises a second capacitive element; 所述第二感性元件和所述第三感性元件依次串联于所述控制电路与所述目标端子之间;The second inductive element and the third inductive element are sequentially connected in series between the control circuit and the target terminal; 所述第二容性元件的第一端连接于第二连接端,所述第二容性元件的第二端接地;其中,所述第二连接端位于所述第二感性元件与所述第三感性元件之间。The first end of the second capacitive element is connected to the second connection end, and the second end of the second capacitive element is grounded; wherein, the second connection end is located between the second inductive element and the first between the three inductive elements. 5.根据权利要求2所述的电子设备,其特征在于,在所述测试频段内,所述控制电路的等效阻抗值低于第一门限;所述感性组件包括第四感性元件,所述容性组件包括第一电阻和第三容性元件;5 . The electronic device according to claim 2 , wherein, in the test frequency band, the equivalent impedance value of the control circuit is lower than a first threshold; the inductive component comprises a fourth inductive element, the The capacitive component includes a first resistor and a third capacitive element; 所述第四感性元件串联于所述控制电路与所述目标端子之间;the fourth inductive element is connected in series between the control circuit and the target terminal; 所述第一电阻的第一端连接于第三连接端,所述第一电阻的第二端连接于所述第三容性元件的第一端,所述第三容性元件的第二端接地;其中,所述第三连接端位于所述第四感性元件与所述目标端子之间。The first end of the first resistor is connected to the third connection end, the second end of the first resistor is connected to the first end of the third capacitive element, and the second end of the third capacitive element grounding; wherein, the third connection end is located between the fourth inductive element and the target terminal. 6.根据权利要求1所述的电子设备,其特征在于,在所述测试频段内,所述控制电路的等效阻抗值高于第二门限;所述匹配电路包括容性组件;6. The electronic device according to claim 1, wherein, in the test frequency band, the equivalent impedance value of the control circuit is higher than a second threshold; the matching circuit comprises a capacitive component; 所述容性组件的一端连接于第四连接端,所述容性组件的另一端接地;其中,所述第四连接端位于所述目标端子与所述控制电路之间。One end of the capacitive component is connected to a fourth connection end, and the other end of the capacitive component is grounded; wherein, the fourth connection end is located between the target terminal and the control circuit. 7.根据权利要求6所述的电子设备,其特征在于,所述容性组件包括第二电阻和第四容性元件;7. The electronic device according to claim 6, wherein the capacitive component comprises a second resistor and a fourth capacitive element; 所述第二电阻的第一端连接于所述第四连接端,所述第二电阻的第二端连接于所述第四容性元件的第一端,所述第四容性元件的第二端接地。The first end of the second resistor is connected to the fourth connection end, the second end of the second resistor is connected to the first end of the fourth capacitive element, and the first end of the fourth capacitive element is connected. Both ends are grounded. 8.根据权利要求1所述的电子设备,其特征在于,所述控制电路包括供电电源;8. The electronic device according to claim 1, wherein the control circuit comprises a power supply; 在所述目标端子为所述供电端子的情况下,所述匹配电路的一端与所述供电电源连接,所述匹配电路的另一端与所述供电端子连接。When the target terminal is the power supply terminal, one end of the matching circuit is connected to the power supply, and the other end of the matching circuit is connected to the power supply terminal. 9.根据权利要求8所述的电子设备,其特征在于,所述控制电路还包括:9. The electronic device according to claim 8, wherein the control circuit further comprises: 去耦电容组件,所述去耦电容组件的一端与所述供电电源连接,所述去耦电容组件的另一端接地。A decoupling capacitor assembly, one end of the decoupling capacitor assembly is connected to the power supply, and the other end of the decoupling capacitor assembly is grounded. 10.根据权利要求1至9中任一项所述的电子设备,其特征在于,所述匹配电路设置在靠近所述USB接口的一侧。10 . The electronic device according to claim 1 , wherein the matching circuit is arranged on a side close to the USB interface. 11 .
CN202121647626.3U 2021-07-19 2021-07-19 Electronic equipment Active CN214846702U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202121647626.3U CN214846702U (en) 2021-07-19 2021-07-19 Electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202121647626.3U CN214846702U (en) 2021-07-19 2021-07-19 Electronic equipment

Publications (1)

Publication Number Publication Date
CN214846702U true CN214846702U (en) 2021-11-23

Family

ID=78833195

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202121647626.3U Active CN214846702U (en) 2021-07-19 2021-07-19 Electronic equipment

Country Status (1)

Country Link
CN (1) CN214846702U (en)

Similar Documents

Publication Publication Date Title
US5686872A (en) Termination circuit for computer parallel data port
CN104937828B (en) Noise reduction shielded cable
TWI550296B (en) Device and method for detecting types of universal serial bus cable
US9257955B2 (en) Common mode noise reduction circuit
CN203368413U (en) Noise Filtering Circuit for Network Signal Coupling
CN214846702U (en) Electronic equipment
US11711225B2 (en) Reduction of power-over-data-lines (PODL) filter parasitics for multi-gigabit ethernet
EP3742678B1 (en) Integrated circuit with physical layer interface circuit
Liu et al. Analysis of power supply and signal integrity of high speed pcb board
CN207388881U (en) A battery management system CAN communication circuit
CN216162617U (en) Filter circuits, electronic devices and electrical appliances
CN110018408A (en) A kind of home gateway class communication terminal fails the method for adjustment tested by conduction interference
US20140009246A1 (en) Network signal enhancement circuit assembly
CN117239483A (en) Electronic device with cable interface and manufacturing method thereof
CN101232274A (en) Filter circuit for reducing electromagnetic interference of differential signal
CN209593381U (en) Network signal processing circuit
WO2020216001A1 (en) Usb module and terminal
JP6108690B2 (en) Differential transmission circuit and electronic equipment
CN217282720U (en) Capacitance separation type voltage transformation circuit
CN211791455U (en) Filter circuit for reducing clock EMI
CN213817582U (en) Power supply filtering module
CN202424764U (en) Electromagnetic compatible anti-interference circuit
CN221978804U (en) Signal generation circuit and beauty instrument
CN217693070U (en) Power supply system and electronic equipment
CN217935846U (en) Intelligent fusion terminal

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant