CN214845617U

CN214845617U - Test device for semiconductor integrated circuit package

Info

Publication number: CN214845617U
Application number: CN202120358728.7U
Authority: CN
Inventors: 彭兴义
Original assignee: Jiangsu Xinfeng Integrated Circuit Co ltd
Current assignee: Jiangsu Xinfeng Integrated Circuit Co ltd
Priority date: 2021-02-09
Filing date: 2021-02-09
Publication date: 2021-11-23
Anticipated expiration: 2031-02-09

Abstract

The utility model discloses a testing arrangement for semiconductor integrated circuit encapsulation, including base plate and chip detection circuitry board, chip detection circuitry board passes through the top of mounting screw at the base plate, there is step motor bottom of base plate through the mounting screw, step motor's expansion end runs through the surface of base plate and extends to the top of base plate, step motor's expansion end has the fixed axle through shaft coupling fixed mounting, a plurality of mounting holes have been seted up on the surface of first backup pad, and is a plurality of equal slip insertion in inside of mounting hole is equipped with the installation pole, there is second servo motor at the top of second backup pad through the mounting screw, first rack and second rack are installed respectively through the screw to the one end of second connecting plate and first connecting plate. The utility model discloses both practiced thrift the manpower, showing again and having improved the efficiency and the chip that detect and loading the position precision on detecting circuit board to guarantee the accuracy that detects, avoid the false retrieval.

Description

Test device for semiconductor integrated circuit package

Technical Field

The utility model relates to a chip detects technical field, especially relates to a testing arrangement for semiconductor integrated circuit encapsulation.

Background

When detecting semiconductor chip, need artifical manual taking the chip and insert in the jack that is used for detecting the circuit board of chip, be connected the circuit board again with testing platform and carry out the circular telegram test, if adopt foretell manual operation chip's mode, because the manual work produces the error easily when the operation for the chip pegs graft the offset in the jack, reduce the stability that the chip detected, simultaneously, the manual operation chip still greatly reduced circular telegram work efficiency, and then reduced the detection efficiency of chip.

SUMMERY OF THE UTILITY MODEL

The utility model aims at solving the shortcoming that exists among the prior art, and the testing arrangement for semiconductor integrated circuit encapsulation that proposes had both practiced thrift the manpower, was showing the efficiency and the chip that have improved the detection again and loaded the position precision on the detection circuitry board to guarantee the accuracy that detects, avoid the false retrieval.

In order to achieve the above purpose, the utility model adopts the technical scheme that: a testing device for semiconductor integrated circuit packaging comprises a substrate and a chip detection circuit board, wherein the chip detection circuit board is mounted at the top of the substrate through screws, a stepping motor is mounted at the bottom of the substrate through screws, the movable end of the stepping motor penetrates through the surface of the substrate and extends to the upper side of the substrate, a fixed shaft is fixedly mounted at the movable end of the stepping motor through a shaft coupling, a first supporting plate is mounted at one end of the fixed shaft through screws, a plurality of mounting holes are formed in the surface of the first supporting plate, mounting rods are slidably inserted into the mounting holes, telescopic mechanisms are mounted at the top ends of the mounting rods, and clamping mechanisms are mounted at the bottom ends of the mounting rods through screws;

the clamping mechanism comprises a second supporting plate, the second supporting plate is installed at the bottom end of the installation rod through a screw, two clamping blocks which are arranged face to face are movably installed on the lower surface of the second supporting plate, and the two clamping blocks can move along the directions which are close to or far away from each other;

a second servo motor is mounted at the top of the second supporting plate through a screw, a mounting gear is mounted at the movable end of the second servo motor through a screw, a strip-shaped through hole is formed in the top of the second supporting plate, and the mounting gear is located above the strip-shaped through hole;

two second connecting plate and first connecting plate are installed respectively through the screw in the top of clamp splice, the one end of second connecting plate and first connecting plate is passed the bar through-hole and is extended to the top of second backup pad, first rack and second rack are installed respectively through the screw in the one end of second connecting plate and first connecting plate, first rack and second rack mesh respectively in the upper and lower side of installation gear.

The further improved scheme in the technical scheme is as follows:

1. in the above scheme, an opening is formed in the side surface of the first connecting plate, the opening corresponds to the first rack in position, and the thickness of the first rack is smaller than that of the opening.

2. In the scheme, rubber pads are bonded on the opposite side surfaces between the two clamping blocks.

3. In the scheme, the anti-skid grains are arranged on the side faces opposite to each other between the two clamping blocks.

4. In the above scheme, the blanking mouth that corresponds with second backup pad position is seted up at the top of base plate, the bottom of base plate is installed through the screw and is connect the workbin that corresponds with the blanking mouth position.

Because of above-mentioned technical scheme's application, compared with the prior art, the utility model have the following advantage:

1. the utility model discloses a testing arrangement for semiconductor integrated circuit encapsulation, its fixture include the second backup pad, the second backup pad passes through the bottom of mounting rod through the mounting screw, movable mounting has the clamp splice of two face-to-face settings, two on the lower surface of second backup pad the clamp splice can be along the direction removal that is close to each other or keeps away from each other, is convenient for circulate a plurality of installation poles in proper order and remove to the top of feeding mechanism, chip detection circuitry board and blanking mouth, and then the transport of the chip of being convenient for, has both practiced thrift the manpower, is showing again and has improved the efficiency and the chip that detect and load the position precision on detection circuitry board to guarantee the accuracy that detects, avoid the false retrieval.

2. The utility model discloses a testing arrangement for semiconductor integrated circuit encapsulation, second connecting plate and first connecting plate are installed respectively through the screw in the top of its two clamp splices, the one end of second connecting plate and first connecting plate is passed the bar through-hole and is extended to the top of second backup pad, first rack and second rack are installed respectively through the screw in the one end of second connecting plate and first connecting plate, first rack and second rack mesh respectively in the upper and lower side of installation gear, drive first rack, second rack relatively or in opposite directions in step through the gear, realize adjusting the distance between two clamp splices, are convenient for fix and remove the transportation to the centre gripping of not unidimensional chip.

Drawings

FIG. 1 is a schematic structural diagram of a testing apparatus for semiconductor integrated circuit packages according to the present invention;

FIG. 2 is a first schematic diagram illustrating a first partial structure of the testing apparatus for semiconductor integrated circuit packages according to the present invention;

FIG. 3 is a schematic diagram of a second embodiment of the testing apparatus for semiconductor integrated circuit packages.

In the above drawings: 1. mounting a rod; 2. a first support plate; 3. a blanking port; 4. a substrate; 5. a material receiving box; 6. a fixed shaft; 7. a stepping motor; 17. a second support plate; 18. a second servo motor; 19. a chip detection circuit board; 23. a clamping block; 24. a strip-shaped through hole; 25. a second connecting plate; 26. an opening; 27. a first connecting plate; 29. a first rack; 30. a second rack; 31. and (5) mounting a gear.

Detailed Description

Example 1: a testing device for semiconductor integrated circuit packaging comprises a substrate 4 and a chip detection circuit board 19, wherein the chip detection circuit board 19 is mounted at the top of the substrate 4 through a screw, a stepping motor 7 is mounted at the bottom of the substrate 4 through a screw, the movable end of the stepping motor 7 penetrates through the surface of the substrate 4 and extends to the upper side of the substrate 4, a fixed shaft 6 is fixedly mounted at the movable end of the stepping motor 7 through a shaft coupling, a first supporting plate 2 is mounted at one end of the fixed shaft 6 through a screw, a plurality of mounting holes are formed in the surface of the first supporting plate 2, mounting rods 1 are slidably inserted into the mounting holes, telescopic mechanisms are mounted at the top ends of the mounting rods 1, and clamping mechanisms are mounted at the bottom ends of the mounting rods 1 through screws;

the clamping mechanism comprises a second supporting plate 17, the second supporting plate 17 is installed at the bottom end of the installation rod 1 through a screw, two clamping blocks 23 arranged face to face are movably installed on the lower surface of the second supporting plate 17, and the two clamping blocks 23 can move along the directions close to or far away from each other;

a second servo motor 18 is mounted at the top of the second support plate 17 through a screw, a mounting gear 31 is mounted at the movable end of the second servo motor 18 through a screw, a strip-shaped through hole 24 is formed in the top of the second support plate 17, and the mounting gear 31 is located above the strip-shaped through hole 24;

the top of the two clamping blocks 23 is respectively provided with a second connecting plate 25 and a first connecting plate 27 through screws, one end of the second connecting plate 25 and one end of the first connecting plate 27 penetrate through the strip-shaped through hole 24 and extend to the upper side of the second supporting plate 17, one end of the second connecting plate 25 and one end of the first connecting plate 27 are respectively provided with a first rack 29 and a second rack 30 through screws, and the first rack 29 and the second rack 30 are respectively meshed with the upper side and the lower side of the mounting gear 31.

An opening 26 is formed on the side surface of the first connecting plate 27, the opening 26 corresponds to the position of a first rack 29, and the thickness of the first rack 29 is smaller than that of the opening 26; rubber pads are bonded on the opposite side surfaces between the two clamping blocks.

Example 2: a testing device for semiconductor integrated circuit packaging comprises a substrate 4 and a chip detection circuit board 19, wherein the chip detection circuit board 19 is mounted at the top of the substrate 4 through a screw, a stepping motor 7 is mounted at the bottom of the substrate 4 through a screw, the movable end of the stepping motor 7 penetrates through the surface of the substrate 4 and extends to the upper side of the substrate 4, a fixed shaft 6 is fixedly mounted at the movable end of the stepping motor 7 through a shaft coupling, a first supporting plate 2 is mounted at one end of the fixed shaft 6 through a screw, a plurality of mounting holes are formed in the surface of the first supporting plate 2, mounting rods 1 are slidably inserted into the mounting holes, telescopic mechanisms are mounted at the top ends of the mounting rods 1, and clamping mechanisms are mounted at the bottom ends of the mounting rods 1 through screws;

The side surfaces opposite to each other between the two clamping blocks are provided with anti-skid grains; the top of the base plate is provided with a blanking port corresponding to the position of the second supporting plate, and the bottom of the base plate is provided with a material receiving box corresponding to the position of the blanking port through a screw.

When the testing device for semiconductor integrated circuit packaging is adopted, the mounting rods can be conveniently and circularly moved to the positions above the feeding mechanism, the chip detection circuit board and the blanking port in sequence, so that the chips can be conveniently conveyed, the labor is saved, the detection efficiency and the position precision of the chips loaded on the detection circuit board are obviously improved, the detection accuracy is ensured, and the false detection is avoided; in addition, the first rack and the second rack are driven by the gear to synchronously move relatively or oppositely, so that the distance between the two clamping blocks is adjusted, and the chips with different sizes are clamped, fixed and moved for transferring conveniently.

The above embodiments are only for illustrating the technical concept and features of the present invention, and the purpose of the embodiments is to enable people skilled in the art to understand the contents of the present invention and to implement the present invention, which cannot limit the protection scope of the present invention. All equivalent changes and modifications made according to the spirit of the present invention should be covered by the protection scope of the present invention.

Claims

1. A test apparatus for semiconductor integrated circuit package, comprising a substrate (4) and a chip detection circuit board (19), the chip detection circuit board (19) being mounted on top of the substrate (4) by screws, characterized in that: the bottom of the base plate (4) is provided with a stepping motor (7) through a screw, the movable end of the stepping motor (7) penetrates through the surface of the base plate (4) and extends to the upper side of the base plate (4), the movable end of the stepping motor (7) is fixedly provided with a fixed shaft (6) through a coupler, one end of the fixed shaft (6) is provided with a first supporting plate (2) through a screw, the surface of the first supporting plate (2) is provided with a plurality of mounting holes, mounting rods (1) are slidably inserted into the mounting holes, the top ends of the mounting rods (1) are provided with telescopic mechanisms, and the bottom ends of the mounting rods (1) are provided with clamping mechanisms through screws;

the clamping mechanism comprises a second supporting plate (17), the second supporting plate (17) is mounted at the bottom end of the mounting rod (1) through a screw, two clamping blocks (23) which are arranged face to face are movably mounted on the lower surface of the second supporting plate (17), and the two clamping blocks (23) can move along the directions which are close to or far away from each other;

a second servo motor (18) is mounted at the top of the second supporting plate (17) through a screw, a mounting gear (31) is mounted at the movable end of the second servo motor (18) through a screw, a strip-shaped through hole (24) is formed in the top of the second supporting plate (17), and the mounting gear (31) is located above the strip-shaped through hole (24);

two second connecting plate (25) and first connecting plate (27) are installed respectively through the screw in the top of clamp splice (23), the top that bar through-hole (24) and extension to second backup pad (17) are passed to the one end of second connecting plate (25) and first connecting plate (27), first rack (29) and second rack (30) are installed respectively through the screw in the one end of second connecting plate (25) and first connecting plate (27), first rack (29) and second rack (30) mesh respectively in the upper and lower side of installation gear (31).

2. The test apparatus for a semiconductor integrated circuit package according to claim 1, wherein: an opening (26) is formed in the side face of the first connecting plate (27), the opening (26) corresponds to the first rack (29), and the thickness of the first rack (29) is smaller than that of the opening (26).

3. The test apparatus for a semiconductor integrated circuit package according to claim 1, wherein: rubber pads are bonded on the opposite side surfaces between the two clamping blocks (23).

4. The test apparatus for a semiconductor integrated circuit package according to claim 1, wherein: the side surfaces opposite to each other between the two clamping blocks (23) are provided with anti-skid grains.

5. The test apparatus for a semiconductor integrated circuit package according to claim 1, wherein: the blanking opening (3) corresponding to the position of the second supporting plate (17) is formed in the top of the base plate (4), and the material receiving box (5) corresponding to the position of the blanking opening (3) is installed at the bottom of the base plate (4) through screws.