CN214756251U - Self-excited oscillation circuit - Google Patents
Self-excited oscillation circuit Download PDFInfo
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- CN214756251U CN214756251U CN202120577433.9U CN202120577433U CN214756251U CN 214756251 U CN214756251 U CN 214756251U CN 202120577433 U CN202120577433 U CN 202120577433U CN 214756251 U CN214756251 U CN 214756251U
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Abstract
The utility model provides a self-excited oscillation circuit, including bridge circuit, excitation inductance L1 and current amplitude limiting circuit, excitation winding L1 is connected between two bridge arms of bridge circuit, and current amplitude limiting circuit is used for restricting the current peak value of excitation inductance and controls two bridge arms of bridge circuit and switches on in turn. The utility model discloses a more excellent self-excited oscillation scheme, eliminated the parameter difference problem between the different switch tube individualities to the uniformity under different temperatures is fine.
Description
Technical Field
The utility model relates to an electronic circuit field specifically is a relate to a bridge type self-oscillation circuit.
Background
A conventional self-oscillation circuit is shown in FIG. 1 and comprises a P-MOS transistor and an N-MOS transistor. The basic principle is as follows: because the turn-on thresholds of the gates of the N-MOS transistors Q3 and Q4 are not absolutely equal, a crossed bridge arm is turned on first when the power is on. If the N-MOS transistor Q3 is turned on in a pilot mode, the drain of the N-MOS transistor Q3 is pulled low, at this time, the P-MOS transistor Q2 is turned on, the P-MOS transistor Q1 and the N-MOS transistor Q4 are turned off, the excitation voltage across the excitation inductor L1 is positive right and negative left, the voltage across the resistor R1 is continuously increased, the gate-source voltage across the N-MOS transistor Q3 is continuously decreased, and when the gate-source voltage across the N-MOS transistor Q3 is smaller than the turn-on threshold VGS-THWhen the voltage is lower than the turn-on threshold, the N-MOS transistor Q3 is turned off, and the gate-source voltage of the P-MOS transistor Q2 is turned off, and the P-MOThe gate-source voltages of the S tube Q1 and the N-MOS tube Q4 are higher than the conduction threshold value, the conduction is switched on, the excitation voltage on the excitation inductor L1 is in reverse phase, and self-oscillation is repeatedly formed in the way.
The exciting current on the exciting inductor L1 is mainly determined by the conduction threshold value V of the N-MOS tubeGS-THAnd R1. As is known, the dispersion of the conduction threshold of the MOS transistor is relatively large, and the conduction threshold parameters given by common manufacturers are all a range value, so that not only the difference between high and low temperatures is large, but also the consistency among MOS in batches is not guaranteed. Therefore, the oscillating circuit in fig. 1 has the disadvantages of poor symmetry, poor consistency of high and low temperature performance, poor batch consistency, and the like.
SUMMERY OF THE UTILITY MODEL
In view of this, the utility model provides a self-excited oscillation circuit solves current circuit symmetry poor, the high low temperature performance uniformity is poor, batch uniformity is poor shortcoming.
The utility model provides a technical scheme as follows:
a self-oscillating circuit characterized by: the excitation winding L1 is connected between two bridge arms of the bridge circuit, the two bridge arms are alternately switched on to generate excitation current with alternating positive and negative on the excitation winding L1, the current amplitude limiting circuit is connected with the two bridge arms of the bridge circuit and respectively detects the current flowing through the two bridge arms of the bridge circuit, when the current of the bridge arms exceeds a set threshold value, the corresponding bridge arms are controlled to be switched off, and the switching-off threshold values of the two bridge arms of the bridge circuit are controlled by the same reference voltage REF 1.
As a specific embodiment of the self-oscillation circuit, the bridge circuit includes a switching tube Q1, a switching tube Q2, a switching tube Q3, a switching tube Q4, a resistor R1, a resistor R2, a resistor R3, and a resistor R4, a source of the switching tube Q1 is connected to a source of the switching tube Q2 and then connected to the positive power supply voltage VCC, a drain of the switching tube Q1 is connected to a gate of the switching tube Q2, a drain of the switching tube Q3, and one end of the resistor R4, a drain of the switching tube Q2 is connected to a gate of the switching tube Q1, a drain of the switching tube Q4, and one end of the resistor R3, the other end of the resistor R4 is connected to a gate of the switching tube Q4, the other end of the resistor R3 is connected to a gate of the switching tube Q3, a source of the switching tube Q4 is grounded through the resistor R2, and a source of the switching tube Q3 is grounded through the resistor R1.
As a specific implementation of the self-oscillation circuit, the current limiting circuit includes comparators COMP1 and COMP2, a non-inverting input terminal of a comparator COMP1 is connected to a non-inverting input terminal of the comparator COMP2 and a reference voltage REF1, an inverting input terminal of a comparator COMP1 is connected to a source of a switching tube Q3, an inverting input terminal of the comparator COMP2 is connected to a source of the switching tube Q4, an output terminal of a comparator COMP1 is connected to a gate of the switching tube Q3, and an output terminal of a comparator COMP2 is connected to a gate of the switching tube Q4.
As another specific embodiment of the self-oscillation circuit, the bridge circuit includes a switching tube Q1, a switching tube Q2, a switching tube Q3, a switching tube Q4, a resistor R1, a resistor R3, and a resistor R4, a source of the switching tube Q1 is connected to a source of the switching tube Q2 and then connected to the positive power supply voltage VCC, a drain of the switching tube Q1 is connected to a gate of the switching tube Q2, a drain of the switching tube Q3, and one end of the resistor R4, a drain of the switching tube Q2 is connected to a gate of the switching tube Q1, a drain of the switching tube Q4, and one end of the resistor R3, the other end of the resistor R4 is connected to a gate of the switching tube Q4, the other end of the resistor R3 is connected to a gate of the switching tube Q3, a source of the switching tube Q3 is connected to a source of the switching tube Q4, one end of the resistor R1, and the other end of the resistor R1 is grounded.
As another specific implementation of the self-oscillation circuit, the current limiting circuit includes a comparator COMP1, a non-inverting input terminal of the comparator COMP1 is connected to the reference voltage REF1, an inverting input terminal of the comparator COMP1 is connected to the source of the switching transistor Q3 and the source of the switching transistor Q4, and an output terminal of the comparator COMP1 is connected to the gate of the switching transistor Q3 and the gate of the switching transistor Q4.
Preferably, the switching tube Q1 and the switching tube Q2 are P-type MOS tubes, and the switching tube Q3 and the switching tube Q4 are N-type MOS tubes.
Preferably, the output terminals of the comparator COMP1 and the comparator COMP2 are OC gates.
The utility model discloses a theory of operation will combine specific embodiment to carry out the analysis, and it is not repeated here, the beneficial effects of the utility model are that:
through the peak value circuit of comparator control excitation inductance L1, the shutoff threshold value of two bridge arms of bridge circuit is controlled by same reference voltage REF1, can eliminate the parameter difference problem between different MOS pipe individualities to peak current is also more stable under different temperatures, the utility model discloses a scheme is compared in current scheme, and the precision is higher.
Drawings
Fig. 1 is a circuit schematic diagram of a conventional self-oscillation circuit;
fig. 2 is a schematic circuit diagram of a first embodiment of the self-oscillation circuit of the present invention;
fig. 3 is a schematic circuit diagram of a second embodiment of the self-oscillation circuit of the present invention.
Detailed Description
The following detailed description of the embodiments of the present invention is provided to better understand the improvements of the present invention over the prior art.
First embodiment
As shown in fig. 2, a self-oscillation circuit includes a bridge circuit, an excitation inductor L1, and a current limiter circuit.
The bridge circuit comprises a switch tube Q1, a switch tube Q2, a switch tube Q3, a switch tube Q4, a resistor R1, a resistor R2, a resistor R3 and a resistor R4, wherein the source electrode of a switch tube Q1 is connected with the source electrode of a switch tube Q2 and then connected with a positive power supply voltage VCC, the drain electrode of a switch tube Q1 is connected with the grid electrode of a switch tube Q2, the drain electrode of a switch tube Q3 and one end of a resistor R4, the drain electrode of a switch tube Q2 is connected with the grid electrode of a switch tube Q1, the drain electrode of a switch tube Q4 and one end of a resistor R3, the other end of the resistor R4 is connected with the grid electrode of a switch tube Q4, the other end of the resistor R3 is connected with the grid electrode of a switch tube Q3, the source electrode of the switch tube Q4 is grounded through the resistor R2, and the source electrode of the switch tube Q3 is grounded through the resistor R1.
The excitation winding L1 is connected between two bridge arms of the bridge circuit, and the two bridge arms are alternately conducted to generate positive and negative alternate excitation currents on the excitation winding L1.
The current amplitude limiting circuit is connected with the two bridge arms of the bridge circuit, the currents flowing through the two bridge arms of the bridge circuit are detected through resistors R1 and R2 respectively, when the currents of the bridge arms exceed a set threshold value, the corresponding bridge arms are controlled to be turned off, and the turn-off threshold values of the two bridge arms of the bridge circuit are controlled by the same reference voltage REF 1.
The current limiting circuit comprises comparators COMP1 and COMP2, wherein a non-inverting input end of a comparator COMP1 is connected with a non-inverting input end of a comparator COMP2 and a reference voltage REF1, an inverting input end of a comparator COMP1 is connected with a source electrode of a switch tube Q3, an inverting input end of a comparator COMP2 is connected with a source electrode of the switch tube Q4, an output end of a comparator COMP1 is connected with a grid electrode of the switch tube Q3, and an output end of a comparator COMP2 is connected with a grid electrode of the switch tube Q4.
The switching tube Q1 and the switching tube Q2 are P-type MOS tubes, and the switching tube Q3 and the switching tube Q4 are N-type MOS tubes.
The output terminals of the comparator COMP1 and the comparator COMP2 are OC gates.
The working principle of the embodiment is as follows:
because the turn-on thresholds of the gates of the N-MOS transistor Q3 and the N-MOS transistor Q4 are not absolutely equal, a crossed bridge arm is turned on first when the power is on. Assuming that the N-MOS transistor Q3 is turned on in a leading manner, the drain of the N-MOS transistor Q3 is pulled low, at this time, the P-MOS transistor Q2 is turned on, the P-MOS transistor Q1 and the N-MOS transistor Q4 are turned off, at this time, the excitation voltage across the excitation inductor L1 is positive right and negative left, the voltage across the resistor R1 is continuously increased, when the voltage across the resistor R1 reaches the reference voltage REF1, the output terminal of the comparator COMP1 pulls the gate of the N-MOS transistor Q3 to ground, at this time, the N-MOS transistor Q3 is turned off, the drain is changed to high level, at the same time, the N-MOS transistor Q4 and the P-MOS transistor Q1 are turned on, the P-MOS transistor Q2 is turned off, the excitation voltage across the excitation inductor L1 is positive left and negative right, and the entire circuit self-oscillates in the above-mentioned operation manner.
The gate turn-on threshold of the MOS transistor will follow the change of the ambient temperature, and the gate turn-on threshold parameters of different MOS transistors are different from each other, so in the existing scheme of fig. 1, when the gate turn-on thresholds of the left and right bridge arms are different, excitation asymmetry in the positive and negative directions will be caused, resulting in a relatively obvious error in the output of the whole self-excited oscillation circuit. The utility model discloses in, through the peak value circuit of comparator control excitation inductance L1, the shutoff threshold value of two bridge arms of bridge circuit is controlled by same reference voltage REF1, can eliminate the parameter difference problem between the different MOS pipe individualities to peak current is also more stable under different temperatures. The utility model discloses a scheme is compared in current scheme, and the precision is higher.
Second embodiment
As shown in fig. 3, a self-oscillation circuit includes a bridge circuit, an excitation inductor L1, and a current limiter circuit.
The bridge circuit comprises a switching tube Q1, a switching tube Q2, a switching tube Q3, a switching tube Q4, a resistor R1, a resistor R3 and a resistor R4, wherein a source electrode of the switching tube Q1 is connected with a source electrode of the switching tube Q2 and then connected with a positive power supply voltage VCC, a drain electrode of a switching tube Q1 is connected with a grid electrode of the switching tube Q2, a drain electrode of the switching tube Q3 and one end of the resistor R4, a drain electrode of a switching tube Q2 is connected with a grid electrode of the switching tube Q1, a drain electrode of the switching tube Q4 and one end of the resistor R3, the other end of the resistor R4 is connected with a grid electrode of the switching tube Q4, the other end of the resistor R3 is connected with a grid electrode of the switching tube Q3, a source electrode of the switching tube Q3 is connected with a source electrode of the switching tube Q3 and one end of the resistor R1, and the other end of the resistor R1 is grounded;
the excitation winding L1 is connected between two bridge arms of the bridge circuit, and the two bridge arms are alternately conducted to generate excitation current with alternating positive and negative on the excitation winding L1.
The current amplitude limiting circuit is connected with the two bridge arms of the bridge circuit, the current flowing through the two bridge arms of the bridge circuit is detected through the resistor R1, when the current of the bridge arms exceeds a set threshold value, the corresponding bridge arms are controlled to be turned off, and the turn-off threshold values of the two bridge arms of the bridge circuit are controlled by the same reference voltage REF 1.
The current limiting circuit comprises a comparator COMP1, wherein a non-inverting input end of the comparator COMP1 is connected with a reference voltage REF1, an inverting input end of the comparator COMP1 is connected with a source electrode of the switching tube Q3 and a source electrode of the switching tube Q4, and an output end of the comparator COMP1 is connected with a grid electrode of the switching tube Q3 and a grid electrode of the switching tube Q4.
The switching tube Q1 and the switching tube Q2 are P-type MOS tubes, and the switching tube Q3 and the switching tube Q4 are N-type MOS tubes.
The output terminal of comparator COMP1 is an OC gate.
The working principle of the embodiment is as follows:
because the turn-on thresholds of the gates of the N-MOS transistor Q3 and the N-MOS transistor Q4 are not absolutely equal, a crossed bridge arm is turned on first when the power is on. Assuming that the N-MOS transistor Q3 is turned on in a leading manner, the drain of the N-MOS transistor Q3 is pulled low, at this time, the P-MOS transistor Q2 is turned on, and the P-MOS transistor Q1 and the N-MOS transistor Q4 are turned off, when the excitation voltage across the excitation inductor L1 is positive right and negative left, the voltage across the resistor R1 is continuously increased, and when the voltage across the resistor R1 reaches the reference voltage REF1, the comparator COMP1 pulls the gates of the N-MOS transistor Q3 and the N-MOS transistor Q4 to ground at the same time, and both the N-MOS transistors are turned off. The exciting current on the exciting inductor L1 needs to flow aftercurrent, and the direction of the exciting current is positive right and negative left, so the exciting current can drive the drain voltage of the N-MOS transistor Q3 high, the gate voltage of the P-MOS transistor Q2 is lower than the turn-off threshold value, and the P-MOS transistor Q2 is turned off; meanwhile, the gate voltage of the N-MOS transistor Q4 is boosted, and the N-MOS transistor Q4 is conducted, so that the gate voltage of the P-MOS transistor Q1 reaches a switching-on threshold value, and the P-MOS transistor Q1 is also conducted. The field voltage of the field inductor L1 reverses and the entire circuit self-oscillates in the manner described above.
The above is only a preferred embodiment of the present invention, and it should be noted that the above preferred embodiment should not be considered as limiting the present invention, and the protection scope of the present invention should be subject to the scope defined by the claims. It will be apparent to those skilled in the art that various modifications and enhancements can be made without departing from the spirit and scope of the invention, and such modifications and enhancements are intended to be within the scope of the invention.
Claims (7)
1. A self-oscillating circuit characterized by: the excitation winding L1 is connected between two bridge arms of the bridge circuit, the two bridge arms are alternately switched on to generate excitation current with alternating positive and negative on the excitation winding L1, the current amplitude limiting circuit is connected with the two bridge arms of the bridge circuit and respectively detects the current flowing through the two bridge arms of the bridge circuit, when the current of the bridge arms exceeds a set threshold value, the corresponding bridge arms are controlled to be switched off, and the switching-off threshold values of the two bridge arms of the bridge circuit are controlled by the same reference voltage REF 1.
2. A self-oscillation circuit according to claim 1, wherein: the bridge circuit comprises a switch tube Q1, a switch tube Q2, a switch tube Q3, a switch tube Q4, a resistor R1, a resistor R2, a resistor R3 and a resistor R4, wherein the source of the switch tube Q1 is connected with the source of the switch tube Q2 and then connected with a positive power supply voltage VCC, the drain of the switch tube Q1 is connected with the grid of the switch tube Q2, the drain of the switch tube Q3 and one end of the resistor R4, the drain of the switch tube Q2 is connected with the grid of the switch tube Q1, the drain of the switch tube Q4 and one end of the resistor R3, the other end of the resistor R4 is connected with the grid of the switch tube Q4, the other end of the resistor R3 is connected with the grid of the switch tube Q3, the source of the switch tube Q4 is grounded through the resistor R2, and the source of the switch tube Q3 is grounded through the resistor R1.
3. A self-oscillation circuit according to claim 2, wherein: the current limiting circuit comprises comparators COMP1 and COMP2, wherein a non-inverting input end of a comparator COMP1 is connected with a non-inverting input end of a comparator COMP2 and a reference voltage REF1, an inverting input end of a comparator COMP1 is connected with a source electrode of a switch tube Q3, an inverting input end of a comparator COMP2 is connected with a source electrode of the switch tube Q4, an output end of a comparator COMP1 is connected with a grid electrode of the switch tube Q3, and an output end of a comparator COMP2 is connected with a grid electrode of the switch tube Q4.
4. A self-oscillation circuit according to claim 1, wherein: the bridge circuit comprises a switching tube Q1, a switching tube Q2, a switching tube Q3, a switching tube Q4, a resistor R1, a resistor R3 and a resistor R4, wherein a source electrode of the switching tube Q1 is connected with a source electrode of the switching tube Q2 and then connected with a positive power supply voltage VCC, a drain electrode of a switching tube Q1 is connected with a grid electrode of the switching tube Q2, a drain electrode of the switching tube Q3 and one end of the resistor R4, a drain electrode of a switching tube Q2 is connected with a grid electrode of the switching tube Q1, a drain electrode of the switching tube Q4 and one end of the resistor R3, the other end of the resistor R4 is connected with a grid electrode of the switching tube Q4, the other end of the resistor R3 is connected with a grid electrode of the switching tube Q3, a source electrode of the switching tube Q3 is connected with a source electrode of the switching tube Q4 and one end of the resistor R1, and the other end of the resistor R1 is grounded.
5. Self-oscillation circuit according to claim 4, wherein: the current limiting circuit comprises a comparator COMP1, wherein a non-inverting input end of the comparator COMP1 is connected with a reference voltage REF1, an inverting input end of the comparator COMP1 is connected with a source electrode of a switching tube Q3 and a source electrode of a switching tube Q4, and an output end of the comparator COMP1 is connected with a grid electrode of the switching tube Q3 and a grid electrode of the switching tube Q4.
6. A self-oscillation circuit according to claim 2 or claim 4, wherein: the switching tube Q1 and the switching tube Q2 are P-type MOS tubes, and the switching tube Q3 and the switching tube Q4 are N-type MOS tubes.
7. A self-oscillation circuit according to claim 3 or claim 5, wherein: the output ends of the comparator COMP1 and the comparator COMP2 are OC gates.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120577433.9U CN214756251U (en) | 2021-03-22 | 2021-03-22 | Self-excited oscillation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120577433.9U CN214756251U (en) | 2021-03-22 | 2021-03-22 | Self-excited oscillation circuit |
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| Publication Number | Publication Date |
|---|---|
| CN214756251U true CN214756251U (en) | 2021-11-16 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202120577433.9U Active CN214756251U (en) | 2021-03-22 | 2021-03-22 | Self-excited oscillation circuit |
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|---|---|
| CN (1) | CN214756251U (en) |
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2021
- 2021-03-22 CN CN202120577433.9U patent/CN214756251U/en active Active
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